tree 2c07d8f7068b186ae30ae83d88fa79db24683c80
parent 6e8d666e925333c55378e8d5540a8a9ee0eea9c5
parent a67adb32d9413fc6277851994481b9d400128c1c
author Linus Torvalds <torvalds@linux-foundation.org> 1469652047 -0700
committer Linus Torvalds <torvalds@linux-foundation.org> 1469652047 -0700
mergetag object a67adb32d9413fc6277851994481b9d400128c1c
 type commit
 tag edac_for_4.8
 tagger Borislav Petkov <bp@suse.de> 1469430543 +0200
 
 * Altera Arria10 ethernet FIFO buffer support (Thor Thayer)
 
 * Minor cleanups
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Merge tag 'edac_for_4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC updates from Borislav Petkov:
 "This last cycle, Thor was busy adding Arria10 eth FIFO support to the
  altera_edac driver along with other improvements.  We have two
  cleanups/fixes too.

  Summary:

   - Altera Arria10 ethernet FIFO buffer support (Thor Thayer)

   - Minor cleanups"

* tag 'edac_for_4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  ARM: dts: Add Arria10 Ethernet EDAC devicetree entry
  EDAC, altera: Add Arria10 Ethernet EDAC support
  EDAC, altera: Add Arria10 ECC memory init functions
  Documentation: dt: socfpga: Add Arria10 Ethernet binding
  EDAC, altera: Drop some ifdeffery
  EDAC, altera: Add panic flag check to A10 IRQ
  EDAC, altera: Check parent status for Arria10 EDAC block
  EDAC, altera: Make all private data structures static
  EDAC: Correct channel count limit
  EDAC, amd64_edac: Init opstate at the proper time during init
  EDAC, altera: Handle Arria10 SDRAM child node
  EDAC, altera: Add ECC Manager IRQ controller support
  Documentation: dt: socfpga: Add interrupt-controller to ecc-manager