[MIPS] Cleanup TX39/TX49 irq code
Cleanup jmr3927, tx4927 and tx4938 irq codes, using common IRQ_CPU,
I8259 and IRQ_TXX9 irq routines.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
index 66c0646..f98b2bb 100644
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ b/include/asm-mips/tx4927/tx4927_pci.h
@@ -48,7 +48,7 @@
#define TX4927_PCI_CLK_ACK 0x04
#define TX4927_PCI_CLK_ACE 0x02
#define TX4927_PCI_CLK_ENDIAN 0x01
-#define TX4927_NR_IRQ_LOCAL (8+16)
+#define TX4927_NR_IRQ_LOCAL TX4927_IRQ_PIC_BEG
#define TX4927_NR_IRQ_IRC 32 /* On-Chip IRC */
#define TX4927_IR_PCIC 16
@@ -99,21 +99,6 @@
volatile unsigned long long ramp;
};
-struct tx4927_irc_reg {
- volatile unsigned long cer;
- volatile unsigned long cr[2];
- volatile unsigned long unused0;
- volatile unsigned long ilr[8];
- volatile unsigned long unused1[4];
- volatile unsigned long imr;
- volatile unsigned long unused2[7];
- volatile unsigned long scr;
- volatile unsigned long unused3[7];
- volatile unsigned long ssr;
- volatile unsigned long unused4[7];
- volatile unsigned long csr;
-};
-
struct tx4927_pcic_reg {
volatile unsigned long pciid;
volatile unsigned long pcistatus;
@@ -182,11 +167,6 @@
#endif /* _LANGUAGE_ASSEMBLY */
-/* IRCSR : Int. Current Status */
-#define TX4927_IRCSR_IF 0x00010000
-#define TX4927_IRCSR_ILV_MASK 0x00000700
-#define TX4927_IRCSR_IVL_MASK 0x0000001f
-
/*
* PCIC
*/
@@ -278,7 +258,6 @@
#define tx4927_pcicptr ((struct tx4927_pcic_reg *)TX4927_PCIC_REG)
#define tx4927_ccfgptr ((struct tx4927_ccfg_reg *)TX4927_CCFG_REG)
#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
-#define tx4927_ircptr ((struct tx4927_irc_reg *)TX4927_IRC_REG)
#endif /* _LANGUAGE_ASSEMBLY */