| commit | c9e854cf940fbc09846c255895efceb3bc9bf095 | [log] [tgz] |
|---|---|---|
| author | John Crispin <blogic@openwrt.org> | Wed Jul 11 16:33:43 2012 +0200 |
| committer | John Crispin <blogic@openwrt.org> | Thu Sep 13 10:31:00 2012 +0200 |
| tree | e56a5460f02e9c415d10ffa718d5d78d062f4b82 | |
| parent | 6a88a0f762a61f212d4bbcf1ad45369f28014484 [diff] |
GPIO: MIPS: lantiq: fix overflow inside stp-xway driver The driver was using a 16 bit field for storing the shadow value of the shift register cascade. This resulted in only the first 2 shift registeres receiving the correct data. The third shift register would always receive 0x00. Fix this by using a 32bit field for the shadow value. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org