commit | cbb4509374963bea440c15ff26e2501d15e7927a | [log] [tgz] |
---|---|---|
author | Benoît Thébaudeau <benoit@wsystem.com> | Tue May 30 11:14:08 2017 +0200 |
committer | Ulf Hansson <ulf.hansson@linaro.org> | Tue Jun 20 10:30:32 2017 +0200 |
tree | 6c6361184aac4a6002c400ee850321a6f2584431 | |
parent | d04f8d5b949d972918ef8174d7702275ff6dbb08 [diff] |
mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR The eSDHC can only DMA from 32-bit-aligned addresses. This fixes the following test cases of mmc_test: 11: Badly aligned write 12: Badly aligned read 13: Badly aligned multi-block write 14: Badly aligned multi-block read Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>