| commit | cbd69e7ae16d41c3079409e4f1861246e9655dbd | [log] [tgz] |
|---|---|---|
| author | Jerome Brunet <jbrunet@baylibre.com> | Mon May 13 14:31:11 2019 +0200 |
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | Mon Jan 27 14:50:49 2020 +0100 |
| tree | 884ee72b080a0d09d84c17fa656f1fa065f3ae6d | |
| parent | 3dffd74823e0a05c9fc82f9c7bfd136526a28e38 [diff] |
clk: meson: axg: spread spectrum is on mpll2
[ Upstream commit dc4e62d373f881cbf51513296a6db7806516a01a ]
After testing, it appears that the SSEN bit controls the spread
spectrum function on MPLL2, not MPLL0.
Fixes: 78b4af312f91 ("clk: meson-axg: add clock controller drivers")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>