commit | d127967a7b18598b8922bf9a4b984fae899787dc | [log] [tgz] |
---|---|---|
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | Tue Apr 18 02:18:19 2017 +0000 |
committer | Stephen Boyd <sboyd@codeaurora.org> | Wed Apr 19 10:18:52 2017 -0700 |
tree | 019cd10427ab72fd1968d6032648766a9a50af92 | |
parent | 4a43e35d19c1379c255a8abab3d6303ed382dcf1 [diff] |
clk: cs2000: enable clock skipping mode CLK_IN skipping mode allows the PLL to maintain lock even when the CLK_IN signal has missing pulses for up to 20 ms (t CS) at a time. This patch enables it Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>