commit | d16c0d722d09496a03222dc27ee3071b7b1051e5 | [log] [tgz] |
---|---|---|
author | Nishanth Menon <nm@ti.com> | Tue May 24 08:35:38 2016 -0500 |
committer | Tony Lindgren <tony@atomide.com> | Mon Jun 13 01:04:01 2016 -0700 |
tree | 4de35453bbf0675757a62560ddffdd432810aff1 | |
parent | 8d29bdba7291f9f939bc17ac088ab650d106d451 [diff] |
ARM: OMAP: DRA7: powerdomain data: Set L3init and L4per to ON As per the latest revision F of public TRM for DRA7/AM57xx SoCs SPRUHZ6F[1] (April 2016), L4Per and L3init power domains now operate in always "ON" mode due to asymmetric aging limitations. Update the same [1] http://www.ti.com/lit/pdf/spruhz6 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>