ARM: at91/pm_slowclock: remove clocks which are already stopped when entering slow clock mode
Assume USB PLL and PLL B are already stopped before entering sleep mode.
Removed PLL B from slow clock code, all drivers are supposed to properly
unprepare clocks.
Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: Wenyou.Yang <wenyou.yang@atmel.com>
[nicolas.ferre@atmel.com: remove the warning printed in pm.c]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 6022d2d..a207dea 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -50,15 +50,6 @@
beq 1b
.endm
-/*
- * Wait until PLLB has locked.
- */
- .macro wait_pllblock
-1: ldr tmp1, [pmc, #AT91_PMC_SR]
- tst tmp1, #AT91_PMC_LOCKB
- beq 1b
- .endm
-
.text
.arm
@@ -176,13 +167,6 @@
orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
str tmp1, [pmc, #AT91_CKGR_PLLAR]
- /* Save PLLB setting and disable it */
- ldr tmp1, [pmc, #AT91_CKGR_PLLBR]
- str tmp1, .saved_pllbr
-
- mov tmp1, #AT91_PMC_PLLCOUNT
- str tmp1, [pmc, #AT91_CKGR_PLLBR]
-
/* Turn off the main oscillator */
ldr tmp1, [pmc, #AT91_CKGR_MOR]
bic tmp1, tmp1, #AT91_PMC_MOSCEN
@@ -200,18 +184,6 @@
wait_moscrdy
- /* Restore PLLB setting */
- ldr tmp1, .saved_pllbr
- str tmp1, [pmc, #AT91_CKGR_PLLBR]
-
- tst tmp1, #(AT91_PMC_MUL & 0xff0000)
- bne 1f
- tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
- beq 2f
-1:
- wait_pllblock
-2:
-
/* Restore PLLA setting */
ldr tmp1, .saved_pllar
str tmp1, [pmc, #AT91_CKGR_PLLAR]
@@ -279,9 +251,6 @@
.saved_pllar:
.word 0
-.saved_pllbr:
- .word 0
-
.saved_sam9_lpr:
.word 0