tree 133e4665ba160462a5c313776e3e027794848dca
parent fb00ff4c30a8cce32371e5d1abcbb33be1b6d506
author Fabio Estevam <fabio.estevam@freescale.com> 1435338653 -0300
committer Shawn Guo <shawnguo@kernel.org> 1439306110 +0800

ARM: dts: imx6qdl-sabresd: Allow HDMI and LVDS to work simultaneously

Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.

Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.

With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>