| commit | d80a32fe98b7ce428669b774c3d10ecae3bc6e6d | [log] [tgz] |
|---|---|---|
| author | Dmitry Osipenko <digetx@gmail.com> | Wed Oct 04 02:02:41 2017 +0300 |
| committer | Thierry Reding <treding@nvidia.com> | Wed Nov 01 15:00:05 2017 +0100 |
| tree | 03e39fd10340e1a04c7be43a91b0098bf7a30c51 | |
| parent | 5a6b184a36b8f5ff01ce93c9251996e4f96310d7 [diff] |
clk: tegra: Bump SCLK clock rate to 216 MHz AHB DMA is a running on 1/2 of SCLK rate, APB DMA on 1/4. Increasing SCLK rate results in an increased DMA transfer rate. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>