tree 40622433c4f5fd1676e4ea4917e898f0afc34069
parent d58cf5ff6500522880683ce90d9caa79af385ed8
author Andy Shevchenko <andriy.shevchenko@linux.intel.com> 1421942374 +0200
committer Mark Brown <broonie@kernel.org> 1422360269 +0000

spi: dw-mid: get a proper clock frequency for SPI2

The clock information is being kept in the custom register on Intel MID
platforms. Each controller has its own dedicated custom register for that.
Thus, to get a proper frequency we have to read value from the specific offset
to the register block. This patch makes this happen.

Fixes: d58cf5ff6500 (spi: dw-pci: describe Intel MID controllers better)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>