| commit | daffad2123fc3efcc2c70bd6e905960a31886556 | [log] [tgz] |
|---|---|---|
| author | Gabriel Fernandez <gabriel.fernandez@st.com> | Thu Mar 16 09:16:40 2017 +0100 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Mon Apr 03 17:57:54 2017 -0700 |
| tree | 68ba0638bbf1ee1f4c30460044db8e6f51d22103 | |
| parent | 7f0b97d5bb4c1c99c38dd6770ad11f714ea42583 [diff] |
clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
0000: PLLQ = 0, wrong configuration
0001: PLLQ = 1, wrong configuration
...
0010: PLLQ = 2
0011: PLLQ = 3
0100: PLLQ = 4
...
1111: PLLQ = 1
Use divider table to exclude 0 and 1 values.
Fixes: 83135ad3c517 ("clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>