| commit | db8165f5d975533880f516fed142364ba3e6046e | [log] [tgz] |
|---|---|---|
| author | Max Filippov <jcmvbkbc@gmail.com> | Thu Jun 04 13:41:27 2015 +0300 |
| committer | Max Filippov <jcmvbkbc@gmail.com> | Mon Aug 17 07:32:51 2015 +0300 |
| tree | e737a4fa9c48d724cee5b25653b231281ff57f3c | |
| parent | 5fdf377d802ddd439fe16dd2e9e38039af535af2 [diff] [blame] |
xtensa: select PERF_USE_VMALLOC for cache-aliasing configurations Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 14a03fe..66e4043 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig
@@ -22,6 +22,7 @@ select HAVE_PERF_EVENTS select IRQ_DOMAIN select MODULES_USE_ELF_RELA + select PERF_USE_VMALLOC select VIRT_TO_BUS help Xtensa processors are 32-bit RISC machines designed by Tensilica