tree a1454fd7596c527fdcedde312b89679941b7061c
parent d968d2b801d877601d54e35e6dd0f52d9c797c99
author Will Deacon <will.deacon@arm.com> 1345818059 +0100
committer Russell King <rmk+kernel@arm.linux.org.uk> 1345882556 +0100

ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores

When enabling the MMU for ARMv7 CPUs, the decompressor does not touch
the ttbcr register, assuming that it will be zeroed (N == 0, EAE == 0).
Given that only EAE is defined as 0 for non-secure copies of the
register (and a bootloader such as kexec may leave it set to 1 anyway),
we should ensure that we reset the register ourselves before turning on
the MMU.

This patch zeroes TTBCR.EAE and TTBCR.N prior to enabling the MMU for
ARMv7 cores in the decompressor, configuring us exclusively for 32-bit
translation tables via TTBR0.

Cc: <stable@vger.kernel.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Matthew Leach <matthew.leach@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>