spi: spi-sh-msiof: round up div to fix freq calculation
Truncation on integer division in sh_msiof_spi_set_clk_regs()
results in insufficient transfer frequency (> max_speed_freq).
For example, source 52MHz, required max 6MHz
52/6 = 8.6 --> 8, then 1/8 table selected,
and result in 52/8 = 6.5 MHz (>6MHz)
Rounding it up is a simple solution.
52/6 = 8.6 --> 9, then 1/16 table selected,
and result in 52/16 = 3.25 MHz
Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Signed-off-by: Mark Brown <broonie@linaro.org>
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index c74298c..ac8795f 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -152,7 +152,7 @@
size_t k;
if (!WARN_ON(!spi_hz || !parent_rate))
- div = parent_rate / spi_hz;
+ div = DIV_ROUND_UP(parent_rate, spi_hz);
/* TODO: make more fine grained */