commit | eca05f0011de16f7a889e14dc36c7618d040884a | [log] [tgz] |
---|---|---|
author | Elaine Zhang <zhangqing@rock-chips.com> | Wed Aug 02 16:33:04 2017 +0800 |
committer | Heiko Stuebner <heiko@sntech.de> | Tue Aug 08 00:48:53 2017 +0200 |
tree | e9a83bf0c753283ac79129f48c3b62b5c2ae9e0c | |
parent | d00b4d943d8c2372a01533b1af3d49c126a5a415 [diff] |
clk: rockchip: fix up the pll clks error for rv1108 SoC fix up the lock_shift describe error. remove the ROCKCHIP_PLL_SYNC_RATE flag for gpll. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>