| commit | ee17eb83c48e04653d8b430735f82fd4cdac6ca3 | [log] [tgz] |
|---|---|---|
| author | Jianqun <jay.xu@rock-chips.com> | Mon Sep 01 23:56:28 2014 +0200 |
| committer | Heiko Stuebner <heiko@sntech.de> | Sat Sep 27 17:57:10 2014 +0200 |
| tree | 1d35ef5ad89f6671ad59a4a9cfe01f8621ddbb6d | |
| parent | 11ff376fcfc0135b8947d27ab80162c218d1af90 [diff] |
clk: rockchip: fix rk3288 pll status register location In RK3288, APLL lock status bit is in GRF_SOC_STATUS1, but in RK3188, is GRFSOC_STATUS0. Signed-off-by: Jianqun <jay.xu@rock-chips.com> Also name the constant accordingly as GRF_SOC_STATUS1 to prevent confusion. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>