| commit | f3a54d6c17f5ec826ff81e4f9f35a11e63211c53 | [log] [tgz] |
|---|---|---|
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | Fri Feb 02 21:33:39 2018 +0300 |
| committer | Simon Horman <horms+renesas@verge.net.au> | Mon Feb 12 13:52:08 2018 +0100 |
| tree | e0c4fabe957d47c7b026ccee0de5ac9382c0f96d | |
| parent | b85e1f77d9e285e61f8aa5a3a7e2bc46431d07ee [diff] |
arm64: dts: renesas: initial R8A77980 SoC device tree The initial R8A77980 SoC device tree including Cortex-A53 CPU, GIC, timer, CPG, RST, and SYSC. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>