tree f846a1f59bc4eaf895c2517c0716925b9497b3d1
parent 3fd9396af83a1e69eaf9ebb573207431d8f265b6
author Will Deacon <will.deacon@arm.com> 1352118887 +0000
committer Catalin Marinas <catalin.marinas@arm.com> 1352390779 +0000

arm64: perf: use architected event for CPU cycle counter

We currently use a fake event encoding (0xFF) to indicate CPU cycles so
that we don't waste an event counter and can target the hardware cycle
counter instead.

The problem with this approach is that the event space defined by the
architecture permits an implementation to allocate 0xFF for some other
event.

This patch uses the architected cycle counter encoding (0x11) so that
we avoid potentially clashing with event encodings on future CPU
implementations.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>