tree 69d7d9ccfca7d8f9fee2effd69a0b2ae055b3b2f
parent 631b0af98c1efb160f02154743ae9f13fe03e347
author Ralf Baechle <ralf@linux-mips.org> 1363100767 +0100
committer Ralf Baechle <ralf@linux-mips.org> 1363111089 +0100

MIPS: SEAD3: Enable LL/SC.

All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>