commit | e671538d5110e913a0a3cd6122d7f70b71fc0728 | [log] [tgz] |
---|---|---|
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | Mon Oct 13 11:50:41 2014 +0300 |
committer | Tony Lindgren <tony@atomide.com> | Fri Nov 14 10:28:33 2014 -0800 |
tree | 1a21476719ee5c8d2af162574dc0862a8f317890 | |
parent | be6688350a4470e417aaeca54d162652aab40ac5 [diff] |
ARM: dts: dra7: fix DSS PLL clock mux registers The clock nodes for DSS VIDEO1/2 and HDMI have wrong register addresses. This patch fixes the addresses so that they point to CM_CLKSEL_VIDEO1_PLL_SYS, CM_CLKSEL_VIDEO2_PLL_SYS and CM_CLKSEL_HDMI_PLL_SYS. Reported-by: Somnath Mukherjee <somnath@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>