tree 2958e54b187b6b3a3f1d0fce00c0a261940fbfd0
parent 3c2993b8c6143d8a5793746a54eba8f86f95240f
author Marcin Nowakowski <marcin.nowakowski@imgtec.com> 1492603663 +0200
committer Ralf Baechle <ralf@linux-mips.org> 1496926318 +0200

MIPS: perf: Remove incorrect odd/even counter handling for I6400

All performance counters on I6400 (odd and even) are capable of counting
any of the available events, so drop current logic of using the extra
bit to determine which counter to use.

Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
Fixes: 4e88a8621301 ("MIPS: Add cases for CPU_I6400")
Fixes: fd716fca10fc ("MIPS: perf: Fix I6400 event numbers")
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15991/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>