| commit | f8fc94dbcf2d166b865991afb6c827aa56dc0de2 | [log] [tgz] |
|---|---|---|
| author | Michel Pollet <michel.pollet@bp.renesas.com> | Thu Jun 28 09:17:14 2018 +0100 |
| committer | Simon Horman <horms+renesas@verge.net.au> | Mon Jul 23 13:33:05 2018 +0200 |
| tree | dc39ef93572f4fc97f09e9c731d7cce9dd51f810 | |
| parent | df7112c9461458c2a2069e9a4a7962fd16bf62bf [diff] |
ARM: dts: Renesas R9A06G032 SMP enable method Add a special enable method for the second CA7 of the R9A06G032 as well as the default value for the "cpu-release-addr" property. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>