tree a0df85b3261e5f00e3f8b2c51fa98358efc3d784
parent 9e575f753576d85e83ae0afc27eca9708259a797
author James Hogan <james.hogan@imgtec.com> 1462978228 +0100
committer Ralf Baechle <ralf@linux-mips.org> 1463146225 +0200

MIPS: Add register definitions for VZ ASE registers

Add various register definitions to <asm/mipsregs.h> for the coprocessor
zero registers in the VZ ASE, namely CP0_GuestCtl0, CP0_GuestCtl0Ext,
CP0_GuestCtl1, CP0_GuestCtl2, CP0_GuestCtl3, and CP0_GTOffset.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13228/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>