| /* |
| * Copyright 2011 Freescale Semiconductor, Inc. |
| * Copyright 2011 Linaro Ltd. |
| * |
| * The code contained herein is licensed under the GNU General Public |
| * License. You may obtain a copy of the GNU General Public License |
| * Version 2 or later at the following locations: |
| * |
| * http://www.opensource.org/licenses/gpl-license.html |
| * http://www.gnu.org/copyleft/gpl.html |
| */ |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| |
| / { |
| chosen { |
| stdout-path = &uart2; |
| }; |
| |
| memory { |
| reg = <0x10000000 0x40000000>; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg_2p5v: regulator@0 { |
| compatible = "regulator-fixed"; |
| reg = <0>; |
| regulator-name = "2P5V"; |
| regulator-min-microvolt = <2500000>; |
| regulator-max-microvolt = <2500000>; |
| regulator-always-on; |
| }; |
| |
| reg_3p3v: regulator@1 { |
| compatible = "regulator-fixed"; |
| reg = <1>; |
| regulator-name = "3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| reg_usb_otg_vbus: regulator@2 { |
| compatible = "regulator-fixed"; |
| reg = <2>; |
| regulator-name = "usb_otg_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio3 22 0>; |
| enable-active-high; |
| }; |
| |
| reg_can_xcvr: regulator@3 { |
| compatible = "regulator-fixed"; |
| reg = <3>; |
| regulator-name = "CAN XCVR"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_can_xcvr>; |
| gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_gpio_keys>; |
| |
| power { |
| label = "Power Button"; |
| gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_POWER>; |
| gpio-key,wakeup; |
| }; |
| |
| menu { |
| label = "Menu"; |
| gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_MENU>; |
| }; |
| |
| home { |
| label = "Home"; |
| gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_HOME>; |
| }; |
| |
| back { |
| label = "Back"; |
| gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_BACK>; |
| }; |
| |
| volume-up { |
| label = "Volume Up"; |
| gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_VOLUMEUP>; |
| }; |
| |
| volume-down { |
| label = "Volume Down"; |
| gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; |
| linux,code = <KEY_VOLUMEDOWN>; |
| }; |
| }; |
| |
| sound { |
| compatible = "fsl,imx6q-sabrelite-sgtl5000", |
| "fsl,imx-audio-sgtl5000"; |
| model = "imx6q-sabrelite-sgtl5000"; |
| ssi-controller = <&ssi1>; |
| audio-codec = <&codec>; |
| audio-routing = |
| "MIC_IN", "Mic Jack", |
| "Mic Jack", "Mic Bias", |
| "Headphone Jack", "HP_OUT"; |
| mux-int-port = <1>; |
| mux-ext-port = <4>; |
| }; |
| |
| backlight_lcd { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm1 0 5000000>; |
| brightness-levels = <0 4 8 16 32 64 128 255>; |
| default-brightness-level = <7>; |
| power-supply = <®_3p3v>; |
| status = "okay"; |
| }; |
| |
| backlight_lvds: backlight_lvds { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm4 0 5000000>; |
| brightness-levels = <0 4 8 16 32 64 128 255>; |
| default-brightness-level = <7>; |
| power-supply = <®_3p3v>; |
| status = "okay"; |
| }; |
| |
| panel { |
| compatible = "hannstar,hsd100pxn1"; |
| backlight = <&backlight_lvds>; |
| |
| port { |
| panel_in: endpoint { |
| remote-endpoint = <&lvds0_out>; |
| }; |
| }; |
| }; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux>; |
| status = "okay"; |
| }; |
| |
| &can1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_can1>; |
| xceiver-supply = <®_can_xcvr>; |
| status = "okay"; |
| }; |
| |
| &clks { |
| assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, |
| <&clks IMX6QDL_CLK_LDB_DI1_SEL>; |
| assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, |
| <&clks IMX6QDL_CLK_PLL3_USB_OTG>; |
| }; |
| |
| &ecspi1 { |
| fsl,spi-num-chipselects = <1>; |
| cs-gpios = <&gpio3 19 0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi1>; |
| status = "okay"; |
| |
| flash: m25p80@0 { |
| compatible = "sst,sst25vf016b"; |
| spi-max-frequency = <20000000>; |
| reg = <0>; |
| }; |
| }; |
| |
| &fec { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet>; |
| phy-mode = "rgmii"; |
| phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; |
| txen-skew-ps = <0>; |
| txc-skew-ps = <3000>; |
| rxdv-skew-ps = <0>; |
| rxc-skew-ps = <3000>; |
| rxd0-skew-ps = <0>; |
| rxd1-skew-ps = <0>; |
| rxd2-skew-ps = <0>; |
| rxd3-skew-ps = <0>; |
| txd0-skew-ps = <0>; |
| txd1-skew-ps = <0>; |
| txd2-skew-ps = <0>; |
| txd3-skew-ps = <0>; |
| interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, |
| <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; |
| status = "okay"; |
| }; |
| |
| &hdmi { |
| ddc-i2c-bus = <&i2c2>; |
| status = "okay"; |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| status = "okay"; |
| |
| codec: sgtl5000@0a { |
| compatible = "fsl,sgtl5000"; |
| reg = <0x0a>; |
| clocks = <&clks 201>; |
| VDDA-supply = <®_2p5v>; |
| VDDIO-supply = <®_3p3v>; |
| }; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| status = "okay"; |
| }; |
| |
| &i2c3 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3>; |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog>; |
| |
| imx6q-sabrelite { |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| /* SGTL5000 sys_mclk */ |
| MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 |
| >; |
| }; |
| |
| pinctrl_audmux: audmuxgrp { |
| fsl,pins = < |
| MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 |
| MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 |
| MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 |
| MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 |
| >; |
| }; |
| |
| pinctrl_can1: can1grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 |
| MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_can_xcvr: can-xcvrgrp { |
| fsl,pins = < |
| /* Flexcan XCVR enable */ |
| MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_ecspi1: ecspi1grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 |
| MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 |
| MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 |
| MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */ |
| >; |
| }; |
| |
| pinctrl_enet: enetgrp { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
| MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
| MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 |
| MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 |
| MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 |
| MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 |
| MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 |
| MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 |
| MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
| MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 |
| MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
| /* Phy reset */ |
| MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 |
| MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
| >; |
| }; |
| |
| pinctrl_gpio_keys: gpio_keysgrp { |
| fsl,pins = < |
| /* Power Button */ |
| MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 |
| /* Menu Button */ |
| MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 |
| /* Home Button */ |
| MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 |
| /* Back Button */ |
| MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 |
| /* Volume Up Button */ |
| MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 |
| /* Volume Down Button */ |
| MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
| MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c2: i2c2grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c3: i2c3grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 |
| MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_pwm1: pwm1grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_pwm3: pwm3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_pwm4: pwm4grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbotg: usbotggrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 |
| MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 |
| /* power enable, high active */ |
| MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 |
| >; |
| }; |
| |
| pinctrl_usdhc3: usdhc3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */ |
| MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */ |
| >; |
| }; |
| |
| pinctrl_usdhc4: usdhc4grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 |
| MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 |
| MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 |
| MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 |
| MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 |
| MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 |
| MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */ |
| >; |
| }; |
| }; |
| }; |
| |
| &ldb { |
| status = "okay"; |
| |
| lvds-channel@0 { |
| fsl,data-mapping = "spwg"; |
| fsl,data-width = <18>; |
| status = "okay"; |
| |
| port@4 { |
| reg = <4>; |
| |
| lvds0_out: endpoint { |
| remote-endpoint = <&panel_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &pcie { |
| status = "okay"; |
| }; |
| |
| &pwm1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm1>; |
| status = "okay"; |
| }; |
| |
| &pwm3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm3>; |
| status = "okay"; |
| }; |
| |
| &pwm4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm4>; |
| status = "okay"; |
| }; |
| |
| &ssi1 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| status = "okay"; |
| }; |
| |
| &usbh1 { |
| status = "okay"; |
| }; |
| |
| &usbotg { |
| vbus-supply = <®_usb_otg_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg>; |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usdhc3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc3>; |
| cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; |
| wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; |
| vmmc-supply = <®_3p3v>; |
| status = "okay"; |
| }; |
| |
| &usdhc4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc4>; |
| cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; |
| vmmc-supply = <®_3p3v>; |
| status = "okay"; |
| }; |