| commit | fcc152f3bf55cec61167b173774cbf717b0ff5e4 | [log] [tgz] |
|---|---|---|
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | Thu Sep 03 22:59:00 2009 +0900 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Mon Nov 02 12:00:07 2009 +0100 |
| tree | 7005fde7d87f7f93fa33a39f1cda3194ed94a632 | |
| parent | 2b5b9b786c177fa4bca1646325a1dd98c4399523 [diff] |
MIPS: TXx9: Fix spi-baseclk value TXx9 SPI bit rate is calculated by: fBR = fSPI / 2 / (n + 1) (fSPI is SPI master clock freq, i.e. imbusclk freq.) So use imbus_clk / 2 as a spi-baseclk. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>