Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for the r8a7790 SoC |
| 3 | * |
Kazuya Mizuguchi | b621f6d | 2015-02-19 10:42:55 -0500 | [diff] [blame] | 4 | * Copyright (C) 2015 Renesas Electronics Corporation |
Sergei Shtylyov | d8913c6 | 2014-02-20 02:20:43 +0300 | [diff] [blame] | 5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
| 6 | * Copyright (C) 2014 Cogent Embedded Inc. |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public License |
| 9 | * version 2. This program is licensed "as is" without any warranty of any |
| 10 | * kind, whether express or implied. |
| 11 | */ |
| 12 | |
Geert Uytterhoeven | 5802c420 | 2017-08-18 11:11:34 +0200 | [diff] [blame] | 13 | #include <dt-bindings/clock/r8a7790-cpg-mssr.h> |
Laurent Pinchart | 5f75e73 | 2013-11-19 03:18:25 +0100 | [diff] [blame] | 14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 15 | #include <dt-bindings/interrupt-controller/irq.h> |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 16 | #include <dt-bindings/power/r8a7790-sysc.h> |
Laurent Pinchart | 5f75e73 | 2013-11-19 03:18:25 +0100 | [diff] [blame] | 17 | |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 18 | / { |
| 19 | compatible = "renesas,r8a7790"; |
Takashi Yoshii | 8585deb | 2013-03-29 16:49:17 +0900 | [diff] [blame] | 20 | #address-cells = <2>; |
| 21 | #size-cells = <2>; |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 22 | |
Wolfram Sang | 6b1d7c6 | 2014-02-16 10:40:58 +0100 | [diff] [blame] | 23 | aliases { |
| 24 | i2c0 = &i2c0; |
| 25 | i2c1 = &i2c1; |
| 26 | i2c2 = &i2c2; |
| 27 | i2c3 = &i2c3; |
Wolfram Sang | 05f3991 | 2014-03-25 19:56:29 +0100 | [diff] [blame] | 28 | i2c4 = &iic0; |
| 29 | i2c5 = &iic1; |
| 30 | i2c6 = &iic2; |
| 31 | i2c7 = &iic3; |
Geert Uytterhoeven | fad6d45 | 2014-02-25 11:30:13 +0100 | [diff] [blame] | 32 | spi0 = &qspi; |
Geert Uytterhoeven | ae8a614 | 2014-02-25 11:30:15 +0100 | [diff] [blame] | 33 | spi1 = &msiof0; |
| 34 | spi2 = &msiof1; |
| 35 | spi3 = &msiof2; |
| 36 | spi4 = &msiof3; |
Ben Dooks | 9f685bf | 2014-08-13 00:16:18 +0400 | [diff] [blame] | 37 | vin0 = &vin0; |
| 38 | vin1 = &vin1; |
| 39 | vin2 = &vin2; |
| 40 | vin3 = &vin3; |
Wolfram Sang | 6b1d7c6 | 2014-02-16 10:40:58 +0100 | [diff] [blame] | 41 | }; |
| 42 | |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 43 | cpus { |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <0>; |
Magnus Damm | dc37879 | 2016-06-28 16:10:40 +0200 | [diff] [blame] | 46 | enable-method = "renesas,apmu"; |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 47 | |
| 48 | cpu0: cpu@0 { |
| 49 | device_type = "cpu"; |
| 50 | compatible = "arm,cortex-a15"; |
| 51 | reg = <0>; |
| 52 | clock-frequency = <1300000000>; |
Benoit Cousson | b989e13 | 2014-06-03 21:02:24 +0900 | [diff] [blame] | 53 | voltage-tolerance = <1>; /* 1% */ |
Geert Uytterhoeven | 5802c420 | 2017-08-18 11:11:34 +0200 | [diff] [blame] | 54 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
Benoit Cousson | b989e13 | 2014-06-03 21:02:24 +0900 | [diff] [blame] | 55 | clock-latency = <300000>; /* 300 us */ |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 56 | power-domains = <&sysc R8A7790_PD_CA15_CPU0>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 57 | next-level-cache = <&L2_CA15>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 58 | capacity-dmips-mhz = <1024>; |
Benoit Cousson | b989e13 | 2014-06-03 21:02:24 +0900 | [diff] [blame] | 59 | |
| 60 | /* kHz - uV - OPPs unknown yet */ |
| 61 | operating-points = <1400000 1000000>, |
| 62 | <1225000 1000000>, |
| 63 | <1050000 1000000>, |
| 64 | < 875000 1000000>, |
| 65 | < 700000 1000000>, |
| 66 | < 350000 1000000>; |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 67 | }; |
Magnus Damm | c1f9597 | 2013-08-29 08:22:17 +0900 | [diff] [blame] | 68 | |
| 69 | cpu1: cpu@1 { |
| 70 | device_type = "cpu"; |
| 71 | compatible = "arm,cortex-a15"; |
| 72 | reg = <1>; |
| 73 | clock-frequency = <1300000000>; |
Geert Uytterhoeven | aa4c2fd | 2017-10-12 11:35:10 +0200 | [diff] [blame] | 74 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 75 | power-domains = <&sysc R8A7790_PD_CA15_CPU1>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 76 | next-level-cache = <&L2_CA15>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 77 | capacity-dmips-mhz = <1024>; |
Magnus Damm | c1f9597 | 2013-08-29 08:22:17 +0900 | [diff] [blame] | 78 | }; |
| 79 | |
| 80 | cpu2: cpu@2 { |
| 81 | device_type = "cpu"; |
| 82 | compatible = "arm,cortex-a15"; |
| 83 | reg = <2>; |
| 84 | clock-frequency = <1300000000>; |
Geert Uytterhoeven | aa4c2fd | 2017-10-12 11:35:10 +0200 | [diff] [blame] | 85 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 86 | power-domains = <&sysc R8A7790_PD_CA15_CPU2>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 87 | next-level-cache = <&L2_CA15>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 88 | capacity-dmips-mhz = <1024>; |
Magnus Damm | c1f9597 | 2013-08-29 08:22:17 +0900 | [diff] [blame] | 89 | }; |
| 90 | |
| 91 | cpu3: cpu@3 { |
| 92 | device_type = "cpu"; |
| 93 | compatible = "arm,cortex-a15"; |
| 94 | reg = <3>; |
| 95 | clock-frequency = <1300000000>; |
Geert Uytterhoeven | aa4c2fd | 2017-10-12 11:35:10 +0200 | [diff] [blame] | 96 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 97 | power-domains = <&sysc R8A7790_PD_CA15_CPU3>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 98 | next-level-cache = <&L2_CA15>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 99 | capacity-dmips-mhz = <1024>; |
Magnus Damm | c1f9597 | 2013-08-29 08:22:17 +0900 | [diff] [blame] | 100 | }; |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 101 | |
Geert Uytterhoeven | 1eed15e | 2016-05-13 09:38:33 +0200 | [diff] [blame] | 102 | cpu4: cpu@100 { |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 103 | device_type = "cpu"; |
| 104 | compatible = "arm,cortex-a7"; |
| 105 | reg = <0x100>; |
| 106 | clock-frequency = <780000000>; |
Geert Uytterhoeven | aea0089 | 2017-10-12 11:35:11 +0200 | [diff] [blame] | 107 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 108 | power-domains = <&sysc R8A7790_PD_CA7_CPU0>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 109 | next-level-cache = <&L2_CA7>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 110 | capacity-dmips-mhz = <539>; |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 111 | }; |
| 112 | |
Geert Uytterhoeven | 1eed15e | 2016-05-13 09:38:33 +0200 | [diff] [blame] | 113 | cpu5: cpu@101 { |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 114 | device_type = "cpu"; |
| 115 | compatible = "arm,cortex-a7"; |
| 116 | reg = <0x101>; |
| 117 | clock-frequency = <780000000>; |
Geert Uytterhoeven | aea0089 | 2017-10-12 11:35:11 +0200 | [diff] [blame] | 118 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 119 | power-domains = <&sysc R8A7790_PD_CA7_CPU1>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 120 | next-level-cache = <&L2_CA7>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 121 | capacity-dmips-mhz = <539>; |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 122 | }; |
| 123 | |
Geert Uytterhoeven | 1eed15e | 2016-05-13 09:38:33 +0200 | [diff] [blame] | 124 | cpu6: cpu@102 { |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 125 | device_type = "cpu"; |
| 126 | compatible = "arm,cortex-a7"; |
| 127 | reg = <0x102>; |
| 128 | clock-frequency = <780000000>; |
Geert Uytterhoeven | aea0089 | 2017-10-12 11:35:11 +0200 | [diff] [blame] | 129 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 130 | power-domains = <&sysc R8A7790_PD_CA7_CPU2>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 131 | next-level-cache = <&L2_CA7>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 132 | capacity-dmips-mhz = <539>; |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 133 | }; |
| 134 | |
Geert Uytterhoeven | 1eed15e | 2016-05-13 09:38:33 +0200 | [diff] [blame] | 135 | cpu7: cpu@103 { |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 136 | device_type = "cpu"; |
| 137 | compatible = "arm,cortex-a7"; |
| 138 | reg = <0x103>; |
| 139 | clock-frequency = <780000000>; |
Geert Uytterhoeven | aea0089 | 2017-10-12 11:35:11 +0200 | [diff] [blame] | 140 | clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; |
Geert Uytterhoeven | 4c8eb3c | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 141 | power-domains = <&sysc R8A7790_PD_CA7_CPU3>; |
Geert Uytterhoeven | fb1cecd | 2015-06-02 14:31:39 +0200 | [diff] [blame] | 142 | next-level-cache = <&L2_CA7>; |
Dietmar Eggemann | 5bdc812 | 2017-08-30 15:41:20 +0100 | [diff] [blame] | 143 | capacity-dmips-mhz = <539>; |
Magnus Damm | 2007e74 | 2013-09-15 00:28:58 +0900 | [diff] [blame] | 144 | }; |
Geert Uytterhoeven | 2c3de36 | 2016-05-20 09:09:56 +0200 | [diff] [blame] | 145 | |
Geert Uytterhoeven | d492909 | 2017-03-06 17:40:39 +0100 | [diff] [blame] | 146 | L2_CA15: cache-controller-0 { |
Geert Uytterhoeven | 2c3de36 | 2016-05-20 09:09:56 +0200 | [diff] [blame] | 147 | compatible = "cache"; |
Geert Uytterhoeven | 2c3de36 | 2016-05-20 09:09:56 +0200 | [diff] [blame] | 148 | power-domains = <&sysc R8A7790_PD_CA15_SCU>; |
| 149 | cache-unified; |
| 150 | cache-level = <2>; |
| 151 | }; |
| 152 | |
Geert Uytterhoeven | d492909 | 2017-03-06 17:40:39 +0100 | [diff] [blame] | 153 | L2_CA7: cache-controller-1 { |
Geert Uytterhoeven | 2c3de36 | 2016-05-20 09:09:56 +0200 | [diff] [blame] | 154 | compatible = "cache"; |
Geert Uytterhoeven | 2c3de36 | 2016-05-20 09:09:56 +0200 | [diff] [blame] | 155 | power-domains = <&sysc R8A7790_PD_CA7_SCU>; |
| 156 | cache-unified; |
| 157 | cache-level = <2>; |
| 158 | }; |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 159 | }; |
| 160 | |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 161 | soc { |
| 162 | compatible = "simple-bus"; |
| 163 | interrupt-parent = <&gic>; |
| 164 | |
| 165 | #address-cells = <2>; |
| 166 | #size-cells = <2>; |
| 167 | ranges; |
| 168 | |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 169 | gpio0: gpio@e6050000 { |
| 170 | compatible = "renesas,gpio-r8a7790", |
| 171 | "renesas,rcar-gen2-gpio"; |
| 172 | reg = <0 0xe6050000 0 0x50>; |
| 173 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
| 174 | #gpio-cells = <2>; |
| 175 | gpio-controller; |
| 176 | gpio-ranges = <&pfc 0 0 32>; |
| 177 | #interrupt-cells = <2>; |
| 178 | interrupt-controller; |
| 179 | clocks = <&cpg CPG_MOD 912>; |
| 180 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 181 | resets = <&cpg 912>; |
| 182 | }; |
| 183 | |
| 184 | gpio1: gpio@e6051000 { |
| 185 | compatible = "renesas,gpio-r8a7790", |
| 186 | "renesas,rcar-gen2-gpio"; |
| 187 | reg = <0 0xe6051000 0 0x50>; |
| 188 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
| 189 | #gpio-cells = <2>; |
| 190 | gpio-controller; |
| 191 | gpio-ranges = <&pfc 0 32 30>; |
| 192 | #interrupt-cells = <2>; |
| 193 | interrupt-controller; |
| 194 | clocks = <&cpg CPG_MOD 911>; |
| 195 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 196 | resets = <&cpg 911>; |
| 197 | }; |
| 198 | |
| 199 | gpio2: gpio@e6052000 { |
| 200 | compatible = "renesas,gpio-r8a7790", |
| 201 | "renesas,rcar-gen2-gpio"; |
| 202 | reg = <0 0xe6052000 0 0x50>; |
| 203 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
| 204 | #gpio-cells = <2>; |
| 205 | gpio-controller; |
| 206 | gpio-ranges = <&pfc 0 64 30>; |
| 207 | #interrupt-cells = <2>; |
| 208 | interrupt-controller; |
| 209 | clocks = <&cpg CPG_MOD 910>; |
| 210 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 211 | resets = <&cpg 910>; |
| 212 | }; |
| 213 | |
| 214 | gpio3: gpio@e6053000 { |
| 215 | compatible = "renesas,gpio-r8a7790", |
| 216 | "renesas,rcar-gen2-gpio"; |
| 217 | reg = <0 0xe6053000 0 0x50>; |
| 218 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
| 219 | #gpio-cells = <2>; |
| 220 | gpio-controller; |
| 221 | gpio-ranges = <&pfc 0 96 32>; |
| 222 | #interrupt-cells = <2>; |
| 223 | interrupt-controller; |
| 224 | clocks = <&cpg CPG_MOD 909>; |
| 225 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 226 | resets = <&cpg 909>; |
| 227 | }; |
| 228 | |
| 229 | gpio4: gpio@e6054000 { |
| 230 | compatible = "renesas,gpio-r8a7790", |
| 231 | "renesas,rcar-gen2-gpio"; |
| 232 | reg = <0 0xe6054000 0 0x50>; |
| 233 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
| 234 | #gpio-cells = <2>; |
| 235 | gpio-controller; |
| 236 | gpio-ranges = <&pfc 0 128 32>; |
| 237 | #interrupt-cells = <2>; |
| 238 | interrupt-controller; |
| 239 | clocks = <&cpg CPG_MOD 908>; |
| 240 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 241 | resets = <&cpg 908>; |
| 242 | }; |
| 243 | |
| 244 | gpio5: gpio@e6055000 { |
| 245 | compatible = "renesas,gpio-r8a7790", |
| 246 | "renesas,rcar-gen2-gpio"; |
| 247 | reg = <0 0xe6055000 0 0x50>; |
| 248 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| 249 | #gpio-cells = <2>; |
| 250 | gpio-controller; |
| 251 | gpio-ranges = <&pfc 0 160 32>; |
| 252 | #interrupt-cells = <2>; |
| 253 | interrupt-controller; |
| 254 | clocks = <&cpg CPG_MOD 907>; |
| 255 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 256 | resets = <&cpg 907>; |
| 257 | }; |
| 258 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 259 | pfc: pin-controller@e6060000 { |
| 260 | compatible = "renesas,pfc-r8a7790"; |
| 261 | reg = <0 0xe6060000 0 0x250>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 262 | }; |
| 263 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 264 | cpg: clock-controller@e6150000 { |
| 265 | compatible = "renesas,r8a7790-cpg-mssr"; |
| 266 | reg = <0 0xe6150000 0 0x1000>; |
| 267 | clocks = <&extal_clk>, <&usb_extal_clk>; |
| 268 | clock-names = "extal", "usb_extal"; |
| 269 | #clock-cells = <2>; |
| 270 | #power-domain-cells = <0>; |
| 271 | #reset-cells = <1>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 272 | }; |
| 273 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 274 | apmu@e6151000 { |
| 275 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; |
| 276 | reg = <0 0xe6151000 0 0x188>; |
| 277 | cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; |
| 278 | }; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 279 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 280 | apmu@e6152000 { |
| 281 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; |
| 282 | reg = <0 0xe6152000 0 0x188>; |
| 283 | cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; |
| 284 | }; |
| 285 | |
| 286 | rst: reset-controller@e6160000 { |
| 287 | compatible = "renesas,r8a7790-rst"; |
| 288 | reg = <0 0xe6160000 0 0x0100>; |
| 289 | }; |
| 290 | |
| 291 | sysc: system-controller@e6180000 { |
| 292 | compatible = "renesas,r8a7790-sysc"; |
| 293 | reg = <0 0xe6180000 0 0x0200>; |
| 294 | #power-domain-cells = <1>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 295 | }; |
| 296 | |
| 297 | irqc0: interrupt-controller@e61c0000 { |
| 298 | compatible = "renesas,irqc-r8a7790", "renesas,irqc"; |
| 299 | #interrupt-cells = <2>; |
| 300 | interrupt-controller; |
| 301 | reg = <0 0xe61c0000 0 0x200>; |
| 302 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
| 303 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |
| 304 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, |
| 305 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; |
| 306 | clocks = <&cpg CPG_MOD 407>; |
| 307 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 308 | resets = <&cpg 407>; |
| 309 | }; |
| 310 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 311 | thermal: thermal@e61f0000 { |
| 312 | compatible = "renesas,thermal-r8a7790", |
| 313 | "renesas,rcar-gen2-thermal", |
| 314 | "renesas,rcar-thermal"; |
| 315 | reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; |
| 316 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
| 317 | clocks = <&cpg CPG_MOD 522>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 318 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 319 | resets = <&cpg 522>; |
| 320 | #thermal-sensor-cells = <0>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 321 | }; |
| 322 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 323 | ipmmu_sy0: mmu@e6280000 { |
| 324 | compatible = "renesas,ipmmu-r8a7790", |
| 325 | "renesas,ipmmu-vmsa"; |
| 326 | reg = <0 0xe6280000 0 0x1000>; |
| 327 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
| 328 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; |
| 329 | #iommu-cells = <1>; |
| 330 | status = "disabled"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 331 | }; |
| 332 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 333 | ipmmu_sy1: mmu@e6290000 { |
| 334 | compatible = "renesas,ipmmu-r8a7790", |
| 335 | "renesas,ipmmu-vmsa"; |
| 336 | reg = <0 0xe6290000 0 0x1000>; |
| 337 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
| 338 | #iommu-cells = <1>; |
| 339 | status = "disabled"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 340 | }; |
| 341 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 342 | ipmmu_ds: mmu@e6740000 { |
| 343 | compatible = "renesas,ipmmu-r8a7790", |
| 344 | "renesas,ipmmu-vmsa"; |
| 345 | reg = <0 0xe6740000 0 0x1000>; |
| 346 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
| 347 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; |
| 348 | #iommu-cells = <1>; |
| 349 | status = "disabled"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 350 | }; |
| 351 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 352 | ipmmu_mp: mmu@ec680000 { |
| 353 | compatible = "renesas,ipmmu-r8a7790", |
| 354 | "renesas,ipmmu-vmsa"; |
| 355 | reg = <0 0xec680000 0 0x1000>; |
| 356 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
| 357 | #iommu-cells = <1>; |
| 358 | status = "disabled"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 359 | }; |
| 360 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 361 | ipmmu_mx: mmu@fe951000 { |
| 362 | compatible = "renesas,ipmmu-r8a7790", |
| 363 | "renesas,ipmmu-vmsa"; |
| 364 | reg = <0 0xfe951000 0 0x1000>; |
| 365 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
| 366 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; |
| 367 | #iommu-cells = <1>; |
| 368 | status = "disabled"; |
| 369 | }; |
| 370 | |
| 371 | ipmmu_rt: mmu@ffc80000 { |
| 372 | compatible = "renesas,ipmmu-r8a7790", |
| 373 | "renesas,ipmmu-vmsa"; |
| 374 | reg = <0 0xffc80000 0 0x1000>; |
| 375 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; |
| 376 | #iommu-cells = <1>; |
| 377 | status = "disabled"; |
| 378 | }; |
| 379 | |
| 380 | icram0: sram@e63a0000 { |
| 381 | compatible = "mmio-sram"; |
| 382 | reg = <0 0xe63a0000 0 0x12000>; |
| 383 | }; |
| 384 | |
| 385 | icram1: sram@e63c0000 { |
| 386 | compatible = "mmio-sram"; |
| 387 | reg = <0 0xe63c0000 0 0x1000>; |
| 388 | #address-cells = <1>; |
| 389 | #size-cells = <1>; |
| 390 | ranges = <0 0 0xe63c0000 0x1000>; |
| 391 | |
| 392 | smp-sram@0 { |
| 393 | compatible = "renesas,smp-sram"; |
| 394 | reg = <0 0x10>; |
| 395 | }; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 396 | }; |
| 397 | |
| 398 | i2c0: i2c@e6508000 { |
| 399 | #address-cells = <1>; |
| 400 | #size-cells = <0>; |
| 401 | compatible = "renesas,i2c-r8a7790", |
| 402 | "renesas,rcar-gen2-i2c"; |
| 403 | reg = <0 0xe6508000 0 0x40>; |
| 404 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
| 405 | clocks = <&cpg CPG_MOD 931>; |
| 406 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 407 | resets = <&cpg 931>; |
| 408 | i2c-scl-internal-delay-ns = <110>; |
| 409 | status = "disabled"; |
| 410 | }; |
| 411 | |
| 412 | i2c1: i2c@e6518000 { |
| 413 | #address-cells = <1>; |
| 414 | #size-cells = <0>; |
| 415 | compatible = "renesas,i2c-r8a7790", |
| 416 | "renesas,rcar-gen2-i2c"; |
| 417 | reg = <0 0xe6518000 0 0x40>; |
| 418 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
| 419 | clocks = <&cpg CPG_MOD 930>; |
| 420 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 421 | resets = <&cpg 930>; |
| 422 | i2c-scl-internal-delay-ns = <6>; |
| 423 | status = "disabled"; |
| 424 | }; |
| 425 | |
| 426 | i2c2: i2c@e6530000 { |
| 427 | #address-cells = <1>; |
| 428 | #size-cells = <0>; |
| 429 | compatible = "renesas,i2c-r8a7790", |
| 430 | "renesas,rcar-gen2-i2c"; |
| 431 | reg = <0 0xe6530000 0 0x40>; |
| 432 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
| 433 | clocks = <&cpg CPG_MOD 929>; |
| 434 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 435 | resets = <&cpg 929>; |
| 436 | i2c-scl-internal-delay-ns = <6>; |
| 437 | status = "disabled"; |
| 438 | }; |
| 439 | |
| 440 | i2c3: i2c@e6540000 { |
| 441 | #address-cells = <1>; |
| 442 | #size-cells = <0>; |
| 443 | compatible = "renesas,i2c-r8a7790", |
| 444 | "renesas,rcar-gen2-i2c"; |
| 445 | reg = <0 0xe6540000 0 0x40>; |
| 446 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
| 447 | clocks = <&cpg CPG_MOD 928>; |
| 448 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 449 | resets = <&cpg 928>; |
| 450 | i2c-scl-internal-delay-ns = <110>; |
| 451 | status = "disabled"; |
| 452 | }; |
| 453 | |
| 454 | iic0: i2c@e6500000 { |
| 455 | #address-cells = <1>; |
| 456 | #size-cells = <0>; |
| 457 | compatible = "renesas,iic-r8a7790", |
| 458 | "renesas,rcar-gen2-iic", |
| 459 | "renesas,rmobile-iic"; |
| 460 | reg = <0 0xe6500000 0 0x425>; |
| 461 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
| 462 | clocks = <&cpg CPG_MOD 318>; |
| 463 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, |
| 464 | <&dmac1 0x61>, <&dmac1 0x62>; |
| 465 | dma-names = "tx", "rx", "tx", "rx"; |
| 466 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 467 | resets = <&cpg 318>; |
| 468 | status = "disabled"; |
| 469 | }; |
| 470 | |
| 471 | iic1: i2c@e6510000 { |
| 472 | #address-cells = <1>; |
| 473 | #size-cells = <0>; |
| 474 | compatible = "renesas,iic-r8a7790", |
| 475 | "renesas,rcar-gen2-iic", |
| 476 | "renesas,rmobile-iic"; |
| 477 | reg = <0 0xe6510000 0 0x425>; |
| 478 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
| 479 | clocks = <&cpg CPG_MOD 323>; |
| 480 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, |
| 481 | <&dmac1 0x65>, <&dmac1 0x66>; |
| 482 | dma-names = "tx", "rx", "tx", "rx"; |
| 483 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 484 | resets = <&cpg 323>; |
| 485 | status = "disabled"; |
| 486 | }; |
| 487 | |
| 488 | iic2: i2c@e6520000 { |
| 489 | #address-cells = <1>; |
| 490 | #size-cells = <0>; |
| 491 | compatible = "renesas,iic-r8a7790", |
| 492 | "renesas,rcar-gen2-iic", |
| 493 | "renesas,rmobile-iic"; |
| 494 | reg = <0 0xe6520000 0 0x425>; |
| 495 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
| 496 | clocks = <&cpg CPG_MOD 300>; |
| 497 | dmas = <&dmac0 0x69>, <&dmac0 0x6a>, |
| 498 | <&dmac1 0x69>, <&dmac1 0x6a>; |
| 499 | dma-names = "tx", "rx", "tx", "rx"; |
| 500 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 501 | resets = <&cpg 300>; |
| 502 | status = "disabled"; |
| 503 | }; |
| 504 | |
| 505 | iic3: i2c@e60b0000 { |
| 506 | #address-cells = <1>; |
| 507 | #size-cells = <0>; |
| 508 | compatible = "renesas,iic-r8a7790", |
| 509 | "renesas,rcar-gen2-iic", |
| 510 | "renesas,rmobile-iic"; |
| 511 | reg = <0 0xe60b0000 0 0x425>; |
| 512 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
| 513 | clocks = <&cpg CPG_MOD 926>; |
| 514 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, |
| 515 | <&dmac1 0x77>, <&dmac1 0x78>; |
| 516 | dma-names = "tx", "rx", "tx", "rx"; |
| 517 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 518 | resets = <&cpg 926>; |
| 519 | status = "disabled"; |
| 520 | }; |
| 521 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 522 | hsusb: usb@e6590000 { |
| 523 | compatible = "renesas,usbhs-r8a7790", |
| 524 | "renesas,rcar-gen2-usbhs"; |
| 525 | reg = <0 0xe6590000 0 0x100>; |
| 526 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
| 527 | clocks = <&cpg CPG_MOD 704>; |
| 528 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
| 529 | <&usb_dmac1 0>, <&usb_dmac1 1>; |
| 530 | dma-names = "ch0", "ch1", "ch2", "ch3"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 531 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 532 | resets = <&cpg 704>; |
| 533 | renesas,buswait = <4>; |
| 534 | phys = <&usb0 1>; |
| 535 | phy-names = "usb"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 536 | status = "disabled"; |
| 537 | }; |
| 538 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 539 | usbphy: usb-phy@e6590100 { |
| 540 | compatible = "renesas,usb-phy-r8a7790", |
| 541 | "renesas,rcar-gen2-usb-phy"; |
| 542 | reg = <0 0xe6590100 0 0x100>; |
| 543 | #address-cells = <1>; |
| 544 | #size-cells = <0>; |
| 545 | clocks = <&cpg CPG_MOD 704>; |
| 546 | clock-names = "usbhs"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 547 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 548 | resets = <&cpg 704>; |
| 549 | status = "disabled"; |
| 550 | |
| 551 | usb0: usb-channel@0 { |
| 552 | reg = <0>; |
| 553 | #phy-cells = <1>; |
| 554 | }; |
| 555 | usb2: usb-channel@2 { |
| 556 | reg = <2>; |
| 557 | #phy-cells = <1>; |
| 558 | }; |
| 559 | }; |
| 560 | |
| 561 | usb_dmac0: dma-controller@e65a0000 { |
| 562 | compatible = "renesas,r8a7790-usb-dmac", |
| 563 | "renesas,usb-dmac"; |
| 564 | reg = <0 0xe65a0000 0 0x100>; |
| 565 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH |
| 566 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; |
| 567 | interrupt-names = "ch0", "ch1"; |
| 568 | clocks = <&cpg CPG_MOD 330>; |
| 569 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 570 | resets = <&cpg 330>; |
| 571 | #dma-cells = <1>; |
| 572 | dma-channels = <2>; |
| 573 | }; |
| 574 | |
| 575 | usb_dmac1: dma-controller@e65b0000 { |
| 576 | compatible = "renesas,r8a7790-usb-dmac", |
| 577 | "renesas,usb-dmac"; |
| 578 | reg = <0 0xe65b0000 0 0x100>; |
| 579 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH |
| 580 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; |
| 581 | interrupt-names = "ch0", "ch1"; |
| 582 | clocks = <&cpg CPG_MOD 331>; |
| 583 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 584 | resets = <&cpg 331>; |
| 585 | #dma-cells = <1>; |
| 586 | dma-channels = <2>; |
| 587 | }; |
| 588 | |
| 589 | dmac0: dma-controller@e6700000 { |
| 590 | compatible = "renesas,dmac-r8a7790", |
| 591 | "renesas,rcar-dmac"; |
| 592 | reg = <0 0xe6700000 0 0x20000>; |
| 593 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
| 594 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH |
| 595 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH |
| 596 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH |
| 597 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH |
| 598 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH |
| 599 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH |
| 600 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH |
| 601 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH |
| 602 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH |
| 603 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH |
| 604 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH |
| 605 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH |
| 606 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH |
| 607 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH |
| 608 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; |
| 609 | interrupt-names = "error", |
| 610 | "ch0", "ch1", "ch2", "ch3", |
| 611 | "ch4", "ch5", "ch6", "ch7", |
| 612 | "ch8", "ch9", "ch10", "ch11", |
| 613 | "ch12", "ch13", "ch14"; |
| 614 | clocks = <&cpg CPG_MOD 219>; |
| 615 | clock-names = "fck"; |
| 616 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 617 | resets = <&cpg 219>; |
| 618 | #dma-cells = <1>; |
| 619 | dma-channels = <15>; |
| 620 | }; |
| 621 | |
| 622 | dmac1: dma-controller@e6720000 { |
| 623 | compatible = "renesas,dmac-r8a7790", |
| 624 | "renesas,rcar-dmac"; |
| 625 | reg = <0 0xe6720000 0 0x20000>; |
| 626 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
| 627 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH |
| 628 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH |
| 629 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH |
| 630 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH |
| 631 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH |
| 632 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH |
| 633 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH |
| 634 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH |
| 635 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH |
| 636 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH |
| 637 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH |
| 638 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH |
| 639 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH |
| 640 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH |
| 641 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; |
| 642 | interrupt-names = "error", |
| 643 | "ch0", "ch1", "ch2", "ch3", |
| 644 | "ch4", "ch5", "ch6", "ch7", |
| 645 | "ch8", "ch9", "ch10", "ch11", |
| 646 | "ch12", "ch13", "ch14"; |
| 647 | clocks = <&cpg CPG_MOD 218>; |
| 648 | clock-names = "fck"; |
| 649 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 650 | resets = <&cpg 218>; |
| 651 | #dma-cells = <1>; |
| 652 | dma-channels = <15>; |
| 653 | }; |
| 654 | |
| 655 | avb: ethernet@e6800000 { |
| 656 | compatible = "renesas,etheravb-r8a7790", |
| 657 | "renesas,etheravb-rcar-gen2"; |
| 658 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; |
| 659 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
| 660 | clocks = <&cpg CPG_MOD 812>; |
| 661 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 662 | resets = <&cpg 812>; |
| 663 | #address-cells = <1>; |
| 664 | #size-cells = <0>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 665 | status = "disabled"; |
| 666 | }; |
| 667 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 668 | qspi: spi@e6b10000 { |
| 669 | compatible = "renesas,qspi-r8a7790", "renesas,qspi"; |
| 670 | reg = <0 0xe6b10000 0 0x2c>; |
| 671 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
| 672 | clocks = <&cpg CPG_MOD 917>; |
| 673 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, |
| 674 | <&dmac1 0x17>, <&dmac1 0x18>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 675 | dma-names = "tx", "rx", "tx", "rx"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 676 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 677 | resets = <&cpg 917>; |
| 678 | num-cs = <1>; |
| 679 | #address-cells = <1>; |
| 680 | #size-cells = <0>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 681 | status = "disabled"; |
| 682 | }; |
| 683 | |
| 684 | scifa0: serial@e6c40000 { |
| 685 | compatible = "renesas,scifa-r8a7790", |
| 686 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
| 687 | reg = <0 0xe6c40000 0 64>; |
| 688 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
| 689 | clocks = <&cpg CPG_MOD 204>; |
| 690 | clock-names = "fck"; |
| 691 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, |
| 692 | <&dmac1 0x21>, <&dmac1 0x22>; |
| 693 | dma-names = "tx", "rx", "tx", "rx"; |
| 694 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 695 | resets = <&cpg 204>; |
| 696 | status = "disabled"; |
| 697 | }; |
| 698 | |
| 699 | scifa1: serial@e6c50000 { |
| 700 | compatible = "renesas,scifa-r8a7790", |
| 701 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
| 702 | reg = <0 0xe6c50000 0 64>; |
| 703 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
| 704 | clocks = <&cpg CPG_MOD 203>; |
| 705 | clock-names = "fck"; |
| 706 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, |
| 707 | <&dmac1 0x25>, <&dmac1 0x26>; |
| 708 | dma-names = "tx", "rx", "tx", "rx"; |
| 709 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 710 | resets = <&cpg 203>; |
| 711 | status = "disabled"; |
| 712 | }; |
| 713 | |
| 714 | scifa2: serial@e6c60000 { |
| 715 | compatible = "renesas,scifa-r8a7790", |
| 716 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
| 717 | reg = <0 0xe6c60000 0 64>; |
| 718 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
| 719 | clocks = <&cpg CPG_MOD 202>; |
| 720 | clock-names = "fck"; |
| 721 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, |
| 722 | <&dmac1 0x27>, <&dmac1 0x28>; |
| 723 | dma-names = "tx", "rx", "tx", "rx"; |
| 724 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 725 | resets = <&cpg 202>; |
| 726 | status = "disabled"; |
| 727 | }; |
| 728 | |
| 729 | scifb0: serial@e6c20000 { |
| 730 | compatible = "renesas,scifb-r8a7790", |
| 731 | "renesas,rcar-gen2-scifb", "renesas,scifb"; |
| 732 | reg = <0 0xe6c20000 0 0x100>; |
| 733 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
| 734 | clocks = <&cpg CPG_MOD 206>; |
| 735 | clock-names = "fck"; |
| 736 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, |
| 737 | <&dmac1 0x3d>, <&dmac1 0x3e>; |
| 738 | dma-names = "tx", "rx", "tx", "rx"; |
| 739 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 740 | resets = <&cpg 206>; |
| 741 | status = "disabled"; |
| 742 | }; |
| 743 | |
| 744 | scifb1: serial@e6c30000 { |
| 745 | compatible = "renesas,scifb-r8a7790", |
| 746 | "renesas,rcar-gen2-scifb", "renesas,scifb"; |
| 747 | reg = <0 0xe6c30000 0 0x100>; |
| 748 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
| 749 | clocks = <&cpg CPG_MOD 207>; |
| 750 | clock-names = "fck"; |
| 751 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, |
| 752 | <&dmac1 0x19>, <&dmac1 0x1a>; |
| 753 | dma-names = "tx", "rx", "tx", "rx"; |
| 754 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 755 | resets = <&cpg 207>; |
| 756 | status = "disabled"; |
| 757 | }; |
| 758 | |
| 759 | scifb2: serial@e6ce0000 { |
| 760 | compatible = "renesas,scifb-r8a7790", |
| 761 | "renesas,rcar-gen2-scifb", "renesas,scifb"; |
| 762 | reg = <0 0xe6ce0000 0 0x100>; |
| 763 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
| 764 | clocks = <&cpg CPG_MOD 216>; |
| 765 | clock-names = "fck"; |
| 766 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, |
| 767 | <&dmac1 0x1d>, <&dmac1 0x1e>; |
| 768 | dma-names = "tx", "rx", "tx", "rx"; |
| 769 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 770 | resets = <&cpg 216>; |
| 771 | status = "disabled"; |
| 772 | }; |
| 773 | |
| 774 | scif0: serial@e6e60000 { |
| 775 | compatible = "renesas,scif-r8a7790", |
| 776 | "renesas,rcar-gen2-scif", |
| 777 | "renesas,scif"; |
| 778 | reg = <0 0xe6e60000 0 64>; |
| 779 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
| 780 | clocks = <&cpg CPG_MOD 721>, |
| 781 | <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; |
| 782 | clock-names = "fck", "brg_int", "scif_clk"; |
| 783 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, |
| 784 | <&dmac1 0x29>, <&dmac1 0x2a>; |
| 785 | dma-names = "tx", "rx", "tx", "rx"; |
| 786 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 787 | resets = <&cpg 721>; |
| 788 | status = "disabled"; |
| 789 | }; |
| 790 | |
| 791 | scif1: serial@e6e68000 { |
| 792 | compatible = "renesas,scif-r8a7790", |
| 793 | "renesas,rcar-gen2-scif", |
| 794 | "renesas,scif"; |
| 795 | reg = <0 0xe6e68000 0 64>; |
| 796 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
| 797 | clocks = <&cpg CPG_MOD 720>, |
| 798 | <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; |
| 799 | clock-names = "fck", "brg_int", "scif_clk"; |
| 800 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, |
| 801 | <&dmac1 0x2d>, <&dmac1 0x2e>; |
| 802 | dma-names = "tx", "rx", "tx", "rx"; |
| 803 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 804 | resets = <&cpg 720>; |
| 805 | status = "disabled"; |
| 806 | }; |
| 807 | |
| 808 | scif2: serial@e6e56000 { |
| 809 | compatible = "renesas,scif-r8a7790", |
| 810 | "renesas,rcar-gen2-scif", |
| 811 | "renesas,scif"; |
| 812 | reg = <0 0xe6e56000 0 64>; |
| 813 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; |
| 814 | clocks = <&cpg CPG_MOD 310>, |
| 815 | <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; |
| 816 | clock-names = "fck", "brg_int", "scif_clk"; |
| 817 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, |
| 818 | <&dmac1 0x2b>, <&dmac1 0x2c>; |
| 819 | dma-names = "tx", "rx", "tx", "rx"; |
| 820 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 821 | resets = <&cpg 310>; |
| 822 | status = "disabled"; |
| 823 | }; |
| 824 | |
| 825 | hscif0: serial@e62c0000 { |
| 826 | compatible = "renesas,hscif-r8a7790", |
| 827 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
| 828 | reg = <0 0xe62c0000 0 96>; |
| 829 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
| 830 | clocks = <&cpg CPG_MOD 717>, |
| 831 | <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; |
| 832 | clock-names = "fck", "brg_int", "scif_clk"; |
| 833 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, |
| 834 | <&dmac1 0x39>, <&dmac1 0x3a>; |
| 835 | dma-names = "tx", "rx", "tx", "rx"; |
| 836 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 837 | resets = <&cpg 717>; |
| 838 | status = "disabled"; |
| 839 | }; |
| 840 | |
| 841 | hscif1: serial@e62c8000 { |
| 842 | compatible = "renesas,hscif-r8a7790", |
| 843 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
| 844 | reg = <0 0xe62c8000 0 96>; |
| 845 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
| 846 | clocks = <&cpg CPG_MOD 716>, |
| 847 | <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; |
| 848 | clock-names = "fck", "brg_int", "scif_clk"; |
| 849 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, |
| 850 | <&dmac1 0x4d>, <&dmac1 0x4e>; |
| 851 | dma-names = "tx", "rx", "tx", "rx"; |
| 852 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 853 | resets = <&cpg 716>; |
| 854 | status = "disabled"; |
| 855 | }; |
| 856 | |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 857 | msiof0: spi@e6e20000 { |
| 858 | compatible = "renesas,msiof-r8a7790", |
| 859 | "renesas,rcar-gen2-msiof"; |
| 860 | reg = <0 0xe6e20000 0 0x0064>; |
| 861 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
| 862 | clocks = <&cpg CPG_MOD 0>; |
| 863 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, |
| 864 | <&dmac1 0x51>, <&dmac1 0x52>; |
| 865 | dma-names = "tx", "rx", "tx", "rx"; |
| 866 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 867 | resets = <&cpg 0>; |
| 868 | #address-cells = <1>; |
| 869 | #size-cells = <0>; |
| 870 | status = "disabled"; |
| 871 | }; |
| 872 | |
| 873 | msiof1: spi@e6e10000 { |
| 874 | compatible = "renesas,msiof-r8a7790", |
| 875 | "renesas,rcar-gen2-msiof"; |
| 876 | reg = <0 0xe6e10000 0 0x0064>; |
| 877 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
| 878 | clocks = <&cpg CPG_MOD 208>; |
| 879 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, |
| 880 | <&dmac1 0x55>, <&dmac1 0x56>; |
| 881 | dma-names = "tx", "rx", "tx", "rx"; |
| 882 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 883 | resets = <&cpg 208>; |
| 884 | #address-cells = <1>; |
| 885 | #size-cells = <0>; |
| 886 | status = "disabled"; |
| 887 | }; |
| 888 | |
| 889 | msiof2: spi@e6e00000 { |
| 890 | compatible = "renesas,msiof-r8a7790", |
| 891 | "renesas,rcar-gen2-msiof"; |
| 892 | reg = <0 0xe6e00000 0 0x0064>; |
| 893 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
| 894 | clocks = <&cpg CPG_MOD 205>; |
| 895 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, |
| 896 | <&dmac1 0x41>, <&dmac1 0x42>; |
| 897 | dma-names = "tx", "rx", "tx", "rx"; |
| 898 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 899 | resets = <&cpg 205>; |
| 900 | #address-cells = <1>; |
| 901 | #size-cells = <0>; |
| 902 | status = "disabled"; |
| 903 | }; |
| 904 | |
| 905 | msiof3: spi@e6c90000 { |
| 906 | compatible = "renesas,msiof-r8a7790", |
| 907 | "renesas,rcar-gen2-msiof"; |
| 908 | reg = <0 0xe6c90000 0 0x0064>; |
| 909 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
| 910 | clocks = <&cpg CPG_MOD 215>; |
| 911 | dmas = <&dmac0 0x45>, <&dmac0 0x46>, |
| 912 | <&dmac1 0x45>, <&dmac1 0x46>; |
| 913 | dma-names = "tx", "rx", "tx", "rx"; |
| 914 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 915 | resets = <&cpg 215>; |
| 916 | #address-cells = <1>; |
| 917 | #size-cells = <0>; |
| 918 | status = "disabled"; |
| 919 | }; |
| 920 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 921 | can0: can@e6e80000 { |
| 922 | compatible = "renesas,can-r8a7790", |
| 923 | "renesas,rcar-gen2-can"; |
| 924 | reg = <0 0xe6e80000 0 0x1000>; |
| 925 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
| 926 | clocks = <&cpg CPG_MOD 916>, |
| 927 | <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; |
| 928 | clock-names = "clkp1", "clkp2", "can_clk"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 929 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 930 | resets = <&cpg 916>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 931 | status = "disabled"; |
| 932 | }; |
| 933 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 934 | can1: can@e6e88000 { |
| 935 | compatible = "renesas,can-r8a7790", |
| 936 | "renesas,rcar-gen2-can"; |
| 937 | reg = <0 0xe6e88000 0 0x1000>; |
| 938 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
| 939 | clocks = <&cpg CPG_MOD 915>, |
| 940 | <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; |
| 941 | clock-names = "clkp1", "clkp2", "can_clk"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 942 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 943 | resets = <&cpg 915>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 944 | status = "disabled"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 945 | }; |
| 946 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 947 | vin0: video@e6ef0000 { |
| 948 | compatible = "renesas,vin-r8a7790", |
| 949 | "renesas,rcar-gen2-vin"; |
| 950 | reg = <0 0xe6ef0000 0 0x1000>; |
| 951 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
| 952 | clocks = <&cpg CPG_MOD 811>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 953 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 954 | resets = <&cpg 811>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 955 | status = "disabled"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 956 | }; |
| 957 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 958 | vin1: video@e6ef1000 { |
| 959 | compatible = "renesas,vin-r8a7790", |
| 960 | "renesas,rcar-gen2-vin"; |
| 961 | reg = <0 0xe6ef1000 0 0x1000>; |
| 962 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
| 963 | clocks = <&cpg CPG_MOD 810>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 964 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 965 | resets = <&cpg 810>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 966 | status = "disabled"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 967 | }; |
| 968 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 969 | vin2: video@e6ef2000 { |
| 970 | compatible = "renesas,vin-r8a7790", |
| 971 | "renesas,rcar-gen2-vin"; |
| 972 | reg = <0 0xe6ef2000 0 0x1000>; |
| 973 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
| 974 | clocks = <&cpg CPG_MOD 809>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 975 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 976 | resets = <&cpg 809>; |
| 977 | status = "disabled"; |
| 978 | }; |
| 979 | |
| 980 | vin3: video@e6ef3000 { |
| 981 | compatible = "renesas,vin-r8a7790", |
| 982 | "renesas,rcar-gen2-vin"; |
| 983 | reg = <0 0xe6ef3000 0 0x1000>; |
| 984 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
| 985 | clocks = <&cpg CPG_MOD 808>; |
| 986 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 987 | resets = <&cpg 808>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 988 | status = "disabled"; |
| 989 | }; |
| 990 | |
| 991 | rcar_sound: sound@ec500000 { |
| 992 | /* |
| 993 | * #sound-dai-cells is required |
| 994 | * |
| 995 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; |
| 996 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; |
| 997 | */ |
| 998 | compatible = "renesas,rcar_sound-r8a7790", |
| 999 | "renesas,rcar_sound-gen2"; |
| 1000 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
| 1001 | <0 0xec5a0000 0 0x100>, /* ADG */ |
| 1002 | <0 0xec540000 0 0x1000>, /* SSIU */ |
| 1003 | <0 0xec541000 0 0x280>, /* SSI */ |
| 1004 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ |
| 1005 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; |
| 1006 | |
| 1007 | clocks = <&cpg CPG_MOD 1005>, |
| 1008 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, |
| 1009 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, |
| 1010 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, |
| 1011 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, |
| 1012 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, |
| 1013 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| 1014 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, |
| 1015 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, |
| 1016 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, |
| 1017 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, |
| 1018 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, |
| 1019 | <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, |
| 1020 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| 1021 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, |
| 1022 | <&cpg CPG_CORE R8A7790_CLK_M2>; |
| 1023 | clock-names = "ssi-all", |
| 1024 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", |
| 1025 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", |
| 1026 | "ssi.1", "ssi.0", |
| 1027 | "src.9", "src.8", "src.7", "src.6", |
| 1028 | "src.5", "src.4", "src.3", "src.2", |
| 1029 | "src.1", "src.0", |
| 1030 | "ctu.0", "ctu.1", |
| 1031 | "mix.0", "mix.1", |
| 1032 | "dvc.0", "dvc.1", |
| 1033 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 1034 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1035 | resets = <&cpg 1005>, |
| 1036 | <&cpg 1006>, <&cpg 1007>, |
| 1037 | <&cpg 1008>, <&cpg 1009>, |
| 1038 | <&cpg 1010>, <&cpg 1011>, |
| 1039 | <&cpg 1012>, <&cpg 1013>, |
| 1040 | <&cpg 1014>, <&cpg 1015>; |
| 1041 | reset-names = "ssi-all", |
| 1042 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", |
| 1043 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", |
| 1044 | "ssi.1", "ssi.0"; |
| 1045 | |
| 1046 | status = "disabled"; |
| 1047 | |
| 1048 | rcar_sound,dvc { |
| 1049 | dvc0: dvc-0 { |
| 1050 | dmas = <&audma1 0xbc>; |
| 1051 | dma-names = "tx"; |
| 1052 | }; |
| 1053 | dvc1: dvc-1 { |
| 1054 | dmas = <&audma1 0xbe>; |
| 1055 | dma-names = "tx"; |
| 1056 | }; |
| 1057 | }; |
| 1058 | |
| 1059 | rcar_sound,mix { |
| 1060 | mix0: mix-0 { }; |
| 1061 | mix1: mix-1 { }; |
| 1062 | }; |
| 1063 | |
| 1064 | rcar_sound,ctu { |
| 1065 | ctu00: ctu-0 { }; |
| 1066 | ctu01: ctu-1 { }; |
| 1067 | ctu02: ctu-2 { }; |
| 1068 | ctu03: ctu-3 { }; |
| 1069 | ctu10: ctu-4 { }; |
| 1070 | ctu11: ctu-5 { }; |
| 1071 | ctu12: ctu-6 { }; |
| 1072 | ctu13: ctu-7 { }; |
| 1073 | }; |
| 1074 | |
| 1075 | rcar_sound,src { |
| 1076 | src0: src-0 { |
| 1077 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
| 1078 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
| 1079 | dma-names = "rx", "tx"; |
| 1080 | }; |
| 1081 | src1: src-1 { |
| 1082 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
| 1083 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
| 1084 | dma-names = "rx", "tx"; |
| 1085 | }; |
| 1086 | src2: src-2 { |
| 1087 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
| 1088 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
| 1089 | dma-names = "rx", "tx"; |
| 1090 | }; |
| 1091 | src3: src-3 { |
| 1092 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
| 1093 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
| 1094 | dma-names = "rx", "tx"; |
| 1095 | }; |
| 1096 | src4: src-4 { |
| 1097 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
| 1098 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
| 1099 | dma-names = "rx", "tx"; |
| 1100 | }; |
| 1101 | src5: src-5 { |
| 1102 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
| 1103 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
| 1104 | dma-names = "rx", "tx"; |
| 1105 | }; |
| 1106 | src6: src-6 { |
| 1107 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
| 1108 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
| 1109 | dma-names = "rx", "tx"; |
| 1110 | }; |
| 1111 | src7: src-7 { |
| 1112 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
| 1113 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
| 1114 | dma-names = "rx", "tx"; |
| 1115 | }; |
| 1116 | src8: src-8 { |
| 1117 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
| 1118 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
| 1119 | dma-names = "rx", "tx"; |
| 1120 | }; |
| 1121 | src9: src-9 { |
| 1122 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
| 1123 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
| 1124 | dma-names = "rx", "tx"; |
| 1125 | }; |
| 1126 | }; |
| 1127 | |
| 1128 | rcar_sound,ssi { |
| 1129 | ssi0: ssi-0 { |
| 1130 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
| 1131 | dmas = <&audma0 0x01>, <&audma1 0x02>, |
| 1132 | <&audma0 0x15>, <&audma1 0x16>; |
| 1133 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1134 | }; |
| 1135 | ssi1: ssi-1 { |
| 1136 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
| 1137 | dmas = <&audma0 0x03>, <&audma1 0x04>, |
| 1138 | <&audma0 0x49>, <&audma1 0x4a>; |
| 1139 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1140 | }; |
| 1141 | ssi2: ssi-2 { |
| 1142 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
| 1143 | dmas = <&audma0 0x05>, <&audma1 0x06>, |
| 1144 | <&audma0 0x63>, <&audma1 0x64>; |
| 1145 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1146 | }; |
| 1147 | ssi3: ssi-3 { |
| 1148 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
| 1149 | dmas = <&audma0 0x07>, <&audma1 0x08>, |
| 1150 | <&audma0 0x6f>, <&audma1 0x70>; |
| 1151 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1152 | }; |
| 1153 | ssi4: ssi-4 { |
| 1154 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
| 1155 | dmas = <&audma0 0x09>, <&audma1 0x0a>, |
| 1156 | <&audma0 0x71>, <&audma1 0x72>; |
| 1157 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1158 | }; |
| 1159 | ssi5: ssi-5 { |
| 1160 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
| 1161 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, |
| 1162 | <&audma0 0x73>, <&audma1 0x74>; |
| 1163 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1164 | }; |
| 1165 | ssi6: ssi-6 { |
| 1166 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
| 1167 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, |
| 1168 | <&audma0 0x75>, <&audma1 0x76>; |
| 1169 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1170 | }; |
| 1171 | ssi7: ssi-7 { |
| 1172 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
| 1173 | dmas = <&audma0 0x0f>, <&audma1 0x10>, |
| 1174 | <&audma0 0x79>, <&audma1 0x7a>; |
| 1175 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1176 | }; |
| 1177 | ssi8: ssi-8 { |
| 1178 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
| 1179 | dmas = <&audma0 0x11>, <&audma1 0x12>, |
| 1180 | <&audma0 0x7b>, <&audma1 0x7c>; |
| 1181 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1182 | }; |
| 1183 | ssi9: ssi-9 { |
| 1184 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
| 1185 | dmas = <&audma0 0x13>, <&audma1 0x14>, |
| 1186 | <&audma0 0x7d>, <&audma1 0x7e>; |
| 1187 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1188 | }; |
| 1189 | }; |
| 1190 | }; |
| 1191 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 1192 | audma0: dma-controller@ec700000 { |
| 1193 | compatible = "renesas,dmac-r8a7790", |
| 1194 | "renesas,rcar-dmac"; |
| 1195 | reg = <0 0xec700000 0 0x10000>; |
| 1196 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH |
| 1197 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH |
| 1198 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH |
| 1199 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH |
| 1200 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH |
| 1201 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH |
| 1202 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH |
| 1203 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH |
| 1204 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH |
| 1205 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH |
| 1206 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH |
| 1207 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH |
| 1208 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH |
| 1209 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; |
| 1210 | interrupt-names = "error", |
| 1211 | "ch0", "ch1", "ch2", "ch3", |
| 1212 | "ch4", "ch5", "ch6", "ch7", |
| 1213 | "ch8", "ch9", "ch10", "ch11", |
| 1214 | "ch12"; |
| 1215 | clocks = <&cpg CPG_MOD 502>; |
| 1216 | clock-names = "fck"; |
| 1217 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1218 | resets = <&cpg 502>; |
| 1219 | #dma-cells = <1>; |
| 1220 | dma-channels = <13>; |
| 1221 | }; |
| 1222 | |
| 1223 | audma1: dma-controller@ec720000 { |
| 1224 | compatible = "renesas,dmac-r8a7790", |
| 1225 | "renesas,rcar-dmac"; |
| 1226 | reg = <0 0xec720000 0 0x10000>; |
| 1227 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH |
| 1228 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH |
| 1229 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH |
| 1230 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH |
| 1231 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH |
| 1232 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH |
| 1233 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH |
| 1234 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH |
| 1235 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH |
| 1236 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH |
| 1237 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH |
| 1238 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH |
| 1239 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH |
| 1240 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; |
| 1241 | interrupt-names = "error", |
| 1242 | "ch0", "ch1", "ch2", "ch3", |
| 1243 | "ch4", "ch5", "ch6", "ch7", |
| 1244 | "ch8", "ch9", "ch10", "ch11", |
| 1245 | "ch12"; |
| 1246 | clocks = <&cpg CPG_MOD 501>; |
| 1247 | clock-names = "fck"; |
| 1248 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1249 | resets = <&cpg 501>; |
| 1250 | #dma-cells = <1>; |
| 1251 | dma-channels = <13>; |
| 1252 | }; |
| 1253 | |
| 1254 | xhci: usb@ee000000 { |
| 1255 | compatible = "renesas,xhci-r8a7790", |
| 1256 | "renesas,rcar-gen2-xhci"; |
| 1257 | reg = <0 0xee000000 0 0xc00>; |
| 1258 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
| 1259 | clocks = <&cpg CPG_MOD 328>; |
| 1260 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1261 | resets = <&cpg 328>; |
| 1262 | phys = <&usb2 1>; |
| 1263 | phy-names = "usb"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 1264 | status = "disabled"; |
| 1265 | }; |
| 1266 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 1267 | pci0: pci@ee090000 { |
| 1268 | compatible = "renesas,pci-r8a7790", |
| 1269 | "renesas,pci-rcar-gen2"; |
| 1270 | device_type = "pci"; |
| 1271 | reg = <0 0xee090000 0 0xc00>, |
| 1272 | <0 0xee080000 0 0x1100>; |
| 1273 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
| 1274 | clocks = <&cpg CPG_MOD 703>; |
| 1275 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1276 | resets = <&cpg 703>; |
| 1277 | status = "disabled"; |
| 1278 | |
| 1279 | bus-range = <0 0>; |
| 1280 | #address-cells = <3>; |
| 1281 | #size-cells = <2>; |
| 1282 | #interrupt-cells = <1>; |
| 1283 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; |
| 1284 | interrupt-map-mask = <0xff00 0 0 0x7>; |
| 1285 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
| 1286 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
| 1287 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
| 1288 | |
| 1289 | usb@1,0 { |
| 1290 | reg = <0x800 0 0 0 0>; |
| 1291 | phys = <&usb0 0>; |
| 1292 | phy-names = "usb"; |
| 1293 | }; |
| 1294 | |
| 1295 | usb@2,0 { |
| 1296 | reg = <0x1000 0 0 0 0>; |
| 1297 | phys = <&usb0 0>; |
| 1298 | phy-names = "usb"; |
| 1299 | }; |
| 1300 | }; |
| 1301 | |
| 1302 | pci1: pci@ee0b0000 { |
| 1303 | compatible = "renesas,pci-r8a7790", |
| 1304 | "renesas,pci-rcar-gen2"; |
| 1305 | device_type = "pci"; |
| 1306 | reg = <0 0xee0b0000 0 0xc00>, |
| 1307 | <0 0xee0a0000 0 0x1100>; |
| 1308 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 1309 | clocks = <&cpg CPG_MOD 703>; |
| 1310 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1311 | resets = <&cpg 703>; |
| 1312 | status = "disabled"; |
| 1313 | |
| 1314 | bus-range = <1 1>; |
| 1315 | #address-cells = <3>; |
| 1316 | #size-cells = <2>; |
| 1317 | #interrupt-cells = <1>; |
| 1318 | ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; |
| 1319 | interrupt-map-mask = <0xff00 0 0 0x7>; |
| 1320 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH |
| 1321 | 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH |
| 1322 | 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 1323 | }; |
| 1324 | |
| 1325 | pci2: pci@ee0d0000 { |
| 1326 | compatible = "renesas,pci-r8a7790", |
| 1327 | "renesas,pci-rcar-gen2"; |
| 1328 | device_type = "pci"; |
| 1329 | clocks = <&cpg CPG_MOD 703>; |
| 1330 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1331 | resets = <&cpg 703>; |
| 1332 | reg = <0 0xee0d0000 0 0xc00>, |
| 1333 | <0 0xee0c0000 0 0x1100>; |
| 1334 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
| 1335 | status = "disabled"; |
| 1336 | |
| 1337 | bus-range = <2 2>; |
| 1338 | #address-cells = <3>; |
| 1339 | #size-cells = <2>; |
| 1340 | #interrupt-cells = <1>; |
| 1341 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; |
| 1342 | interrupt-map-mask = <0xff00 0 0 0x7>; |
| 1343 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
| 1344 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
| 1345 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
| 1346 | |
| 1347 | usb@1,0 { |
| 1348 | reg = <0x20800 0 0 0 0>; |
| 1349 | phys = <&usb2 0>; |
| 1350 | phy-names = "usb"; |
| 1351 | }; |
| 1352 | |
| 1353 | usb@2,0 { |
| 1354 | reg = <0x21000 0 0 0 0>; |
| 1355 | phys = <&usb2 0>; |
| 1356 | phy-names = "usb"; |
| 1357 | }; |
| 1358 | }; |
| 1359 | |
| 1360 | sdhi0: sd@ee100000 { |
| 1361 | compatible = "renesas,sdhi-r8a7790", |
| 1362 | "renesas,rcar-gen2-sdhi"; |
| 1363 | reg = <0 0xee100000 0 0x328>; |
| 1364 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
| 1365 | clocks = <&cpg CPG_MOD 314>; |
| 1366 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, |
| 1367 | <&dmac1 0xcd>, <&dmac1 0xce>; |
| 1368 | dma-names = "tx", "rx", "tx", "rx"; |
| 1369 | max-frequency = <195000000>; |
| 1370 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1371 | resets = <&cpg 314>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 1372 | status = "disabled"; |
| 1373 | }; |
| 1374 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 1375 | sdhi1: sd@ee120000 { |
| 1376 | compatible = "renesas,sdhi-r8a7790", |
| 1377 | "renesas,rcar-gen2-sdhi"; |
| 1378 | reg = <0 0xee120000 0 0x328>; |
| 1379 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
| 1380 | clocks = <&cpg CPG_MOD 313>; |
| 1381 | dmas = <&dmac0 0xc9>, <&dmac0 0xca>, |
| 1382 | <&dmac1 0xc9>, <&dmac1 0xca>; |
| 1383 | dma-names = "tx", "rx", "tx", "rx"; |
| 1384 | max-frequency = <195000000>; |
| 1385 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1386 | resets = <&cpg 313>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 1387 | status = "disabled"; |
| 1388 | }; |
| 1389 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 1390 | sdhi2: sd@ee140000 { |
| 1391 | compatible = "renesas,sdhi-r8a7790", |
| 1392 | "renesas,rcar-gen2-sdhi"; |
| 1393 | reg = <0 0xee140000 0 0x100>; |
| 1394 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
| 1395 | clocks = <&cpg CPG_MOD 312>; |
| 1396 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, |
| 1397 | <&dmac1 0xc1>, <&dmac1 0xc2>; |
| 1398 | dma-names = "tx", "rx", "tx", "rx"; |
| 1399 | max-frequency = <97500000>; |
| 1400 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1401 | resets = <&cpg 312>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 1402 | status = "disabled"; |
| 1403 | }; |
| 1404 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 1405 | sdhi3: sd@ee160000 { |
| 1406 | compatible = "renesas,sdhi-r8a7790", |
| 1407 | "renesas,rcar-gen2-sdhi"; |
| 1408 | reg = <0 0xee160000 0 0x100>; |
| 1409 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
| 1410 | clocks = <&cpg CPG_MOD 311>; |
| 1411 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, |
| 1412 | <&dmac1 0xd3>, <&dmac1 0xd4>; |
| 1413 | dma-names = "tx", "rx", "tx", "rx"; |
| 1414 | max-frequency = <97500000>; |
| 1415 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1416 | resets = <&cpg 311>; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 1417 | status = "disabled"; |
| 1418 | }; |
| 1419 | |
Simon Horman | 5923abc | 2018-01-17 17:17:04 +0100 | [diff] [blame^] | 1420 | mmcif0: mmc@ee200000 { |
| 1421 | compatible = "renesas,mmcif-r8a7790", |
| 1422 | "renesas,sh-mmcif"; |
| 1423 | reg = <0 0xee200000 0 0x80>; |
| 1424 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
| 1425 | clocks = <&cpg CPG_MOD 315>; |
| 1426 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, |
| 1427 | <&dmac1 0xd1>, <&dmac1 0xd2>; |
| 1428 | dma-names = "tx", "rx", "tx", "rx"; |
| 1429 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1430 | resets = <&cpg 315>; |
| 1431 | reg-io-width = <4>; |
| 1432 | status = "disabled"; |
| 1433 | max-frequency = <97500000>; |
| 1434 | }; |
| 1435 | |
| 1436 | mmcif1: mmc@ee220000 { |
| 1437 | compatible = "renesas,mmcif-r8a7790", |
| 1438 | "renesas,sh-mmcif"; |
| 1439 | reg = <0 0xee220000 0 0x80>; |
| 1440 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
| 1441 | clocks = <&cpg CPG_MOD 305>; |
| 1442 | dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, |
| 1443 | <&dmac1 0xe1>, <&dmac1 0xe2>; |
| 1444 | dma-names = "tx", "rx", "tx", "rx"; |
| 1445 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1446 | resets = <&cpg 305>; |
| 1447 | reg-io-width = <4>; |
| 1448 | status = "disabled"; |
| 1449 | max-frequency = <97500000>; |
| 1450 | }; |
| 1451 | |
| 1452 | sata0: sata@ee300000 { |
| 1453 | compatible = "renesas,sata-r8a7790", |
| 1454 | "renesas,rcar-gen2-sata"; |
| 1455 | reg = <0 0xee300000 0 0x2000>; |
| 1456 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
| 1457 | clocks = <&cpg CPG_MOD 815>; |
| 1458 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1459 | resets = <&cpg 815>; |
| 1460 | status = "disabled"; |
| 1461 | }; |
| 1462 | |
| 1463 | sata1: sata@ee500000 { |
| 1464 | compatible = "renesas,sata-r8a7790", |
| 1465 | "renesas,rcar-gen2-sata"; |
| 1466 | reg = <0 0xee500000 0 0x2000>; |
| 1467 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
| 1468 | clocks = <&cpg CPG_MOD 814>; |
| 1469 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1470 | resets = <&cpg 814>; |
| 1471 | status = "disabled"; |
| 1472 | }; |
| 1473 | |
| 1474 | ether: ethernet@ee700000 { |
| 1475 | compatible = "renesas,ether-r8a7790", |
| 1476 | "renesas,rcar-gen2-ether"; |
| 1477 | reg = <0 0xee700000 0 0x400>; |
| 1478 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
| 1479 | clocks = <&cpg CPG_MOD 813>; |
| 1480 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1481 | resets = <&cpg 813>; |
| 1482 | phy-mode = "rmii"; |
| 1483 | #address-cells = <1>; |
| 1484 | #size-cells = <0>; |
| 1485 | status = "disabled"; |
| 1486 | }; |
| 1487 | |
| 1488 | gic: interrupt-controller@f1001000 { |
| 1489 | compatible = "arm,gic-400"; |
| 1490 | #interrupt-cells = <3>; |
| 1491 | #address-cells = <0>; |
| 1492 | interrupt-controller; |
| 1493 | reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, |
| 1494 | <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; |
| 1495 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| 1496 | clocks = <&cpg CPG_MOD 408>; |
| 1497 | clock-names = "clk"; |
| 1498 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1499 | resets = <&cpg 408>; |
| 1500 | }; |
| 1501 | |
| 1502 | pciec: pcie@fe000000 { |
| 1503 | compatible = "renesas,pcie-r8a7790", |
| 1504 | "renesas,pcie-rcar-gen2"; |
| 1505 | reg = <0 0xfe000000 0 0x80000>; |
| 1506 | #address-cells = <3>; |
| 1507 | #size-cells = <2>; |
| 1508 | bus-range = <0x00 0xff>; |
| 1509 | device_type = "pci"; |
| 1510 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 |
| 1511 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 |
| 1512 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 |
| 1513 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; |
| 1514 | /* Map all possible DDR as inbound ranges */ |
| 1515 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 |
| 1516 | 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; |
| 1517 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
| 1518 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, |
| 1519 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; |
| 1520 | #interrupt-cells = <1>; |
| 1521 | interrupt-map-mask = <0 0 0 0>; |
| 1522 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
| 1523 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; |
| 1524 | clock-names = "pcie", "pcie_bus"; |
| 1525 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1526 | resets = <&cpg 319>; |
| 1527 | status = "disabled"; |
| 1528 | }; |
| 1529 | |
| 1530 | vsp@fe920000 { |
| 1531 | compatible = "renesas,vsp1"; |
| 1532 | reg = <0 0xfe920000 0 0x8000>; |
| 1533 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; |
| 1534 | clocks = <&cpg CPG_MOD 130>; |
| 1535 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1536 | resets = <&cpg 130>; |
| 1537 | }; |
| 1538 | |
| 1539 | vsp@fe928000 { |
| 1540 | compatible = "renesas,vsp1"; |
| 1541 | reg = <0 0xfe928000 0 0x8000>; |
| 1542 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
| 1543 | clocks = <&cpg CPG_MOD 131>; |
| 1544 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1545 | resets = <&cpg 131>; |
| 1546 | }; |
| 1547 | |
| 1548 | vsp@fe930000 { |
| 1549 | compatible = "renesas,vsp1"; |
| 1550 | reg = <0 0xfe930000 0 0x8000>; |
| 1551 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
| 1552 | clocks = <&cpg CPG_MOD 128>; |
| 1553 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1554 | resets = <&cpg 128>; |
| 1555 | }; |
| 1556 | |
| 1557 | vsp@fe938000 { |
| 1558 | compatible = "renesas,vsp1"; |
| 1559 | reg = <0 0xfe938000 0 0x8000>; |
| 1560 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
| 1561 | clocks = <&cpg CPG_MOD 127>; |
| 1562 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1563 | resets = <&cpg 127>; |
| 1564 | }; |
| 1565 | |
| 1566 | jpu: jpeg-codec@fe980000 { |
| 1567 | compatible = "renesas,jpu-r8a7790", |
| 1568 | "renesas,rcar-gen2-jpu"; |
| 1569 | reg = <0 0xfe980000 0 0x10300>; |
| 1570 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; |
| 1571 | clocks = <&cpg CPG_MOD 106>; |
| 1572 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1573 | resets = <&cpg 106>; |
| 1574 | }; |
| 1575 | |
| 1576 | du: display@feb00000 { |
| 1577 | compatible = "renesas,du-r8a7790"; |
| 1578 | reg = <0 0xfeb00000 0 0x70000>, |
| 1579 | <0 0xfeb90000 0 0x1c>, |
| 1580 | <0 0xfeb94000 0 0x1c>; |
| 1581 | reg-names = "du", "lvds.0", "lvds.1"; |
| 1582 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
| 1583 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, |
| 1584 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; |
| 1585 | clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, |
| 1586 | <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>, |
| 1587 | <&cpg CPG_MOD 725>; |
| 1588 | clock-names = "du.0", "du.1", "du.2", "lvds.0", |
| 1589 | "lvds.1"; |
| 1590 | status = "disabled"; |
| 1591 | |
| 1592 | ports { |
| 1593 | #address-cells = <1>; |
| 1594 | #size-cells = <0>; |
| 1595 | |
| 1596 | port@0 { |
| 1597 | reg = <0>; |
| 1598 | du_out_rgb: endpoint { |
| 1599 | }; |
| 1600 | }; |
| 1601 | port@1 { |
| 1602 | reg = <1>; |
| 1603 | du_out_lvds0: endpoint { |
| 1604 | }; |
| 1605 | }; |
| 1606 | port@2 { |
| 1607 | reg = <2>; |
| 1608 | du_out_lvds1: endpoint { |
| 1609 | }; |
| 1610 | }; |
| 1611 | }; |
| 1612 | }; |
| 1613 | |
| 1614 | prr: chipid@ff000044 { |
| 1615 | compatible = "renesas,prr"; |
| 1616 | reg = <0 0xff000044 0 4>; |
| 1617 | }; |
| 1618 | |
| 1619 | cmt0: timer@ffca0000 { |
| 1620 | compatible = "renesas,r8a7790-cmt0", |
| 1621 | "renesas,rcar-gen2-cmt0"; |
| 1622 | reg = <0 0xffca0000 0 0x1004>; |
| 1623 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
| 1624 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; |
| 1625 | clocks = <&cpg CPG_MOD 124>; |
| 1626 | clock-names = "fck"; |
| 1627 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1628 | resets = <&cpg 124>; |
| 1629 | |
| 1630 | status = "disabled"; |
| 1631 | }; |
| 1632 | |
| 1633 | cmt1: timer@e6130000 { |
| 1634 | compatible = "renesas,r8a7790-cmt1", |
| 1635 | "renesas,rcar-gen2-cmt1"; |
| 1636 | reg = <0 0xe6130000 0 0x1004>; |
| 1637 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
| 1638 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, |
| 1639 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, |
| 1640 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, |
| 1641 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, |
| 1642 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, |
| 1643 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, |
| 1644 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; |
| 1645 | clocks = <&cpg CPG_MOD 329>; |
| 1646 | clock-names = "fck"; |
| 1647 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 1648 | resets = <&cpg 329>; |
| 1649 | |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 1650 | status = "disabled"; |
| 1651 | }; |
| 1652 | }; |
| 1653 | |
Kuninori Morimoto | a8b805f3 | 2016-01-28 02:45:34 +0000 | [diff] [blame] | 1654 | thermal-zones { |
| 1655 | cpu_thermal: cpu-thermal { |
| 1656 | polling-delay-passive = <0>; |
| 1657 | polling-delay = <0>; |
| 1658 | |
| 1659 | thermal-sensors = <&thermal>; |
| 1660 | |
| 1661 | trips { |
| 1662 | cpu-crit { |
Chris Paterson | fcab565 | 2017-12-14 09:08:39 +0000 | [diff] [blame] | 1663 | temperature = <95000>; |
Kuninori Morimoto | a8b805f3 | 2016-01-28 02:45:34 +0000 | [diff] [blame] | 1664 | hysteresis = <0>; |
| 1665 | type = "critical"; |
| 1666 | }; |
| 1667 | }; |
| 1668 | cooling-maps { |
| 1669 | }; |
| 1670 | }; |
| 1671 | }; |
| 1672 | |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 1673 | timer { |
| 1674 | compatible = "arm,armv7-timer"; |
Simon Horman | 4bdb7aa | 2018-01-17 17:17:03 +0100 | [diff] [blame] | 1675 | interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 1676 | <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 1677 | <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 1678 | <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
Mikhail Ulyanov | fb84757 | 2015-07-24 16:25:45 +0300 | [diff] [blame] | 1679 | }; |
| 1680 | |
Geert Uytterhoeven | 80e1a5f | 2017-08-18 11:16:54 +0200 | [diff] [blame] | 1681 | /* External root clock */ |
| 1682 | extal_clk: extal { |
| 1683 | compatible = "fixed-clock"; |
| 1684 | #clock-cells = <0>; |
| 1685 | /* This value must be overridden by the board. */ |
| 1686 | clock-frequency = <0>; |
| 1687 | }; |
Laurent Pinchart | 22a1f59 | 2013-12-11 15:05:14 +0100 | [diff] [blame] | 1688 | |
Geert Uytterhoeven | 80e1a5f | 2017-08-18 11:16:54 +0200 | [diff] [blame] | 1689 | /* External PCIe clock - can be overridden by the board */ |
| 1690 | pcie_bus_clk: pcie_bus { |
| 1691 | compatible = "fixed-clock"; |
| 1692 | #clock-cells = <0>; |
| 1693 | clock-frequency = <0>; |
| 1694 | }; |
Laurent Pinchart | 22a1f59 | 2013-12-11 15:05:14 +0100 | [diff] [blame] | 1695 | |
Geert Uytterhoeven | 80e1a5f | 2017-08-18 11:16:54 +0200 | [diff] [blame] | 1696 | /* |
| 1697 | * The external audio clocks are configured as 0 Hz fixed frequency |
| 1698 | * clocks by default. |
| 1699 | * Boards that provide audio clocks should override them. |
| 1700 | */ |
| 1701 | audio_clk_a: audio_clk_a { |
| 1702 | compatible = "fixed-clock"; |
| 1703 | #clock-cells = <0>; |
| 1704 | clock-frequency = <0>; |
| 1705 | }; |
| 1706 | audio_clk_b: audio_clk_b { |
| 1707 | compatible = "fixed-clock"; |
| 1708 | #clock-cells = <0>; |
| 1709 | clock-frequency = <0>; |
| 1710 | }; |
| 1711 | audio_clk_c: audio_clk_c { |
| 1712 | compatible = "fixed-clock"; |
| 1713 | #clock-cells = <0>; |
| 1714 | clock-frequency = <0>; |
| 1715 | }; |
Phil Edworthy | 51d1791 | 2014-06-13 10:37:16 +0100 | [diff] [blame] | 1716 | |
Geert Uytterhoeven | 80e1a5f | 2017-08-18 11:16:54 +0200 | [diff] [blame] | 1717 | /* External SCIF clock */ |
| 1718 | scif_clk: scif { |
| 1719 | compatible = "fixed-clock"; |
| 1720 | #clock-cells = <0>; |
| 1721 | /* This value must be overridden by the board. */ |
| 1722 | clock-frequency = <0>; |
| 1723 | }; |
Kuninori Morimoto | c7c2ec3 | 2014-01-13 18:25:39 -0800 | [diff] [blame] | 1724 | |
Geert Uytterhoeven | 80e1a5f | 2017-08-18 11:16:54 +0200 | [diff] [blame] | 1725 | /* External USB clock - can be overridden by the board */ |
| 1726 | usb_extal_clk: usb_extal { |
| 1727 | compatible = "fixed-clock"; |
| 1728 | #clock-cells = <0>; |
| 1729 | clock-frequency = <48000000>; |
| 1730 | }; |
Geert Uytterhoeven | 42af65e | 2016-01-29 11:04:39 +0100 | [diff] [blame] | 1731 | |
Geert Uytterhoeven | 80e1a5f | 2017-08-18 11:16:54 +0200 | [diff] [blame] | 1732 | /* External CAN clock */ |
| 1733 | can_clk: can { |
| 1734 | compatible = "fixed-clock"; |
| 1735 | #clock-cells = <0>; |
| 1736 | /* This value must be overridden by the board. */ |
| 1737 | clock-frequency = <0>; |
| 1738 | }; |
Magnus Damm | 0468b2d | 2013-03-28 00:49:34 +0900 | [diff] [blame] | 1739 | }; |