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Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * xor offload engine api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/interrupt.h>
28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
30#include <linux/raid/xor.h>
31#include <linux/async_tx.h>
32
Dan Williams06164f32009-03-25 09:13:25 -070033/* do_async_xor - dma map the pages and perform the xor with an engine */
34static __async_inline struct dma_async_tx_descriptor *
Dan Williams1e55db22008-07-16 19:44:56 -070035do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
36 unsigned int offset, int src_cnt, size_t len,
Dan Williamsa08abd82009-06-03 11:43:59 -070037 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -070038{
Dan Williams1e55db22008-07-16 19:44:56 -070039 struct dma_device *dma = chan->device;
Dan Williams00367312008-02-02 19:49:57 -070040 dma_addr_t *dma_src = (dma_addr_t *) src_list;
Dan Williams1e55db22008-07-16 19:44:56 -070041 struct dma_async_tx_descriptor *tx = NULL;
42 int src_off = 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070043 int i;
Dan Williamsa08abd82009-06-03 11:43:59 -070044 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
45 void *cb_param_orig = submit->cb_param;
46 enum async_tx_flags flags_orig = submit->flags;
Dan Williams1e55db22008-07-16 19:44:56 -070047 enum dma_ctrl_flags dma_flags;
48 int xor_src_cnt;
49 dma_addr_t dma_dest;
Dan Williams9bc89cd2007-01-02 11:10:44 -070050
Dan Williamsa06d5682008-12-08 13:46:00 -070051 /* map the dest bidrectional in case it is re-used as a source */
52 dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL);
53 for (i = 0; i < src_cnt; i++) {
54 /* only map the dest once */
55 if (unlikely(src_list[i] == dest)) {
56 dma_src[i] = dma_dest;
57 continue;
58 }
Dan Williams1e55db22008-07-16 19:44:56 -070059 dma_src[i] = dma_map_page(dma->dev, src_list[i], offset,
Dan Williams00367312008-02-02 19:49:57 -070060 len, DMA_TO_DEVICE);
Dan Williamsa06d5682008-12-08 13:46:00 -070061 }
Dan Williams00367312008-02-02 19:49:57 -070062
Dan Williams1e55db22008-07-16 19:44:56 -070063 while (src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070064 submit->flags = flags_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070065 dma_flags = 0;
66 xor_src_cnt = min(src_cnt, dma->max_xor);
67 /* if we are submitting additional xors, leave the chain open,
68 * clear the callback parameters, and leave the destination
69 * buffer mapped
70 */
71 if (src_cnt > xor_src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070072 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams1e55db22008-07-16 19:44:56 -070073 dma_flags = DMA_COMPL_SKIP_DEST_UNMAP;
Dan Williamsa08abd82009-06-03 11:43:59 -070074 submit->cb_fn = NULL;
75 submit->cb_param = NULL;
Dan Williams1e55db22008-07-16 19:44:56 -070076 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -070077 submit->cb_fn = cb_fn_orig;
78 submit->cb_param = cb_param_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070079 }
Dan Williamsa08abd82009-06-03 11:43:59 -070080 if (submit->cb_fn)
Dan Williams1e55db22008-07-16 19:44:56 -070081 dma_flags |= DMA_PREP_INTERRUPT;
82
83 /* Since we have clobbered the src_list we are committed
84 * to doing this asynchronously. Drivers force forward progress
85 * in case they can not provide a descriptor
86 */
87 tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off],
88 xor_src_cnt, len, dma_flags);
89
Dan Williams669ab0b2008-07-17 17:59:55 -070090 if (unlikely(!tx))
Dan Williamsa08abd82009-06-03 11:43:59 -070091 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -070092
Dan Williams1e55db22008-07-16 19:44:56 -070093 /* spin wait for the preceeding transactions to complete */
Dan Williams669ab0b2008-07-17 17:59:55 -070094 while (unlikely(!tx)) {
95 dma_async_issue_pending(chan);
Dan Williams1e55db22008-07-16 19:44:56 -070096 tx = dma->device_prep_dma_xor(chan, dma_dest,
97 &dma_src[src_off],
98 xor_src_cnt, len,
99 dma_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700100 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700101
Dan Williamsa08abd82009-06-03 11:43:59 -0700102 async_tx_submit(chan, tx, submit);
103 submit->depend_tx = tx;
Dan Williams1e55db22008-07-16 19:44:56 -0700104
105 if (src_cnt > xor_src_cnt) {
106 /* drop completed sources */
107 src_cnt -= xor_src_cnt;
108 src_off += xor_src_cnt;
109
110 /* use the intermediate result a source */
111 dma_src[--src_off] = dma_dest;
112 src_cnt++;
113 } else
114 break;
115 }
Dan Williams00367312008-02-02 19:49:57 -0700116
117 return tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700118}
119
120static void
121do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700122 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700123{
Dan Williams9bc89cd2007-01-02 11:10:44 -0700124 int i;
Dan Williams1e55db22008-07-16 19:44:56 -0700125 int xor_src_cnt;
126 int src_off = 0;
127 void *dest_buf;
128 void **srcs = (void **) src_list;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700129
130 /* reuse the 'src_list' array to convert to buffer pointers */
131 for (i = 0; i < src_cnt; i++)
Dan Williams1e55db22008-07-16 19:44:56 -0700132 srcs[i] = page_address(src_list[i]) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700133
134 /* set destination address */
Dan Williams1e55db22008-07-16 19:44:56 -0700135 dest_buf = page_address(dest) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700136
Dan Williamsa08abd82009-06-03 11:43:59 -0700137 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
Dan Williams1e55db22008-07-16 19:44:56 -0700138 memset(dest_buf, 0, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700139
Dan Williams1e55db22008-07-16 19:44:56 -0700140 while (src_cnt > 0) {
141 /* process up to 'MAX_XOR_BLOCKS' sources */
142 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
143 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
144
145 /* drop completed sources */
146 src_cnt -= xor_src_cnt;
147 src_off += xor_src_cnt;
148 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700149
Dan Williamsa08abd82009-06-03 11:43:59 -0700150 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700151}
152
153/**
154 * async_xor - attempt to xor a set of blocks with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700155 * @dest: destination page
Dan Williamsa08abd82009-06-03 11:43:59 -0700156 * @src_list: array of source pages
157 * @offset: common src/dst offset to start transaction
Dan Williams9bc89cd2007-01-02 11:10:44 -0700158 * @src_cnt: number of source pages
159 * @len: length in bytes
Dan Williamsa08abd82009-06-03 11:43:59 -0700160 * @submit: submission / completion modifiers
161 *
162 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
163 *
164 * xor_blocks always uses the dest as a source so the
165 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
166 * the calculation. The assumption with dma eninges is that they only
167 * use the destination buffer as a source when it is explicity specified
168 * in the source list.
169 *
170 * src_list note: if the dest is also a source it must be at index zero.
171 * The contents of this array will be overwritten if a scribble region
172 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700173 */
174struct dma_async_tx_descriptor *
175async_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700176 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700177{
Dan Williamsa08abd82009-06-03 11:43:59 -0700178 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
Dan Williams47437b22008-02-02 19:49:59 -0700179 &dest, 1, src_list,
180 src_cnt, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700181 BUG_ON(src_cnt <= 1);
182
Dan Williams1e55db22008-07-16 19:44:56 -0700183 if (chan) {
184 /* run the xor asynchronously */
185 pr_debug("%s (async): len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700186
Dan Williams1e55db22008-07-16 19:44:56 -0700187 return do_async_xor(chan, dest, src_list, offset, src_cnt, len,
Dan Williamsa08abd82009-06-03 11:43:59 -0700188 submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700189 } else {
190 /* run the xor synchronously */
191 pr_debug("%s (sync): len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700192
Dan Williams1e55db22008-07-16 19:44:56 -0700193 /* in the sync case the dest is an implied source
194 * (assumes the dest is the first source)
195 */
Dan Williamsa08abd82009-06-03 11:43:59 -0700196 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
Dan Williams1e55db22008-07-16 19:44:56 -0700197 src_cnt--;
198 src_list++;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700199 }
200
Dan Williams1e55db22008-07-16 19:44:56 -0700201 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700202 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700203
Dan Williamsa08abd82009-06-03 11:43:59 -0700204 do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700205
206 return NULL;
207 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700208}
209EXPORT_SYMBOL_GPL(async_xor);
210
211static int page_is_zero(struct page *p, unsigned int offset, size_t len)
212{
213 char *a = page_address(p) + offset;
214 return ((*(u32 *) a) == 0 &&
215 memcmp(a, a + 4, len - 4) == 0);
216}
217
218/**
Dan Williams099f53c2009-04-08 14:28:37 -0700219 * async_xor_val - attempt a xor parity check with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700220 * @dest: destination page used if the xor is performed synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -0700221 * @src_list: array of source pages
Dan Williams9bc89cd2007-01-02 11:10:44 -0700222 * @offset: offset in pages to start transaction
223 * @src_cnt: number of source pages
224 * @len: length in bytes
225 * @result: 0 if sum == 0 else non-zero
Dan Williamsa08abd82009-06-03 11:43:59 -0700226 * @submit: submission / completion modifiers
227 *
228 * honored flags: ASYNC_TX_ACK
229 *
230 * src_list note: if the dest is also a source it must be at index zero.
231 * The contents of this array will be overwritten if a scribble region
232 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700233 */
234struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700235async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
236 int src_cnt, size_t len, u32 *result,
237 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700238{
Dan Williamsa08abd82009-06-03 11:43:59 -0700239 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR_VAL,
Dan Williams47437b22008-02-02 19:49:59 -0700240 &dest, 1, src_list,
241 src_cnt, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700242 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams00367312008-02-02 19:49:57 -0700243 struct dma_async_tx_descriptor *tx = NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700244
245 BUG_ON(src_cnt <= 1);
246
Dan Williams8d8002f2008-03-18 21:23:59 -0700247 if (device && src_cnt <= device->max_xor) {
Dan Williams00367312008-02-02 19:49:57 -0700248 dma_addr_t *dma_src = (dma_addr_t *) src_list;
Dan Williamsa08abd82009-06-03 11:43:59 -0700249 unsigned long dma_prep_flags;
Dan Williams00367312008-02-02 19:49:57 -0700250 int i;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700251
Dan Williams3280ab3e2008-03-13 17:45:28 -0700252 pr_debug("%s: (async) len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700253
Dan Williamsa08abd82009-06-03 11:43:59 -0700254 dma_prep_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0;
Dan Williams00367312008-02-02 19:49:57 -0700255 for (i = 0; i < src_cnt; i++)
256 dma_src[i] = dma_map_page(device->dev, src_list[i],
257 offset, len, DMA_TO_DEVICE);
258
Dan Williams099f53c2009-04-08 14:28:37 -0700259 tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt,
260 len, result,
261 dma_prep_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700262 if (unlikely(!tx)) {
Dan Williamsa08abd82009-06-03 11:43:59 -0700263 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -0700264
Dan Williamse34a8ae2008-08-05 10:22:05 -0700265 while (!tx) {
Dan Williams669ab0b2008-07-17 17:59:55 -0700266 dma_async_issue_pending(chan);
Dan Williams099f53c2009-04-08 14:28:37 -0700267 tx = device->device_prep_dma_xor_val(chan,
Dan Williams00367312008-02-02 19:49:57 -0700268 dma_src, src_cnt, len, result,
Dan Williamsd4c56f92008-02-02 19:49:58 -0700269 dma_prep_flags);
Dan Williamse34a8ae2008-08-05 10:22:05 -0700270 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700271 }
272
Dan Williamsa08abd82009-06-03 11:43:59 -0700273 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700274 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -0700275 enum async_tx_flags flags_orig = submit->flags;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700276
Dan Williams3280ab3e2008-03-13 17:45:28 -0700277 pr_debug("%s: (sync) len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700278
Dan Williamsa08abd82009-06-03 11:43:59 -0700279 submit->flags |= ASYNC_TX_XOR_DROP_DST;
280 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700281
Dan Williamsa08abd82009-06-03 11:43:59 -0700282 tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700283
Dan Williamsd2c52b72008-07-17 17:59:55 -0700284 async_tx_quiesce(&tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700285
286 *result = page_is_zero(dest, offset, len) ? 0 : 1;
287
Dan Williamsa08abd82009-06-03 11:43:59 -0700288 async_tx_sync_epilog(submit);
289 submit->flags = flags_orig;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700290 }
291
292 return tx;
293}
Dan Williams099f53c2009-04-08 14:28:37 -0700294EXPORT_SYMBOL_GPL(async_xor_val);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700295
296static int __init async_xor_init(void)
297{
Dan Williams00367312008-02-02 19:49:57 -0700298 #ifdef CONFIG_DMA_ENGINE
299 /* To conserve stack space the input src_list (array of page pointers)
300 * is reused to hold the array of dma addresses passed to the driver.
301 * This conversion is only possible when dma_addr_t is less than the
302 * the size of a pointer. HIGHMEM64G is known to violate this
303 * assumption.
304 */
305 BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(struct page *));
306 #endif
307
Dan Williams9bc89cd2007-01-02 11:10:44 -0700308 return 0;
309}
310
311static void __exit async_xor_exit(void)
312{
313 do { } while (0);
314}
315
316module_init(async_xor_init);
317module_exit(async_xor_exit);
318
319MODULE_AUTHOR("Intel Corporation");
320MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
321MODULE_LICENSE("GPL");