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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Generic Generic NCR5380 driver defines
3 *
4 * Copyright 1993, Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * drew@colorado.edu
8 * +1 (303) 440-4894
9 *
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#ifndef GENERIC_NCR5380_H
15#define GENERIC_NCR5380_H
16
Ondrej Zary702a98c2010-08-10 18:01:16 -070017#ifndef SCSI_G_NCR5380_MEM
Finn Thainaa2e2cb2016-01-03 16:05:48 +110018#define DRV_MODULE_NAME "g_NCR5380"
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
Finn Thain54d8fe42016-01-03 16:05:06 +110020#define NCR5380_read(reg) \
21 inb(instance->io_port + (reg))
22#define NCR5380_write(reg, value) \
23 outb(value, instance->io_port + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
Ondrej Zary12150792016-01-03 16:06:15 +110025#define NCR5380_implementation_fields \
26 int c400_ctl_status; \
27 int c400_blk_cnt; \
Ondrej Zaryaeb51152016-01-03 16:06:17 +110028 int c400_host_buf; \
29 int io_width;
Al Viroc818cb62006-03-24 03:15:37 -080030
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#else
Ondrej Zary702a98c2010-08-10 18:01:16 -070032/* therefore SCSI_G_NCR5380_MEM */
Finn Thainaa2e2cb2016-01-03 16:05:48 +110033#define DRV_MODULE_NAME "g_NCR5380_mmio"
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#define NCR53C400_mem_base 0x3880
36#define NCR53C400_host_buffer 0x3900
Finn Thain9d376402016-03-23 21:10:10 +110037#define NCR53C400_region_size 0x3a00
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
Finn Thain54d8fe42016-01-03 16:05:06 +110039#define NCR5380_read(reg) \
40 readb(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
41 NCR53C400_mem_base + (reg))
42#define NCR5380_write(reg, value) \
43 writeb(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
44 NCR53C400_mem_base + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
46#define NCR5380_implementation_fields \
Ondrej Zary12150792016-01-03 16:06:15 +110047 void __iomem *iomem; \
Finn Thain9d376402016-03-23 21:10:10 +110048 resource_size_t iomem_size; \
Ondrej Zary12150792016-01-03 16:06:15 +110049 int c400_ctl_status; \
50 int c400_blk_cnt; \
51 int c400_host_buf;
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
Al Viroc818cb62006-03-24 03:15:37 -080053#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Finn Thainff3d4572016-01-03 16:05:25 +110055#define NCR5380_dma_xfer_len(instance, cmd, phase) \
Finn Thain7e9ec8d2016-03-23 21:10:11 +110056 generic_NCR5380_dma_xfer_len(instance, cmd)
Finn Thain6c4b88c2016-03-23 21:10:17 +110057#define NCR5380_dma_recv_setup generic_NCR5380_pread
58#define NCR5380_dma_send_setup generic_NCR5380_pwrite
Finn Thain8053b0e2016-03-23 21:10:19 +110059#define NCR5380_dma_residual(instance) (0)
Finn Thainff3d4572016-01-03 16:05:25 +110060
Linus Torvalds1da177e2005-04-16 15:20:36 -070061#define NCR5380_intr generic_NCR5380_intr
62#define NCR5380_queue_command generic_NCR5380_queue_command
63#define NCR5380_abort generic_NCR5380_abort
64#define NCR5380_bus_reset generic_NCR5380_bus_reset
Finn Thain8c325132014-11-12 16:11:58 +110065#define NCR5380_info generic_NCR5380_info
Linus Torvalds1da177e2005-04-16 15:20:36 -070066
Finn Thaine5d55d12016-03-23 21:10:16 +110067#define NCR5380_io_delay(x) udelay(x)
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Linus Torvalds1da177e2005-04-16 15:20:36 -070069#define BOARD_NCR5380 0
70#define BOARD_NCR53C400 1
71#define BOARD_NCR53C400A 2
72#define BOARD_DTC3181E 3
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110073#define BOARD_HP_C2502 4
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
Linus Torvalds1da177e2005-04-16 15:20:36 -070075#endif /* GENERIC_NCR5380_H */
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