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Christian Daudt8ac49e02012-11-19 09:46:10 -08001/*
Markus Mayere3b62ff2013-08-02 13:12:21 -07002 * Copyright (C) 2012-2013 Broadcom Corporation
Christian Daudt8ac49e02012-11-19 09:46:10 -08003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
Matt Porter5401cc42013-06-06 01:41:35 -040014#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16
Matt Porter74375652013-06-06 01:41:34 -040017#include "skeleton.dtsi"
Christian Daudt8ac49e02012-11-19 09:46:10 -080018
19/ {
20 model = "BCM11351 SoC";
Christian Daudt15e22dd2013-07-30 16:27:10 -070021 compatible = "brcm,bcm11351";
Christian Daudt8ac49e02012-11-19 09:46:10 -080022 interrupt-parent = <&gic>;
23
24 chosen {
25 bootargs = "console=ttyS0,115200n8";
26 };
27
28 gic: interrupt-controller@3ff00100 {
29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>;
31 #address-cells = <0>;
32 interrupt-controller;
33 reg = <0x3ff01000 0x1000>,
34 <0x3ff00100 0x100>;
35 };
36
Christian Daudt7f6c62e2013-03-13 15:05:37 -070037 smc@0x3404c000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070038 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
Matt Porterd22dc5e2013-06-11 14:45:58 -040039 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
Christian Daudt7f6c62e2013-03-13 15:05:37 -070040 };
41
Christian Daudt8ac49e02012-11-19 09:46:10 -080042 uart@3e000000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070043 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
Christian Daudt8ac49e02012-11-19 09:46:10 -080044 status = "disabled";
45 reg = <0x3e000000 0x1000>;
46 clock-frequency = <13000000>;
Matt Porter5401cc42013-06-06 01:41:35 -040047 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080048 reg-shift = <2>;
49 reg-io-width = <4>;
50 };
51
Tim Kryger84491c02013-09-23 10:49:57 -070052 uart@3e001000 {
53 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
54 status = "disabled";
55 reg = <0x3e001000 0x1000>;
56 clock-frequency = <13000000>;
57 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
58 reg-shift = <2>;
59 reg-io-width = <4>;
60 };
61
62 uart@3e002000 {
63 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
64 status = "disabled";
65 reg = <0x3e002000 0x1000>;
66 clock-frequency = <13000000>;
67 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
68 reg-shift = <2>;
69 reg-io-width = <4>;
70 };
71
72 uart@3e003000 {
73 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
74 status = "disabled";
75 reg = <0x3e003000 0x1000>;
76 clock-frequency = <13000000>;
77 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
78 reg-shift = <2>;
79 reg-io-width = <4>;
80 };
81
Christian Daudt8ac49e02012-11-19 09:46:10 -080082 L2: l2-cache {
Christian Daudt15e22dd2013-07-30 16:27:10 -070083 compatible = "brcm,bcm11351-a2-pl310-cache";
Christian Daudt3b656fe2013-05-09 22:21:01 +010084 reg = <0x3ff20000 0x1000>;
85 cache-unified;
86 cache-level = <2>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080087 };
Christian Daudt5f03dc22013-03-13 14:27:28 -070088
Markus Mayere3b62ff2013-08-02 13:12:21 -070089 watchdog@35002f40 {
90 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
91 reg = <0x35002f40 0x6c>;
92 };
93
Christian Daudt5f03dc22013-03-13 14:27:28 -070094 timer@35006000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070095 compatible = "brcm,kona-timer";
Christian Daudt5f03dc22013-03-13 14:27:28 -070096 reg = <0x35006000 0x1000>;
Matt Porter5401cc42013-06-06 01:41:35 -040097 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt5f03dc22013-03-13 14:27:28 -070098 clock-frequency = <32768>;
99 };
100
Markus Mayerd394c7b2013-09-10 11:07:03 -0700101 gpio: gpio@35003000 {
102 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
103 reg = <0x35003000 0x800>;
104 interrupts =
105 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
106 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
107 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
108 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
109 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
110 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
111 #gpio-cells = <2>;
112 #interrupt-cells = <2>;
113 gpio-controller;
114 interrupt-controller;
115 };
116
Christian Daudtd7358f82013-08-07 22:37:47 -0700117 sdio1: sdio@3f180000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700118 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700119 reg = <0x3f180000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400120 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700121 status = "disabled";
122 };
123
Christian Daudtd7358f82013-08-07 22:37:47 -0700124 sdio2: sdio@3f190000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700125 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700126 reg = <0x3f190000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400127 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700128 status = "disabled";
129 };
130
Christian Daudtd7358f82013-08-07 22:37:47 -0700131 sdio3: sdio@3f1a0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700132 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700133 reg = <0x3f1a0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400134 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700135 status = "disabled";
136 };
137
Christian Daudtd7358f82013-08-07 22:37:47 -0700138 sdio4: sdio@3f1b0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700139 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700140 reg = <0x3f1b0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400141 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700142 status = "disabled";
143 };
144
Tim Kryger0bd898b2013-12-05 11:20:37 -0800145 clocks {
146 bsc1_clk: bsc1 {
147 compatible = "fixed-clock";
148 clock-frequency = <13000000>;
149 #clock-cells = <0>;
150 };
151
152 bsc2_clk: bsc2 {
153 compatible = "fixed-clock";
154 clock-frequency = <13000000>;
155 #clock-cells = <0>;
156 };
157
158 bsc3_clk: bsc3 {
159 compatible = "fixed-clock";
160 clock-frequency = <13000000>;
161 #clock-cells = <0>;
162 };
163
164 pmu_bsc_clk: pmu_bsc {
165 compatible = "fixed-clock";
166 clock-frequency = <13000000>;
167 #clock-cells = <0>;
168 };
169
170 hub_timer_clk: hub_timer {
171 compatible = "fixed-clock";
172 clock-frequency = <32768>;
173 #clock-cells = <0>;
174 };
175
176 pwm_clk: pwm {
177 compatible = "fixed-clock";
178 clock-frequency = <26000000>;
179 #clock-cells = <0>;
180 };
181
182 sdio1_clk: sdio1 {
183 compatible = "fixed-clock";
184 clock-frequency = <48000000>;
185 #clock-cells = <0>;
186 };
187
188 sdio2_clk: sdio2 {
189 compatible = "fixed-clock";
190 clock-frequency = <48000000>;
191 #clock-cells = <0>;
192 };
193
194 sdio3_clk: sdio3 {
195 compatible = "fixed-clock";
196 clock-frequency = <48000000>;
197 #clock-cells = <0>;
198 };
199
200 sdio4_clk: sdio4 {
201 compatible = "fixed-clock";
202 clock-frequency = <48000000>;
203 #clock-cells = <0>;
204 };
205
206 tmon_1m_clk: tmon_1m {
207 compatible = "fixed-clock";
208 clock-frequency = <1000000>;
209 #clock-cells = <0>;
210 };
211
212 uartb_clk: uartb {
213 compatible = "fixed-clock";
214 clock-frequency = <13000000>;
215 #clock-cells = <0>;
216 };
217
218 uartb2_clk: uartb2 {
219 compatible = "fixed-clock";
220 clock-frequency = <13000000>;
221 #clock-cells = <0>;
222 };
223
224 uartb3_clk: uartb3 {
225 compatible = "fixed-clock";
226 clock-frequency = <13000000>;
227 #clock-cells = <0>;
228 };
229
230 uartb4_clk: uartb4 {
231 compatible = "fixed-clock";
232 clock-frequency = <13000000>;
233 #clock-cells = <0>;
234 };
235
236 usb_otg_ahb_clk: usb_otg_ahb {
237 compatible = "fixed-clock";
238 clock-frequency = <52000000>;
239 #clock-cells = <0>;
240 };
241 };
Christian Daudt8ac49e02012-11-19 09:46:10 -0800242};