Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 1 | /**************************************************************************** |
Ben Hutchings | 177dfcd | 2008-12-12 21:50:08 -0800 | [diff] [blame] | 2 | * Driver for Solarflare Solarstorm network controllers and boards |
Ben Hutchings | 906bb26 | 2009-11-29 15:16:19 +0000 | [diff] [blame] | 3 | * Copyright 2007-2009 Solarflare Communications Inc. |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published |
| 7 | * by the Free Software Foundation, incorporated herein by reference. |
| 8 | */ |
| 9 | |
| 10 | #include <linux/delay.h> |
Herbert Xu | da3bc07 | 2009-01-18 21:50:16 -0800 | [diff] [blame] | 11 | #include <linux/rtnetlink.h> |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 12 | #include <linux/seq_file.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 13 | #include <linux/slab.h> |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 14 | #include "efx.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 15 | #include "mdio_10g.h" |
Ben Hutchings | 744093c | 2009-11-29 15:12:08 +0000 | [diff] [blame] | 16 | #include "nic.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 17 | #include "phy.h" |
Ben Hutchings | 3e6c453 | 2009-10-23 08:30:36 +0000 | [diff] [blame] | 18 | #include "regs.h" |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 19 | #include "workarounds.h" |
| 20 | #include "selftest.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 21 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 22 | /* We expect these MMDs to be in the package. SFT9001 also has a |
| 23 | * clause 22 extension MMD, but since it doesn't have all the generic |
| 24 | * MMD registers it is pointless to include it here. |
| 25 | */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 26 | #define TENXPRESS_REQUIRED_DEVS (MDIO_DEVS_PMAPMD | \ |
| 27 | MDIO_DEVS_PCS | \ |
| 28 | MDIO_DEVS_PHYXS | \ |
| 29 | MDIO_DEVS_AN) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 30 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 31 | #define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \ |
| 32 | (1 << LOOPBACK_PCS) | \ |
| 33 | (1 << LOOPBACK_PMAPMD) | \ |
Ben Hutchings | e58f69f | 2009-11-29 15:08:41 +0000 | [diff] [blame] | 34 | (1 << LOOPBACK_PHYXS_WS)) |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 35 | |
| 36 | #define SFT9001_LOOPBACKS ((1 << LOOPBACK_GPHY) | \ |
| 37 | (1 << LOOPBACK_PHYXS) | \ |
| 38 | (1 << LOOPBACK_PCS) | \ |
| 39 | (1 << LOOPBACK_PMAPMD) | \ |
Ben Hutchings | e58f69f | 2009-11-29 15:08:41 +0000 | [diff] [blame] | 40 | (1 << LOOPBACK_PHYXS_WS)) |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 41 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 42 | /* We complain if we fail to see the link partner as 10G capable this many |
| 43 | * times in a row (must be > 1 as sampling the autoneg. registers is racy) |
| 44 | */ |
| 45 | #define MAX_BAD_LP_TRIES (5) |
| 46 | |
| 47 | /* Extended control register */ |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 48 | #define PMA_PMD_XCONTROL_REG 49152 |
| 49 | #define PMA_PMD_EXT_GMII_EN_LBN 1 |
| 50 | #define PMA_PMD_EXT_GMII_EN_WIDTH 1 |
| 51 | #define PMA_PMD_EXT_CLK_OUT_LBN 2 |
| 52 | #define PMA_PMD_EXT_CLK_OUT_WIDTH 1 |
| 53 | #define PMA_PMD_LNPGA_POWERDOWN_LBN 8 /* SFX7101 only */ |
| 54 | #define PMA_PMD_LNPGA_POWERDOWN_WIDTH 1 |
| 55 | #define PMA_PMD_EXT_CLK312_LBN 8 /* SFT9001 only */ |
| 56 | #define PMA_PMD_EXT_CLK312_WIDTH 1 |
| 57 | #define PMA_PMD_EXT_LPOWER_LBN 12 |
| 58 | #define PMA_PMD_EXT_LPOWER_WIDTH 1 |
Steve Hodgson | 869b5b3 | 2009-01-29 17:48:10 +0000 | [diff] [blame] | 59 | #define PMA_PMD_EXT_ROBUST_LBN 14 |
| 60 | #define PMA_PMD_EXT_ROBUST_WIDTH 1 |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 61 | #define PMA_PMD_EXT_SSR_LBN 15 |
| 62 | #define PMA_PMD_EXT_SSR_WIDTH 1 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 63 | |
| 64 | /* extended status register */ |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 65 | #define PMA_PMD_XSTATUS_REG 49153 |
Ben Hutchings | e762cd7 | 2009-06-10 05:30:05 +0000 | [diff] [blame] | 66 | #define PMA_PMD_XSTAT_MDIX_LBN 14 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 67 | #define PMA_PMD_XSTAT_FLP_LBN (12) |
| 68 | |
| 69 | /* LED control register */ |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 70 | #define PMA_PMD_LED_CTRL_REG 49159 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 71 | #define PMA_PMA_LED_ACTIVITY_LBN (3) |
| 72 | |
| 73 | /* LED function override register */ |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 74 | #define PMA_PMD_LED_OVERR_REG 49161 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 75 | /* Bit positions for different LEDs (there are more but not wired on SFE4001)*/ |
| 76 | #define PMA_PMD_LED_LINK_LBN (0) |
| 77 | #define PMA_PMD_LED_SPEED_LBN (2) |
| 78 | #define PMA_PMD_LED_TX_LBN (4) |
| 79 | #define PMA_PMD_LED_RX_LBN (6) |
| 80 | /* Override settings */ |
| 81 | #define PMA_PMD_LED_AUTO (0) /* H/W control */ |
| 82 | #define PMA_PMD_LED_ON (1) |
| 83 | #define PMA_PMD_LED_OFF (2) |
| 84 | #define PMA_PMD_LED_FLASH (3) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 85 | #define PMA_PMD_LED_MASK 3 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 86 | /* All LEDs under hardware control */ |
Ben Hutchings | dcf477b | 2009-11-23 16:02:49 +0000 | [diff] [blame] | 87 | #define SFT9001_PMA_PMD_LED_DEFAULT 0 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 88 | /* Green and Amber under hardware control, Red off */ |
Ben Hutchings | dcf477b | 2009-11-23 16:02:49 +0000 | [diff] [blame] | 89 | #define SFX7101_PMA_PMD_LED_DEFAULT (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 90 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 91 | #define PMA_PMD_SPEED_ENABLE_REG 49192 |
| 92 | #define PMA_PMD_100TX_ADV_LBN 1 |
| 93 | #define PMA_PMD_100TX_ADV_WIDTH 1 |
| 94 | #define PMA_PMD_1000T_ADV_LBN 2 |
| 95 | #define PMA_PMD_1000T_ADV_WIDTH 1 |
| 96 | #define PMA_PMD_10000T_ADV_LBN 3 |
| 97 | #define PMA_PMD_10000T_ADV_WIDTH 1 |
| 98 | #define PMA_PMD_SPEED_LBN 4 |
| 99 | #define PMA_PMD_SPEED_WIDTH 4 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 100 | |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 101 | /* Cable diagnostics - SFT9001 only */ |
| 102 | #define PMA_PMD_CDIAG_CTRL_REG 49213 |
| 103 | #define CDIAG_CTRL_IMMED_LBN 15 |
| 104 | #define CDIAG_CTRL_BRK_LINK_LBN 12 |
| 105 | #define CDIAG_CTRL_IN_PROG_LBN 11 |
| 106 | #define CDIAG_CTRL_LEN_UNIT_LBN 10 |
| 107 | #define CDIAG_CTRL_LEN_METRES 1 |
| 108 | #define PMA_PMD_CDIAG_RES_REG 49174 |
| 109 | #define CDIAG_RES_A_LBN 12 |
| 110 | #define CDIAG_RES_B_LBN 8 |
| 111 | #define CDIAG_RES_C_LBN 4 |
| 112 | #define CDIAG_RES_D_LBN 0 |
| 113 | #define CDIAG_RES_WIDTH 4 |
| 114 | #define CDIAG_RES_OPEN 2 |
| 115 | #define CDIAG_RES_OK 1 |
| 116 | #define CDIAG_RES_INVALID 0 |
| 117 | /* Set of 4 registers for pairs A-D */ |
| 118 | #define PMA_PMD_CDIAG_LEN_REG 49175 |
| 119 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 120 | /* Serdes control registers - SFT9001 only */ |
| 121 | #define PMA_PMD_CSERDES_CTRL_REG 64258 |
| 122 | /* Set the 156.25 MHz output to 312.5 MHz to drive Falcon's XMAC */ |
| 123 | #define PMA_PMD_CSERDES_DEFAULT 0x000f |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 124 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 125 | /* Misc register defines - SFX7101 only */ |
| 126 | #define PCS_CLOCK_CTRL_REG 55297 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 127 | #define PLL312_RST_N_LBN 2 |
| 128 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 129 | #define PCS_SOFT_RST2_REG 55302 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 130 | #define SERDES_RST_N_LBN 13 |
| 131 | #define XGXS_RST_N_LBN 12 |
| 132 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 133 | #define PCS_TEST_SELECT_REG 55303 /* PRM 10.5.8 */ |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 134 | #define CLK312_EN_LBN 3 |
| 135 | |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 136 | /* PHYXS registers */ |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 137 | #define PHYXS_XCONTROL_REG 49152 |
| 138 | #define PHYXS_RESET_LBN 15 |
| 139 | #define PHYXS_RESET_WIDTH 1 |
| 140 | |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 141 | #define PHYXS_TEST1 (49162) |
| 142 | #define LOOPBACK_NEAR_LBN (8) |
| 143 | #define LOOPBACK_NEAR_WIDTH (1) |
| 144 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 145 | /* Boot status register */ |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 146 | #define PCS_BOOT_STATUS_REG 53248 |
| 147 | #define PCS_BOOT_FATAL_ERROR_LBN 0 |
| 148 | #define PCS_BOOT_PROGRESS_LBN 1 |
| 149 | #define PCS_BOOT_PROGRESS_WIDTH 2 |
| 150 | #define PCS_BOOT_PROGRESS_INIT 0 |
| 151 | #define PCS_BOOT_PROGRESS_WAIT_MDIO 1 |
| 152 | #define PCS_BOOT_PROGRESS_CHECKSUM 2 |
| 153 | #define PCS_BOOT_PROGRESS_JUMP 3 |
| 154 | #define PCS_BOOT_DOWNLOAD_WAIT_LBN 3 |
| 155 | #define PCS_BOOT_CODE_STARTED_LBN 4 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 156 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 157 | /* 100M/1G PHY registers */ |
| 158 | #define GPHY_XCONTROL_REG 49152 |
| 159 | #define GPHY_ISOLATE_LBN 10 |
| 160 | #define GPHY_ISOLATE_WIDTH 1 |
| 161 | #define GPHY_DUPLEX_LBN 8 |
| 162 | #define GPHY_DUPLEX_WIDTH 1 |
| 163 | #define GPHY_LOOPBACK_NEAR_LBN 14 |
| 164 | #define GPHY_LOOPBACK_NEAR_WIDTH 1 |
| 165 | |
| 166 | #define C22EXT_STATUS_REG 49153 |
| 167 | #define C22EXT_STATUS_LINK_LBN 2 |
| 168 | #define C22EXT_STATUS_LINK_WIDTH 1 |
| 169 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 170 | #define C22EXT_MSTSLV_CTRL 49161 |
| 171 | #define C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN 8 |
| 172 | #define C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN 9 |
| 173 | |
| 174 | #define C22EXT_MSTSLV_STATUS 49162 |
| 175 | #define C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN 10 |
| 176 | #define C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN 11 |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 177 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 178 | /* Time to wait between powering down the LNPGA and turning off the power |
| 179 | * rails */ |
| 180 | #define LNPGA_PDOWN_WAIT (HZ / 5) |
| 181 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 182 | struct tenxpress_phy_data { |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 183 | enum efx_loopback_mode loopback_mode; |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 184 | enum efx_phy_mode phy_mode; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 185 | int bad_lp_tries; |
| 186 | }; |
| 187 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 188 | static ssize_t show_phy_short_reach(struct device *dev, |
| 189 | struct device_attribute *attr, char *buf) |
| 190 | { |
| 191 | struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); |
| 192 | int reg; |
| 193 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 194 | reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR); |
| 195 | return sprintf(buf, "%d\n", !!(reg & MDIO_PMA_10GBT_TXPWR_SHORT)); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 196 | } |
| 197 | |
| 198 | static ssize_t set_phy_short_reach(struct device *dev, |
| 199 | struct device_attribute *attr, |
| 200 | const char *buf, size_t count) |
| 201 | { |
| 202 | struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 203 | int rc; |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 204 | |
| 205 | rtnl_lock(); |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 206 | if (efx->state != STATE_RUNNING) { |
| 207 | rc = -EBUSY; |
| 208 | } else { |
| 209 | efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR, |
| 210 | MDIO_PMA_10GBT_TXPWR_SHORT, |
| 211 | count != 0 && *buf != '0'); |
| 212 | rc = efx_reconfigure_port(efx); |
| 213 | } |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 214 | rtnl_unlock(); |
| 215 | |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 216 | return rc < 0 ? rc : (ssize_t)count; |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | static DEVICE_ATTR(phy_short_reach, 0644, show_phy_short_reach, |
| 220 | set_phy_short_reach); |
| 221 | |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 222 | int sft9001_wait_boot(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 223 | { |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 224 | unsigned long timeout = jiffies + HZ + 1; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 225 | int boot_stat; |
| 226 | |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 227 | for (;;) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 228 | boot_stat = efx_mdio_read(efx, MDIO_MMD_PCS, |
| 229 | PCS_BOOT_STATUS_REG); |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 230 | if (boot_stat >= 0) { |
| 231 | EFX_LOG(efx, "PHY boot status = %#x\n", boot_stat); |
| 232 | switch (boot_stat & |
| 233 | ((1 << PCS_BOOT_FATAL_ERROR_LBN) | |
| 234 | (3 << PCS_BOOT_PROGRESS_LBN) | |
| 235 | (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) | |
| 236 | (1 << PCS_BOOT_CODE_STARTED_LBN))) { |
| 237 | case ((1 << PCS_BOOT_FATAL_ERROR_LBN) | |
| 238 | (PCS_BOOT_PROGRESS_CHECKSUM << |
| 239 | PCS_BOOT_PROGRESS_LBN)): |
| 240 | case ((1 << PCS_BOOT_FATAL_ERROR_LBN) | |
| 241 | (PCS_BOOT_PROGRESS_INIT << |
| 242 | PCS_BOOT_PROGRESS_LBN) | |
| 243 | (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)): |
| 244 | return -EINVAL; |
| 245 | case ((PCS_BOOT_PROGRESS_WAIT_MDIO << |
| 246 | PCS_BOOT_PROGRESS_LBN) | |
| 247 | (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)): |
| 248 | return (efx->phy_mode & PHY_MODE_SPECIAL) ? |
| 249 | 0 : -EIO; |
| 250 | case ((PCS_BOOT_PROGRESS_JUMP << |
| 251 | PCS_BOOT_PROGRESS_LBN) | |
| 252 | (1 << PCS_BOOT_CODE_STARTED_LBN)): |
| 253 | case ((PCS_BOOT_PROGRESS_JUMP << |
| 254 | PCS_BOOT_PROGRESS_LBN) | |
| 255 | (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) | |
| 256 | (1 << PCS_BOOT_CODE_STARTED_LBN)): |
| 257 | return (efx->phy_mode & PHY_MODE_SPECIAL) ? |
| 258 | -EIO : 0; |
| 259 | default: |
| 260 | if (boot_stat & (1 << PCS_BOOT_FATAL_ERROR_LBN)) |
| 261 | return -EIO; |
| 262 | break; |
| 263 | } |
| 264 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 265 | |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 266 | if (time_after_eq(jiffies, timeout)) |
| 267 | return -ETIMEDOUT; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 268 | |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 269 | msleep(50); |
| 270 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 271 | } |
| 272 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 273 | static int tenxpress_init(struct efx_nic *efx) |
| 274 | { |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 275 | int reg; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 276 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 277 | if (efx->phy_type == PHY_TYPE_SFX7101) { |
| 278 | /* Enable 312.5 MHz clock */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 279 | efx_mdio_write(efx, MDIO_MMD_PCS, PCS_TEST_SELECT_REG, |
| 280 | 1 << CLK312_EN_LBN); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 281 | } else { |
| 282 | /* Enable 312.5 MHz clock and GMII */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 283 | reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 284 | reg |= ((1 << PMA_PMD_EXT_GMII_EN_LBN) | |
| 285 | (1 << PMA_PMD_EXT_CLK_OUT_LBN) | |
Steve Hodgson | 869b5b3 | 2009-01-29 17:48:10 +0000 | [diff] [blame] | 286 | (1 << PMA_PMD_EXT_CLK312_LBN) | |
| 287 | (1 << PMA_PMD_EXT_ROBUST_LBN)); |
| 288 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 289 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg); |
| 290 | efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, |
| 291 | GPHY_XCONTROL_REG, 1 << GPHY_ISOLATE_LBN, |
| 292 | false); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 293 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 294 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 295 | /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */ |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 296 | if (efx->phy_type == PHY_TYPE_SFX7101) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 297 | efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG, |
| 298 | 1 << PMA_PMA_LED_ACTIVITY_LBN, true); |
| 299 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, |
Ben Hutchings | dcf477b | 2009-11-23 16:02:49 +0000 | [diff] [blame] | 300 | SFX7101_PMA_PMD_LED_DEFAULT); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 301 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 302 | |
Ben Hutchings | 190dbcf | 2009-02-27 13:06:45 +0000 | [diff] [blame] | 303 | return 0; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 304 | } |
| 305 | |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 306 | static int tenxpress_phy_probe(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 307 | { |
| 308 | struct tenxpress_phy_data *phy_data; |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 309 | int rc; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 310 | |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 311 | /* Allocate phy private storage */ |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 312 | phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL); |
Ben Hutchings | 9b7bfc4 | 2008-05-16 21:20:20 +0100 | [diff] [blame] | 313 | if (!phy_data) |
| 314 | return -ENOMEM; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 315 | efx->phy_data = phy_data; |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 316 | phy_data->phy_mode = efx->phy_mode; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 317 | |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 318 | /* Create any special files */ |
| 319 | if (efx->phy_type == PHY_TYPE_SFT9001B) { |
| 320 | rc = device_create_file(&efx->pci_dev->dev, |
| 321 | &dev_attr_phy_short_reach); |
| 322 | if (rc) |
| 323 | goto fail; |
| 324 | } |
| 325 | |
| 326 | if (efx->phy_type == PHY_TYPE_SFX7101) { |
| 327 | efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS; |
| 328 | efx->mdio.mode_support = MDIO_SUPPORTS_C45; |
| 329 | |
| 330 | efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS; |
| 331 | |
| 332 | efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg | |
| 333 | ADVERTISED_10000baseT_Full); |
| 334 | } else { |
| 335 | efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS; |
| 336 | efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; |
| 337 | |
| 338 | efx->loopback_modes = (SFT9001_LOOPBACKS | |
| 339 | FALCON_XMAC_LOOPBACKS | |
| 340 | FALCON_GMAC_LOOPBACKS); |
| 341 | |
| 342 | efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg | |
| 343 | ADVERTISED_10000baseT_Full | |
| 344 | ADVERTISED_1000baseT_Full | |
| 345 | ADVERTISED_100baseT_Full); |
| 346 | } |
| 347 | |
| 348 | return 0; |
| 349 | |
| 350 | fail: |
| 351 | kfree(efx->phy_data); |
| 352 | efx->phy_data = NULL; |
| 353 | return rc; |
| 354 | } |
| 355 | |
| 356 | static int tenxpress_phy_init(struct efx_nic *efx) |
| 357 | { |
| 358 | int rc; |
| 359 | |
| 360 | falcon_board(efx)->type->init_phy(efx); |
| 361 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 362 | if (!(efx->phy_mode & PHY_MODE_SPECIAL)) { |
| 363 | if (efx->phy_type == PHY_TYPE_SFT9001A) { |
| 364 | int reg; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 365 | reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, |
| 366 | PMA_PMD_XCONTROL_REG); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 367 | reg |= (1 << PMA_PMD_EXT_SSR_LBN); |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 368 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, |
| 369 | PMA_PMD_XCONTROL_REG, reg); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 370 | mdelay(200); |
| 371 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 372 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 373 | rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 374 | if (rc < 0) |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 375 | return rc; |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 376 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 377 | rc = efx_mdio_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 378 | if (rc < 0) |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 379 | return rc; |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 380 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 381 | |
| 382 | rc = tenxpress_init(efx); |
| 383 | if (rc < 0) |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 384 | return rc; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 385 | |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 386 | /* Reinitialise flow control settings */ |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 387 | efx_link_set_wanted_fc(efx, efx->wanted_fc); |
| 388 | efx_mdio_an_reconfigure(efx); |
Ben Hutchings | c634263 | 2009-10-12 09:27:07 +0000 | [diff] [blame] | 389 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 390 | schedule_timeout_uninterruptible(HZ / 5); /* 200ms */ |
| 391 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 392 | /* Let XGXS and SerDes out of reset */ |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 393 | falcon_reset_xaui(efx); |
| 394 | |
| 395 | return 0; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 396 | } |
| 397 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 398 | /* Perform a "special software reset" on the PHY. The caller is |
| 399 | * responsible for saving and restoring the PHY hardware registers |
| 400 | * properly, and masking/unmasking LASI */ |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 401 | static int tenxpress_special_reset(struct efx_nic *efx) |
| 402 | { |
| 403 | int rc, reg; |
| 404 | |
Ben Hutchings | c8fcc49 | 2008-09-01 12:49:25 +0100 | [diff] [blame] | 405 | /* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so |
| 406 | * a special software reset can glitch the XGMAC sufficiently for stats |
Ben Hutchings | 1974cc2 | 2009-01-29 18:00:07 +0000 | [diff] [blame] | 407 | * requests to fail. */ |
Ben Hutchings | 55edc6e | 2009-11-25 16:11:35 +0000 | [diff] [blame] | 408 | falcon_stop_nic_stats(efx); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 409 | |
| 410 | /* Initiate reset */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 411 | reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 412 | reg |= (1 << PMA_PMD_EXT_SSR_LBN); |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 413 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 414 | |
Ben Hutchings | c8fcc49 | 2008-09-01 12:49:25 +0100 | [diff] [blame] | 415 | mdelay(200); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 416 | |
| 417 | /* Wait for the blocks to come out of reset */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 418 | rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 419 | if (rc < 0) |
Ben Hutchings | 1974cc2 | 2009-01-29 18:00:07 +0000 | [diff] [blame] | 420 | goto out; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 421 | |
| 422 | /* Try and reconfigure the device */ |
| 423 | rc = tenxpress_init(efx); |
| 424 | if (rc < 0) |
Ben Hutchings | 1974cc2 | 2009-01-29 18:00:07 +0000 | [diff] [blame] | 425 | goto out; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 426 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 427 | /* Wait for the XGXS state machine to churn */ |
| 428 | mdelay(10); |
Ben Hutchings | 1974cc2 | 2009-01-29 18:00:07 +0000 | [diff] [blame] | 429 | out: |
Ben Hutchings | 55edc6e | 2009-11-25 16:11:35 +0000 | [diff] [blame] | 430 | falcon_start_nic_stats(efx); |
Ben Hutchings | c8fcc49 | 2008-09-01 12:49:25 +0100 | [diff] [blame] | 431 | return rc; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 432 | } |
| 433 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 434 | static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 435 | { |
| 436 | struct tenxpress_phy_data *pd = efx->phy_data; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 437 | bool bad_lp; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 438 | int reg; |
| 439 | |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 440 | if (link_ok) { |
| 441 | bad_lp = false; |
| 442 | } else { |
| 443 | /* Check that AN has started but not completed. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 444 | reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_STAT1); |
| 445 | if (!(reg & MDIO_AN_STAT1_LPABLE)) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 446 | return; /* LP status is unknown */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 447 | bad_lp = !(reg & MDIO_AN_STAT1_COMPLETE); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 448 | if (bad_lp) |
| 449 | pd->bad_lp_tries++; |
| 450 | } |
| 451 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 452 | /* Nothing to do if all is well and was previously so. */ |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 453 | if (!pd->bad_lp_tries) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 454 | return; |
| 455 | |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 456 | /* Use the RX (red) LED as an error indicator once we've seen AN |
| 457 | * failure several times in a row, and also log a message. */ |
| 458 | if (!bad_lp || pd->bad_lp_tries == MAX_BAD_LP_TRIES) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 459 | reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, |
| 460 | PMA_PMD_LED_OVERR_REG); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 461 | reg &= ~(PMA_PMD_LED_MASK << PMA_PMD_LED_RX_LBN); |
| 462 | if (!bad_lp) { |
| 463 | reg |= PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN; |
| 464 | } else { |
| 465 | reg |= PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN; |
| 466 | EFX_ERR(efx, "appears to be plugged into a port" |
| 467 | " that is not 10GBASE-T capable. The PHY" |
| 468 | " supports 10GBASE-T ONLY, so no link can" |
| 469 | " be established\n"); |
| 470 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 471 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, |
| 472 | PMA_PMD_LED_OVERR_REG, reg); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 473 | pd->bad_lp_tries = bad_lp; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 474 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 475 | } |
| 476 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 477 | static bool sfx7101_link_ok(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 478 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 479 | return efx_mdio_links_ok(efx, |
| 480 | MDIO_DEVS_PMAPMD | |
| 481 | MDIO_DEVS_PCS | |
| 482 | MDIO_DEVS_PHYXS); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 483 | } |
| 484 | |
| 485 | static bool sft9001_link_ok(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
| 486 | { |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 487 | u32 reg; |
| 488 | |
Ben Hutchings | caa8d8b | 2008-12-26 13:46:12 -0800 | [diff] [blame] | 489 | if (efx_phy_mode_disabled(efx->phy_mode)) |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 490 | return false; |
Ben Hutchings | caa8d8b | 2008-12-26 13:46:12 -0800 | [diff] [blame] | 491 | else if (efx->loopback_mode == LOOPBACK_GPHY) |
| 492 | return true; |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 493 | else if (efx->loopback_mode) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 494 | return efx_mdio_links_ok(efx, |
| 495 | MDIO_DEVS_PMAPMD | |
| 496 | MDIO_DEVS_PHYXS); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 497 | |
| 498 | /* We must use the same definition of link state as LASI, |
| 499 | * otherwise we can miss a link state transition |
| 500 | */ |
| 501 | if (ecmd->speed == 10000) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 502 | reg = efx_mdio_read(efx, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1); |
| 503 | return reg & MDIO_PCS_10GBRT_STAT1_BLKLK; |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 504 | } else { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 505 | reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_STATUS_REG); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 506 | return reg & (1 << C22EXT_STATUS_LINK_LBN); |
| 507 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 508 | } |
| 509 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 510 | static void tenxpress_ext_loopback(struct efx_nic *efx) |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 511 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 512 | efx_mdio_set_flag(efx, MDIO_MMD_PHYXS, PHYXS_TEST1, |
| 513 | 1 << LOOPBACK_NEAR_LBN, |
| 514 | efx->loopback_mode == LOOPBACK_PHYXS); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 515 | if (efx->phy_type != PHY_TYPE_SFX7101) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 516 | efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, GPHY_XCONTROL_REG, |
| 517 | 1 << GPHY_LOOPBACK_NEAR_LBN, |
| 518 | efx->loopback_mode == LOOPBACK_GPHY); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 519 | } |
| 520 | |
| 521 | static void tenxpress_low_power(struct efx_nic *efx) |
| 522 | { |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 523 | if (efx->phy_type == PHY_TYPE_SFX7101) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 524 | efx_mdio_set_mmds_lpower( |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 525 | efx, !!(efx->phy_mode & PHY_MODE_LOW_POWER), |
| 526 | TENXPRESS_REQUIRED_DEVS); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 527 | else |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 528 | efx_mdio_set_flag( |
| 529 | efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, |
| 530 | 1 << PMA_PMD_EXT_LPOWER_LBN, |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 531 | !!(efx->phy_mode & PHY_MODE_LOW_POWER)); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 532 | } |
| 533 | |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 534 | static int tenxpress_phy_reconfigure(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 535 | { |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 536 | struct tenxpress_phy_data *phy_data = efx->phy_data; |
Steve Hodgson | 8b9dc8d | 2009-01-29 17:49:09 +0000 | [diff] [blame] | 537 | bool phy_mode_change, loop_reset; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 538 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 539 | if (efx->phy_mode & (PHY_MODE_OFF | PHY_MODE_SPECIAL)) { |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 540 | phy_data->phy_mode = efx->phy_mode; |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 541 | return 0; |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 542 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 543 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 544 | phy_mode_change = (efx->phy_mode == PHY_MODE_NORMAL && |
| 545 | phy_data->phy_mode != PHY_MODE_NORMAL); |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 546 | loop_reset = (LOOPBACK_OUT_OF(phy_data, efx, LOOPBACKS_EXTERNAL(efx)) || |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 547 | LOOPBACK_CHANGED(phy_data, efx, 1 << LOOPBACK_GPHY)); |
| 548 | |
Steve Hodgson | 8b9dc8d | 2009-01-29 17:49:09 +0000 | [diff] [blame] | 549 | if (loop_reset || phy_mode_change) { |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 550 | tenxpress_special_reset(efx); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 551 | |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 552 | /* Reset XAUI if we were in 10G, and are staying |
| 553 | * in 10G. If we're moving into and out of 10G |
| 554 | * then xaui will be reset anyway */ |
| 555 | if (EFX_IS10G(efx)) |
| 556 | falcon_reset_xaui(efx); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 557 | } |
| 558 | |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 559 | tenxpress_low_power(efx); |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 560 | efx_mdio_transmit_disable(efx); |
| 561 | efx_mdio_phy_reconfigure(efx); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 562 | tenxpress_ext_loopback(efx); |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 563 | efx_mdio_an_reconfigure(efx); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 564 | |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 565 | phy_data->loopback_mode = efx->loopback_mode; |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 566 | phy_data->phy_mode = efx->phy_mode; |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 567 | |
| 568 | return 0; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 569 | } |
| 570 | |
Steve Hodgson | fdaa9ae | 2009-11-28 05:34:05 +0000 | [diff] [blame] | 571 | static void |
| 572 | tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd); |
| 573 | |
| 574 | /* Poll for link state changes */ |
| 575 | static bool tenxpress_phy_poll(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 576 | { |
Steve Hodgson | fdaa9ae | 2009-11-28 05:34:05 +0000 | [diff] [blame] | 577 | struct efx_link_state old_state = efx->link_state; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 578 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 579 | if (efx->phy_type == PHY_TYPE_SFX7101) { |
Steve Hodgson | fdaa9ae | 2009-11-28 05:34:05 +0000 | [diff] [blame] | 580 | efx->link_state.up = sfx7101_link_ok(efx); |
| 581 | efx->link_state.speed = 10000; |
| 582 | efx->link_state.fd = true; |
| 583 | efx->link_state.fc = efx_mdio_get_pause(efx); |
| 584 | |
| 585 | sfx7101_check_bad_lp(efx, efx->link_state.up); |
Ben Hutchings | 766ca0f | 2008-12-12 21:59:24 -0800 | [diff] [blame] | 586 | } else { |
Steve Hodgson | fdaa9ae | 2009-11-28 05:34:05 +0000 | [diff] [blame] | 587 | struct ethtool_cmd ecmd; |
| 588 | |
| 589 | /* Check the LASI alarm first */ |
| 590 | if (efx->loopback_mode == LOOPBACK_NONE && |
| 591 | !(efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT) & |
| 592 | MDIO_PMA_LASI_LSALARM)) |
| 593 | return false; |
| 594 | |
| 595 | tenxpress_get_settings(efx, &ecmd); |
| 596 | |
| 597 | efx->link_state.up = sft9001_link_ok(efx, &ecmd); |
| 598 | efx->link_state.speed = ecmd.speed; |
| 599 | efx->link_state.fd = (ecmd.duplex == DUPLEX_FULL); |
| 600 | efx->link_state.fc = efx_mdio_get_pause(efx); |
Ben Hutchings | 766ca0f | 2008-12-12 21:59:24 -0800 | [diff] [blame] | 601 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 602 | |
Steve Hodgson | fdaa9ae | 2009-11-28 05:34:05 +0000 | [diff] [blame] | 603 | return !efx_link_state_equal(&efx->link_state, &old_state); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 604 | } |
| 605 | |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 606 | static void sfx7101_phy_fini(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 607 | { |
| 608 | int reg; |
| 609 | |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 610 | /* Power down the LNPGA */ |
| 611 | reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN); |
| 612 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg); |
| 613 | |
| 614 | /* Waiting here ensures that the board fini, which can turn |
| 615 | * off the power to the PHY, won't get run until the LNPGA |
| 616 | * powerdown has been given long enough to complete. */ |
| 617 | schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */ |
| 618 | } |
| 619 | |
| 620 | static void tenxpress_phy_remove(struct efx_nic *efx) |
| 621 | { |
Ben Hutchings | 2a7e637 | 2009-01-11 00:18:13 -0800 | [diff] [blame] | 622 | if (efx->phy_type == PHY_TYPE_SFT9001B) |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 623 | device_remove_file(&efx->pci_dev->dev, |
| 624 | &dev_attr_phy_short_reach); |
Ben Hutchings | 2a7e637 | 2009-01-11 00:18:13 -0800 | [diff] [blame] | 625 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 626 | kfree(efx->phy_data); |
| 627 | efx->phy_data = NULL; |
| 628 | } |
| 629 | |
| 630 | |
Ben Hutchings | 398468e | 2009-11-23 16:03:45 +0000 | [diff] [blame] | 631 | /* Override the RX, TX and link LEDs */ |
| 632 | void tenxpress_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 633 | { |
| 634 | int reg; |
| 635 | |
Ben Hutchings | 398468e | 2009-11-23 16:03:45 +0000 | [diff] [blame] | 636 | switch (mode) { |
| 637 | case EFX_LED_OFF: |
| 638 | reg = (PMA_PMD_LED_OFF << PMA_PMD_LED_TX_LBN) | |
| 639 | (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN) | |
| 640 | (PMA_PMD_LED_OFF << PMA_PMD_LED_LINK_LBN); |
| 641 | break; |
| 642 | case EFX_LED_ON: |
| 643 | reg = (PMA_PMD_LED_ON << PMA_PMD_LED_TX_LBN) | |
| 644 | (PMA_PMD_LED_ON << PMA_PMD_LED_RX_LBN) | |
| 645 | (PMA_PMD_LED_ON << PMA_PMD_LED_LINK_LBN); |
| 646 | break; |
| 647 | default: |
Ben Hutchings | dcf477b | 2009-11-23 16:02:49 +0000 | [diff] [blame] | 648 | if (efx->phy_type == PHY_TYPE_SFX7101) |
| 649 | reg = SFX7101_PMA_PMD_LED_DEFAULT; |
| 650 | else |
| 651 | reg = SFT9001_PMA_PMD_LED_DEFAULT; |
Ben Hutchings | 398468e | 2009-11-23 16:03:45 +0000 | [diff] [blame] | 652 | break; |
| 653 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 654 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 655 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, reg); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 656 | } |
| 657 | |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 658 | static const char *const sfx7101_test_names[] = { |
Ben Hutchings | 1796721 | 2008-12-26 13:47:25 -0800 | [diff] [blame] | 659 | "bist" |
| 660 | }; |
| 661 | |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 662 | static const char *sfx7101_test_name(struct efx_nic *efx, unsigned int index) |
| 663 | { |
| 664 | if (index < ARRAY_SIZE(sfx7101_test_names)) |
| 665 | return sfx7101_test_names[index]; |
| 666 | return NULL; |
| 667 | } |
| 668 | |
Ben Hutchings | 1796721 | 2008-12-26 13:47:25 -0800 | [diff] [blame] | 669 | static int |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 670 | sfx7101_run_tests(struct efx_nic *efx, int *results, unsigned flags) |
Ben Hutchings | 8c8661e | 2008-09-01 12:49:02 +0100 | [diff] [blame] | 671 | { |
Ben Hutchings | 1796721 | 2008-12-26 13:47:25 -0800 | [diff] [blame] | 672 | int rc; |
| 673 | |
| 674 | if (!(flags & ETH_TEST_FL_OFFLINE)) |
| 675 | return 0; |
| 676 | |
Ben Hutchings | 8c8661e | 2008-09-01 12:49:02 +0100 | [diff] [blame] | 677 | /* BIST is automatically run after a special software reset */ |
Ben Hutchings | 1796721 | 2008-12-26 13:47:25 -0800 | [diff] [blame] | 678 | rc = tenxpress_special_reset(efx); |
| 679 | results[0] = rc ? -1 : 1; |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 680 | |
| 681 | efx_mdio_an_reconfigure(efx); |
| 682 | |
Ben Hutchings | 1796721 | 2008-12-26 13:47:25 -0800 | [diff] [blame] | 683 | return rc; |
Ben Hutchings | 8c8661e | 2008-09-01 12:49:02 +0100 | [diff] [blame] | 684 | } |
| 685 | |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 686 | static const char *const sft9001_test_names[] = { |
| 687 | "bist", |
| 688 | "cable.pairA.status", |
| 689 | "cable.pairB.status", |
| 690 | "cable.pairC.status", |
| 691 | "cable.pairD.status", |
| 692 | "cable.pairA.length", |
| 693 | "cable.pairB.length", |
| 694 | "cable.pairC.length", |
| 695 | "cable.pairD.length", |
| 696 | }; |
| 697 | |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 698 | static const char *sft9001_test_name(struct efx_nic *efx, unsigned int index) |
| 699 | { |
| 700 | if (index < ARRAY_SIZE(sft9001_test_names)) |
| 701 | return sft9001_test_names[index]; |
| 702 | return NULL; |
| 703 | } |
| 704 | |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 705 | static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags) |
| 706 | { |
Ben Hutchings | 22ef02c | 2009-02-27 13:04:07 +0000 | [diff] [blame] | 707 | int rc = 0, rc2, i, ctrl_reg, res_reg; |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 708 | |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 709 | /* Initialise cable diagnostic results to unknown failure */ |
| 710 | for (i = 1; i < 9; ++i) |
| 711 | results[i] = -1; |
| 712 | |
| 713 | /* Run cable diagnostics; wait up to 5 seconds for them to complete. |
| 714 | * A cable fault is not a self-test failure, but a timeout is. */ |
Ben Hutchings | 22ef02c | 2009-02-27 13:04:07 +0000 | [diff] [blame] | 715 | ctrl_reg = ((1 << CDIAG_CTRL_IMMED_LBN) | |
| 716 | (CDIAG_CTRL_LEN_METRES << CDIAG_CTRL_LEN_UNIT_LBN)); |
| 717 | if (flags & ETH_TEST_FL_OFFLINE) { |
| 718 | /* Break the link in order to run full diagnostics. We |
| 719 | * must reset the PHY to resume normal service. */ |
| 720 | ctrl_reg |= (1 << CDIAG_CTRL_BRK_LINK_LBN); |
| 721 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 722 | efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG, |
| 723 | ctrl_reg); |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 724 | i = 0; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 725 | while (efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG) & |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 726 | (1 << CDIAG_CTRL_IN_PROG_LBN)) { |
| 727 | if (++i == 50) { |
| 728 | rc = -ETIMEDOUT; |
Ben Hutchings | 22ef02c | 2009-02-27 13:04:07 +0000 | [diff] [blame] | 729 | goto out; |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 730 | } |
| 731 | msleep(100); |
| 732 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 733 | res_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_RES_REG); |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 734 | for (i = 0; i < 4; i++) { |
| 735 | int pair_res = |
| 736 | (res_reg >> (CDIAG_RES_A_LBN - i * CDIAG_RES_WIDTH)) |
| 737 | & ((1 << CDIAG_RES_WIDTH) - 1); |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 738 | int len_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, |
| 739 | PMA_PMD_CDIAG_LEN_REG + i); |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 740 | if (pair_res == CDIAG_RES_OK) |
| 741 | results[1 + i] = 1; |
| 742 | else if (pair_res == CDIAG_RES_INVALID) |
| 743 | results[1 + i] = -1; |
| 744 | else |
| 745 | results[1 + i] = -pair_res; |
| 746 | if (pair_res != CDIAG_RES_INVALID && |
| 747 | pair_res != CDIAG_RES_OPEN && |
| 748 | len_reg != 0xffff) |
| 749 | results[5 + i] = len_reg; |
| 750 | } |
| 751 | |
Ben Hutchings | 22ef02c | 2009-02-27 13:04:07 +0000 | [diff] [blame] | 752 | out: |
| 753 | if (flags & ETH_TEST_FL_OFFLINE) { |
| 754 | /* Reset, running the BIST and then resuming normal service. */ |
| 755 | rc2 = tenxpress_special_reset(efx); |
| 756 | results[0] = rc2 ? -1 : 1; |
| 757 | if (!rc) |
| 758 | rc = rc2; |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 759 | |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 760 | efx_mdio_an_reconfigure(efx); |
Ben Hutchings | 22ef02c | 2009-02-27 13:04:07 +0000 | [diff] [blame] | 761 | } |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 762 | |
| 763 | return rc; |
| 764 | } |
| 765 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 766 | static void |
| 767 | tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 768 | { |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 769 | u32 adv = 0, lpa = 0; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 770 | int reg; |
| 771 | |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 772 | if (efx->phy_type != PHY_TYPE_SFX7101) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 773 | reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL); |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 774 | if (reg & (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN)) |
| 775 | adv |= ADVERTISED_1000baseT_Full; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 776 | reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_STATUS); |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 777 | if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN)) |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 778 | lpa |= ADVERTISED_1000baseT_Half; |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 779 | if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN)) |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 780 | lpa |= ADVERTISED_1000baseT_Full; |
| 781 | } |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 782 | reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL); |
| 783 | if (reg & MDIO_AN_10GBT_CTRL_ADV10G) |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 784 | adv |= ADVERTISED_10000baseT_Full; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 785 | reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); |
| 786 | if (reg & MDIO_AN_10GBT_STAT_LP10G) |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 787 | lpa |= ADVERTISED_10000baseT_Full; |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 788 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 789 | mdio45_ethtool_gset_npage(&efx->mdio, ecmd, adv, lpa); |
Ben Hutchings | 04cc8ca | 2008-12-12 21:50:46 -0800 | [diff] [blame] | 790 | |
Ben Hutchings | e762cd7 | 2009-06-10 05:30:05 +0000 | [diff] [blame] | 791 | if (efx->phy_type != PHY_TYPE_SFX7101) { |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 792 | ecmd->supported |= (SUPPORTED_100baseT_Full | |
| 793 | SUPPORTED_1000baseT_Full); |
Ben Hutchings | e762cd7 | 2009-06-10 05:30:05 +0000 | [diff] [blame] | 794 | if (ecmd->speed != SPEED_10000) { |
| 795 | ecmd->eth_tp_mdix = |
| 796 | (efx_mdio_read(efx, MDIO_MMD_PMAPMD, |
| 797 | PMA_PMD_XSTATUS_REG) & |
| 798 | (1 << PMA_PMD_XSTAT_MDIX_LBN)) |
| 799 | ? ETH_TP_MDI_X : ETH_TP_MDI; |
| 800 | } |
| 801 | } |
Steve Hodgson | 8b9dc8d | 2009-01-29 17:49:09 +0000 | [diff] [blame] | 802 | |
| 803 | /* In loopback, the PHY automatically brings up the correct interface, |
| 804 | * but doesn't advertise the correct speed. So override it */ |
| 805 | if (efx->loopback_mode == LOOPBACK_GPHY) |
| 806 | ecmd->speed = SPEED_1000; |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 807 | else if (LOOPBACK_EXTERNAL(efx)) |
Steve Hodgson | 8b9dc8d | 2009-01-29 17:49:09 +0000 | [diff] [blame] | 808 | ecmd->speed = SPEED_10000; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 809 | } |
| 810 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 811 | static int tenxpress_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 812 | { |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 813 | if (!ecmd->autoneg) |
| 814 | return -EINVAL; |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 815 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 816 | return efx_mdio_set_settings(efx, ecmd); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 817 | } |
| 818 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 819 | static void sfx7101_set_npage_adv(struct efx_nic *efx, u32 advertising) |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 820 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 821 | efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, |
| 822 | MDIO_AN_10GBT_CTRL_ADV10G, |
| 823 | advertising & ADVERTISED_10000baseT_Full); |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 824 | } |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 825 | |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 826 | static void sft9001_set_npage_adv(struct efx_nic *efx, u32 advertising) |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 827 | { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 828 | efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL, |
| 829 | 1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN, |
| 830 | advertising & ADVERTISED_1000baseT_Full); |
| 831 | efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, |
| 832 | MDIO_AN_10GBT_CTRL_ADV10G, |
| 833 | advertising & ADVERTISED_10000baseT_Full); |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 834 | } |
| 835 | |
| 836 | struct efx_phy_operations falcon_sfx7101_phy_ops = { |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 837 | .probe = tenxpress_phy_probe, |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 838 | .init = tenxpress_phy_init, |
| 839 | .reconfigure = tenxpress_phy_reconfigure, |
Ben Hutchings | 766ca0f | 2008-12-12 21:59:24 -0800 | [diff] [blame] | 840 | .poll = tenxpress_phy_poll, |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 841 | .fini = sfx7101_phy_fini, |
| 842 | .remove = tenxpress_phy_remove, |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 843 | .get_settings = tenxpress_get_settings, |
| 844 | .set_settings = tenxpress_set_settings, |
| 845 | .set_npage_adv = sfx7101_set_npage_adv, |
Ben Hutchings | 4f16c07 | 2010-02-03 09:30:50 +0000 | [diff] [blame] | 846 | .test_alive = efx_mdio_test_alive, |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 847 | .test_name = sfx7101_test_name, |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 848 | .run_tests = sfx7101_run_tests, |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 849 | }; |
| 850 | |
| 851 | struct efx_phy_operations falcon_sft9001_phy_ops = { |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 852 | .probe = tenxpress_phy_probe, |
Ben Hutchings | e6fa2eb | 2008-12-12 22:00:17 -0800 | [diff] [blame] | 853 | .init = tenxpress_phy_init, |
| 854 | .reconfigure = tenxpress_phy_reconfigure, |
| 855 | .poll = tenxpress_phy_poll, |
Steve Hodgson | ff3b00a | 2009-12-23 13:46:36 +0000 | [diff] [blame] | 856 | .fini = efx_port_dummy_op_void, |
| 857 | .remove = tenxpress_phy_remove, |
Ben Hutchings | af4ad9b | 2009-01-29 17:59:37 +0000 | [diff] [blame] | 858 | .get_settings = tenxpress_get_settings, |
| 859 | .set_settings = tenxpress_set_settings, |
| 860 | .set_npage_adv = sft9001_set_npage_adv, |
Ben Hutchings | 4f16c07 | 2010-02-03 09:30:50 +0000 | [diff] [blame] | 861 | .test_alive = efx_mdio_test_alive, |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 862 | .test_name = sft9001_test_name, |
Ben Hutchings | 307505e | 2008-12-26 13:48:00 -0800 | [diff] [blame] | 863 | .run_tests = sft9001_run_tests, |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 864 | }; |