blob: f21efe7bd316e3618664cbcd0f1e94ef42a97ea9 [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
Ben Hutchings177dfcd2008-12-12 21:50:08 -08002 * Driver for Solarflare Solarstorm network controllers and boards
Ben Hutchings906bb262009-11-29 15:16:19 +00003 * Copyright 2007-2009 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +01004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/delay.h>
Herbert Xuda3bc072009-01-18 21:50:16 -080011#include <linux/rtnetlink.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010012#include <linux/seq_file.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090013#include <linux/slab.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010014#include "efx.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010015#include "mdio_10g.h"
Ben Hutchings744093c2009-11-29 15:12:08 +000016#include "nic.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010017#include "phy.h"
Ben Hutchings3e6c4532009-10-23 08:30:36 +000018#include "regs.h"
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080019#include "workarounds.h"
20#include "selftest.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010021
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080022/* We expect these MMDs to be in the package. SFT9001 also has a
23 * clause 22 extension MMD, but since it doesn't have all the generic
24 * MMD registers it is pointless to include it here.
25 */
Ben Hutchings68e7f452009-04-29 08:05:08 +000026#define TENXPRESS_REQUIRED_DEVS (MDIO_DEVS_PMAPMD | \
27 MDIO_DEVS_PCS | \
28 MDIO_DEVS_PHYXS | \
29 MDIO_DEVS_AN)
Ben Hutchings8ceee662008-04-27 12:55:59 +010030
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080031#define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \
32 (1 << LOOPBACK_PCS) | \
33 (1 << LOOPBACK_PMAPMD) | \
Ben Hutchingse58f69f2009-11-29 15:08:41 +000034 (1 << LOOPBACK_PHYXS_WS))
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080035
36#define SFT9001_LOOPBACKS ((1 << LOOPBACK_GPHY) | \
37 (1 << LOOPBACK_PHYXS) | \
38 (1 << LOOPBACK_PCS) | \
39 (1 << LOOPBACK_PMAPMD) | \
Ben Hutchingse58f69f2009-11-29 15:08:41 +000040 (1 << LOOPBACK_PHYXS_WS))
Ben Hutchings3273c2e2008-05-07 13:36:19 +010041
Ben Hutchings8ceee662008-04-27 12:55:59 +010042/* We complain if we fail to see the link partner as 10G capable this many
43 * times in a row (must be > 1 as sampling the autoneg. registers is racy)
44 */
45#define MAX_BAD_LP_TRIES (5)
46
47/* Extended control register */
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080048#define PMA_PMD_XCONTROL_REG 49152
49#define PMA_PMD_EXT_GMII_EN_LBN 1
50#define PMA_PMD_EXT_GMII_EN_WIDTH 1
51#define PMA_PMD_EXT_CLK_OUT_LBN 2
52#define PMA_PMD_EXT_CLK_OUT_WIDTH 1
53#define PMA_PMD_LNPGA_POWERDOWN_LBN 8 /* SFX7101 only */
54#define PMA_PMD_LNPGA_POWERDOWN_WIDTH 1
55#define PMA_PMD_EXT_CLK312_LBN 8 /* SFT9001 only */
56#define PMA_PMD_EXT_CLK312_WIDTH 1
57#define PMA_PMD_EXT_LPOWER_LBN 12
58#define PMA_PMD_EXT_LPOWER_WIDTH 1
Steve Hodgson869b5b32009-01-29 17:48:10 +000059#define PMA_PMD_EXT_ROBUST_LBN 14
60#define PMA_PMD_EXT_ROBUST_WIDTH 1
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080061#define PMA_PMD_EXT_SSR_LBN 15
62#define PMA_PMD_EXT_SSR_WIDTH 1
Ben Hutchings8ceee662008-04-27 12:55:59 +010063
64/* extended status register */
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080065#define PMA_PMD_XSTATUS_REG 49153
Ben Hutchingse762cd72009-06-10 05:30:05 +000066#define PMA_PMD_XSTAT_MDIX_LBN 14
Ben Hutchings8ceee662008-04-27 12:55:59 +010067#define PMA_PMD_XSTAT_FLP_LBN (12)
68
69/* LED control register */
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080070#define PMA_PMD_LED_CTRL_REG 49159
Ben Hutchings8ceee662008-04-27 12:55:59 +010071#define PMA_PMA_LED_ACTIVITY_LBN (3)
72
73/* LED function override register */
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080074#define PMA_PMD_LED_OVERR_REG 49161
Ben Hutchings8ceee662008-04-27 12:55:59 +010075/* Bit positions for different LEDs (there are more but not wired on SFE4001)*/
76#define PMA_PMD_LED_LINK_LBN (0)
77#define PMA_PMD_LED_SPEED_LBN (2)
78#define PMA_PMD_LED_TX_LBN (4)
79#define PMA_PMD_LED_RX_LBN (6)
80/* Override settings */
81#define PMA_PMD_LED_AUTO (0) /* H/W control */
82#define PMA_PMD_LED_ON (1)
83#define PMA_PMD_LED_OFF (2)
84#define PMA_PMD_LED_FLASH (3)
Ben Hutchings04cc8ca2008-12-12 21:50:46 -080085#define PMA_PMD_LED_MASK 3
Ben Hutchings8ceee662008-04-27 12:55:59 +010086/* All LEDs under hardware control */
Ben Hutchingsdcf477b2009-11-23 16:02:49 +000087#define SFT9001_PMA_PMD_LED_DEFAULT 0
Ben Hutchings8ceee662008-04-27 12:55:59 +010088/* Green and Amber under hardware control, Red off */
Ben Hutchingsdcf477b2009-11-23 16:02:49 +000089#define SFX7101_PMA_PMD_LED_DEFAULT (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
Ben Hutchings8ceee662008-04-27 12:55:59 +010090
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -080091#define PMA_PMD_SPEED_ENABLE_REG 49192
92#define PMA_PMD_100TX_ADV_LBN 1
93#define PMA_PMD_100TX_ADV_WIDTH 1
94#define PMA_PMD_1000T_ADV_LBN 2
95#define PMA_PMD_1000T_ADV_WIDTH 1
96#define PMA_PMD_10000T_ADV_LBN 3
97#define PMA_PMD_10000T_ADV_WIDTH 1
98#define PMA_PMD_SPEED_LBN 4
99#define PMA_PMD_SPEED_WIDTH 4
Ben Hutchings8ceee662008-04-27 12:55:59 +0100100
Ben Hutchings307505e2008-12-26 13:48:00 -0800101/* Cable diagnostics - SFT9001 only */
102#define PMA_PMD_CDIAG_CTRL_REG 49213
103#define CDIAG_CTRL_IMMED_LBN 15
104#define CDIAG_CTRL_BRK_LINK_LBN 12
105#define CDIAG_CTRL_IN_PROG_LBN 11
106#define CDIAG_CTRL_LEN_UNIT_LBN 10
107#define CDIAG_CTRL_LEN_METRES 1
108#define PMA_PMD_CDIAG_RES_REG 49174
109#define CDIAG_RES_A_LBN 12
110#define CDIAG_RES_B_LBN 8
111#define CDIAG_RES_C_LBN 4
112#define CDIAG_RES_D_LBN 0
113#define CDIAG_RES_WIDTH 4
114#define CDIAG_RES_OPEN 2
115#define CDIAG_RES_OK 1
116#define CDIAG_RES_INVALID 0
117/* Set of 4 registers for pairs A-D */
118#define PMA_PMD_CDIAG_LEN_REG 49175
119
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800120/* Serdes control registers - SFT9001 only */
121#define PMA_PMD_CSERDES_CTRL_REG 64258
122/* Set the 156.25 MHz output to 312.5 MHz to drive Falcon's XMAC */
123#define PMA_PMD_CSERDES_DEFAULT 0x000f
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100124
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800125/* Misc register defines - SFX7101 only */
126#define PCS_CLOCK_CTRL_REG 55297
Ben Hutchings8ceee662008-04-27 12:55:59 +0100127#define PLL312_RST_N_LBN 2
128
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800129#define PCS_SOFT_RST2_REG 55302
Ben Hutchings8ceee662008-04-27 12:55:59 +0100130#define SERDES_RST_N_LBN 13
131#define XGXS_RST_N_LBN 12
132
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800133#define PCS_TEST_SELECT_REG 55303 /* PRM 10.5.8 */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100134#define CLK312_EN_LBN 3
135
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100136/* PHYXS registers */
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800137#define PHYXS_XCONTROL_REG 49152
138#define PHYXS_RESET_LBN 15
139#define PHYXS_RESET_WIDTH 1
140
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100141#define PHYXS_TEST1 (49162)
142#define LOOPBACK_NEAR_LBN (8)
143#define LOOPBACK_NEAR_WIDTH (1)
144
Ben Hutchings8ceee662008-04-27 12:55:59 +0100145/* Boot status register */
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000146#define PCS_BOOT_STATUS_REG 53248
147#define PCS_BOOT_FATAL_ERROR_LBN 0
148#define PCS_BOOT_PROGRESS_LBN 1
149#define PCS_BOOT_PROGRESS_WIDTH 2
150#define PCS_BOOT_PROGRESS_INIT 0
151#define PCS_BOOT_PROGRESS_WAIT_MDIO 1
152#define PCS_BOOT_PROGRESS_CHECKSUM 2
153#define PCS_BOOT_PROGRESS_JUMP 3
154#define PCS_BOOT_DOWNLOAD_WAIT_LBN 3
155#define PCS_BOOT_CODE_STARTED_LBN 4
Ben Hutchings8ceee662008-04-27 12:55:59 +0100156
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800157/* 100M/1G PHY registers */
158#define GPHY_XCONTROL_REG 49152
159#define GPHY_ISOLATE_LBN 10
160#define GPHY_ISOLATE_WIDTH 1
161#define GPHY_DUPLEX_LBN 8
162#define GPHY_DUPLEX_WIDTH 1
163#define GPHY_LOOPBACK_NEAR_LBN 14
164#define GPHY_LOOPBACK_NEAR_WIDTH 1
165
166#define C22EXT_STATUS_REG 49153
167#define C22EXT_STATUS_LINK_LBN 2
168#define C22EXT_STATUS_LINK_WIDTH 1
169
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000170#define C22EXT_MSTSLV_CTRL 49161
171#define C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN 8
172#define C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN 9
173
174#define C22EXT_MSTSLV_STATUS 49162
175#define C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN 10
176#define C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN 11
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800177
Ben Hutchings8ceee662008-04-27 12:55:59 +0100178/* Time to wait between powering down the LNPGA and turning off the power
179 * rails */
180#define LNPGA_PDOWN_WAIT (HZ / 5)
181
Ben Hutchings8ceee662008-04-27 12:55:59 +0100182struct tenxpress_phy_data {
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100183 enum efx_loopback_mode loopback_mode;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100184 enum efx_phy_mode phy_mode;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100185 int bad_lp_tries;
186};
187
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800188static ssize_t show_phy_short_reach(struct device *dev,
189 struct device_attribute *attr, char *buf)
190{
191 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
192 int reg;
193
Ben Hutchings68e7f452009-04-29 08:05:08 +0000194 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR);
195 return sprintf(buf, "%d\n", !!(reg & MDIO_PMA_10GBT_TXPWR_SHORT));
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800196}
197
198static ssize_t set_phy_short_reach(struct device *dev,
199 struct device_attribute *attr,
200 const char *buf, size_t count)
201{
202 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000203 int rc;
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800204
205 rtnl_lock();
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000206 if (efx->state != STATE_RUNNING) {
207 rc = -EBUSY;
208 } else {
209 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR,
210 MDIO_PMA_10GBT_TXPWR_SHORT,
211 count != 0 && *buf != '0');
212 rc = efx_reconfigure_port(efx);
213 }
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800214 rtnl_unlock();
215
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000216 return rc < 0 ? rc : (ssize_t)count;
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800217}
218
219static DEVICE_ATTR(phy_short_reach, 0644, show_phy_short_reach,
220 set_phy_short_reach);
221
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000222int sft9001_wait_boot(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100223{
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000224 unsigned long timeout = jiffies + HZ + 1;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100225 int boot_stat;
226
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000227 for (;;) {
Ben Hutchings68e7f452009-04-29 08:05:08 +0000228 boot_stat = efx_mdio_read(efx, MDIO_MMD_PCS,
229 PCS_BOOT_STATUS_REG);
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000230 if (boot_stat >= 0) {
231 EFX_LOG(efx, "PHY boot status = %#x\n", boot_stat);
232 switch (boot_stat &
233 ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
234 (3 << PCS_BOOT_PROGRESS_LBN) |
235 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) |
236 (1 << PCS_BOOT_CODE_STARTED_LBN))) {
237 case ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
238 (PCS_BOOT_PROGRESS_CHECKSUM <<
239 PCS_BOOT_PROGRESS_LBN)):
240 case ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
241 (PCS_BOOT_PROGRESS_INIT <<
242 PCS_BOOT_PROGRESS_LBN) |
243 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)):
244 return -EINVAL;
245 case ((PCS_BOOT_PROGRESS_WAIT_MDIO <<
246 PCS_BOOT_PROGRESS_LBN) |
247 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)):
248 return (efx->phy_mode & PHY_MODE_SPECIAL) ?
249 0 : -EIO;
250 case ((PCS_BOOT_PROGRESS_JUMP <<
251 PCS_BOOT_PROGRESS_LBN) |
252 (1 << PCS_BOOT_CODE_STARTED_LBN)):
253 case ((PCS_BOOT_PROGRESS_JUMP <<
254 PCS_BOOT_PROGRESS_LBN) |
255 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) |
256 (1 << PCS_BOOT_CODE_STARTED_LBN)):
257 return (efx->phy_mode & PHY_MODE_SPECIAL) ?
258 -EIO : 0;
259 default:
260 if (boot_stat & (1 << PCS_BOOT_FATAL_ERROR_LBN))
261 return -EIO;
262 break;
263 }
264 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100265
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000266 if (time_after_eq(jiffies, timeout))
267 return -ETIMEDOUT;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100268
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000269 msleep(50);
270 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100271}
272
Ben Hutchings8ceee662008-04-27 12:55:59 +0100273static int tenxpress_init(struct efx_nic *efx)
274{
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800275 int reg;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100276
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800277 if (efx->phy_type == PHY_TYPE_SFX7101) {
278 /* Enable 312.5 MHz clock */
Ben Hutchings68e7f452009-04-29 08:05:08 +0000279 efx_mdio_write(efx, MDIO_MMD_PCS, PCS_TEST_SELECT_REG,
280 1 << CLK312_EN_LBN);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800281 } else {
282 /* Enable 312.5 MHz clock and GMII */
Ben Hutchings68e7f452009-04-29 08:05:08 +0000283 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800284 reg |= ((1 << PMA_PMD_EXT_GMII_EN_LBN) |
285 (1 << PMA_PMD_EXT_CLK_OUT_LBN) |
Steve Hodgson869b5b32009-01-29 17:48:10 +0000286 (1 << PMA_PMD_EXT_CLK312_LBN) |
287 (1 << PMA_PMD_EXT_ROBUST_LBN));
288
Ben Hutchings68e7f452009-04-29 08:05:08 +0000289 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
290 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT,
291 GPHY_XCONTROL_REG, 1 << GPHY_ISOLATE_LBN,
292 false);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800293 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100294
Ben Hutchings8ceee662008-04-27 12:55:59 +0100295 /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800296 if (efx->phy_type == PHY_TYPE_SFX7101) {
Ben Hutchings68e7f452009-04-29 08:05:08 +0000297 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG,
298 1 << PMA_PMA_LED_ACTIVITY_LBN, true);
299 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG,
Ben Hutchingsdcf477b2009-11-23 16:02:49 +0000300 SFX7101_PMA_PMD_LED_DEFAULT);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800301 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100302
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000303 return 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100304}
305
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000306static int tenxpress_phy_probe(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100307{
308 struct tenxpress_phy_data *phy_data;
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000309 int rc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100310
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000311 /* Allocate phy private storage */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100312 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
Ben Hutchings9b7bfc42008-05-16 21:20:20 +0100313 if (!phy_data)
314 return -ENOMEM;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100315 efx->phy_data = phy_data;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100316 phy_data->phy_mode = efx->phy_mode;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100317
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000318 /* Create any special files */
319 if (efx->phy_type == PHY_TYPE_SFT9001B) {
320 rc = device_create_file(&efx->pci_dev->dev,
321 &dev_attr_phy_short_reach);
322 if (rc)
323 goto fail;
324 }
325
326 if (efx->phy_type == PHY_TYPE_SFX7101) {
327 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS;
328 efx->mdio.mode_support = MDIO_SUPPORTS_C45;
329
330 efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS;
331
332 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg |
333 ADVERTISED_10000baseT_Full);
334 } else {
335 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS;
336 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
337
338 efx->loopback_modes = (SFT9001_LOOPBACKS |
339 FALCON_XMAC_LOOPBACKS |
340 FALCON_GMAC_LOOPBACKS);
341
342 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg |
343 ADVERTISED_10000baseT_Full |
344 ADVERTISED_1000baseT_Full |
345 ADVERTISED_100baseT_Full);
346 }
347
348 return 0;
349
350fail:
351 kfree(efx->phy_data);
352 efx->phy_data = NULL;
353 return rc;
354}
355
356static int tenxpress_phy_init(struct efx_nic *efx)
357{
358 int rc;
359
360 falcon_board(efx)->type->init_phy(efx);
361
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800362 if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
363 if (efx->phy_type == PHY_TYPE_SFT9001A) {
364 int reg;
Ben Hutchings68e7f452009-04-29 08:05:08 +0000365 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
366 PMA_PMD_XCONTROL_REG);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800367 reg |= (1 << PMA_PMD_EXT_SSR_LBN);
Ben Hutchings68e7f452009-04-29 08:05:08 +0000368 efx_mdio_write(efx, MDIO_MMD_PMAPMD,
369 PMA_PMD_XCONTROL_REG, reg);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800370 mdelay(200);
371 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100372
Ben Hutchings68e7f452009-04-29 08:05:08 +0000373 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800374 if (rc < 0)
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000375 return rc;
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800376
Ben Hutchings68e7f452009-04-29 08:05:08 +0000377 rc = efx_mdio_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800378 if (rc < 0)
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000379 return rc;
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800380 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100381
382 rc = tenxpress_init(efx);
383 if (rc < 0)
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000384 return rc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100385
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000386 /* Reinitialise flow control settings */
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000387 efx_link_set_wanted_fc(efx, efx->wanted_fc);
388 efx_mdio_an_reconfigure(efx);
Ben Hutchingsc6342632009-10-12 09:27:07 +0000389
Ben Hutchings8ceee662008-04-27 12:55:59 +0100390 schedule_timeout_uninterruptible(HZ / 5); /* 200ms */
391
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800392 /* Let XGXS and SerDes out of reset */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100393 falcon_reset_xaui(efx);
394
395 return 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100396}
397
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800398/* Perform a "special software reset" on the PHY. The caller is
399 * responsible for saving and restoring the PHY hardware registers
400 * properly, and masking/unmasking LASI */
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100401static int tenxpress_special_reset(struct efx_nic *efx)
402{
403 int rc, reg;
404
Ben Hutchingsc8fcc492008-09-01 12:49:25 +0100405 /* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
406 * a special software reset can glitch the XGMAC sufficiently for stats
Ben Hutchings1974cc22009-01-29 18:00:07 +0000407 * requests to fail. */
Ben Hutchings55edc6e2009-11-25 16:11:35 +0000408 falcon_stop_nic_stats(efx);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100409
410 /* Initiate reset */
Ben Hutchings68e7f452009-04-29 08:05:08 +0000411 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100412 reg |= (1 << PMA_PMD_EXT_SSR_LBN);
Ben Hutchings68e7f452009-04-29 08:05:08 +0000413 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100414
Ben Hutchingsc8fcc492008-09-01 12:49:25 +0100415 mdelay(200);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100416
417 /* Wait for the blocks to come out of reset */
Ben Hutchings68e7f452009-04-29 08:05:08 +0000418 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100419 if (rc < 0)
Ben Hutchings1974cc22009-01-29 18:00:07 +0000420 goto out;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100421
422 /* Try and reconfigure the device */
423 rc = tenxpress_init(efx);
424 if (rc < 0)
Ben Hutchings1974cc22009-01-29 18:00:07 +0000425 goto out;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100426
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800427 /* Wait for the XGXS state machine to churn */
428 mdelay(10);
Ben Hutchings1974cc22009-01-29 18:00:07 +0000429out:
Ben Hutchings55edc6e2009-11-25 16:11:35 +0000430 falcon_start_nic_stats(efx);
Ben Hutchingsc8fcc492008-09-01 12:49:25 +0100431 return rc;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100432}
433
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800434static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100435{
436 struct tenxpress_phy_data *pd = efx->phy_data;
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800437 bool bad_lp;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100438 int reg;
439
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800440 if (link_ok) {
441 bad_lp = false;
442 } else {
443 /* Check that AN has started but not completed. */
Ben Hutchings68e7f452009-04-29 08:05:08 +0000444 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_STAT1);
445 if (!(reg & MDIO_AN_STAT1_LPABLE))
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800446 return; /* LP status is unknown */
Ben Hutchings68e7f452009-04-29 08:05:08 +0000447 bad_lp = !(reg & MDIO_AN_STAT1_COMPLETE);
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800448 if (bad_lp)
449 pd->bad_lp_tries++;
450 }
451
Ben Hutchings8ceee662008-04-27 12:55:59 +0100452 /* Nothing to do if all is well and was previously so. */
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800453 if (!pd->bad_lp_tries)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100454 return;
455
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800456 /* Use the RX (red) LED as an error indicator once we've seen AN
457 * failure several times in a row, and also log a message. */
458 if (!bad_lp || pd->bad_lp_tries == MAX_BAD_LP_TRIES) {
Ben Hutchings68e7f452009-04-29 08:05:08 +0000459 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
460 PMA_PMD_LED_OVERR_REG);
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800461 reg &= ~(PMA_PMD_LED_MASK << PMA_PMD_LED_RX_LBN);
462 if (!bad_lp) {
463 reg |= PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN;
464 } else {
465 reg |= PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN;
466 EFX_ERR(efx, "appears to be plugged into a port"
467 " that is not 10GBASE-T capable. The PHY"
468 " supports 10GBASE-T ONLY, so no link can"
469 " be established\n");
470 }
Ben Hutchings68e7f452009-04-29 08:05:08 +0000471 efx_mdio_write(efx, MDIO_MMD_PMAPMD,
472 PMA_PMD_LED_OVERR_REG, reg);
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800473 pd->bad_lp_tries = bad_lp;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100474 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100475}
476
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800477static bool sfx7101_link_ok(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100478{
Ben Hutchings68e7f452009-04-29 08:05:08 +0000479 return efx_mdio_links_ok(efx,
480 MDIO_DEVS_PMAPMD |
481 MDIO_DEVS_PCS |
482 MDIO_DEVS_PHYXS);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800483}
484
485static bool sft9001_link_ok(struct efx_nic *efx, struct ethtool_cmd *ecmd)
486{
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800487 u32 reg;
488
Ben Hutchingscaa8d8b2008-12-26 13:46:12 -0800489 if (efx_phy_mode_disabled(efx->phy_mode))
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800490 return false;
Ben Hutchingscaa8d8b2008-12-26 13:46:12 -0800491 else if (efx->loopback_mode == LOOPBACK_GPHY)
492 return true;
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800493 else if (efx->loopback_mode)
Ben Hutchings68e7f452009-04-29 08:05:08 +0000494 return efx_mdio_links_ok(efx,
495 MDIO_DEVS_PMAPMD |
496 MDIO_DEVS_PHYXS);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800497
498 /* We must use the same definition of link state as LASI,
499 * otherwise we can miss a link state transition
500 */
501 if (ecmd->speed == 10000) {
Ben Hutchings68e7f452009-04-29 08:05:08 +0000502 reg = efx_mdio_read(efx, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1);
503 return reg & MDIO_PCS_10GBRT_STAT1_BLKLK;
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800504 } else {
Ben Hutchings68e7f452009-04-29 08:05:08 +0000505 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_STATUS_REG);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800506 return reg & (1 << C22EXT_STATUS_LINK_LBN);
507 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100508}
509
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800510static void tenxpress_ext_loopback(struct efx_nic *efx)
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100511{
Ben Hutchings68e7f452009-04-29 08:05:08 +0000512 efx_mdio_set_flag(efx, MDIO_MMD_PHYXS, PHYXS_TEST1,
513 1 << LOOPBACK_NEAR_LBN,
514 efx->loopback_mode == LOOPBACK_PHYXS);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800515 if (efx->phy_type != PHY_TYPE_SFX7101)
Ben Hutchings68e7f452009-04-29 08:05:08 +0000516 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, GPHY_XCONTROL_REG,
517 1 << GPHY_LOOPBACK_NEAR_LBN,
518 efx->loopback_mode == LOOPBACK_GPHY);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800519}
520
521static void tenxpress_low_power(struct efx_nic *efx)
522{
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800523 if (efx->phy_type == PHY_TYPE_SFX7101)
Ben Hutchings68e7f452009-04-29 08:05:08 +0000524 efx_mdio_set_mmds_lpower(
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800525 efx, !!(efx->phy_mode & PHY_MODE_LOW_POWER),
526 TENXPRESS_REQUIRED_DEVS);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100527 else
Ben Hutchings68e7f452009-04-29 08:05:08 +0000528 efx_mdio_set_flag(
529 efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG,
530 1 << PMA_PMD_EXT_LPOWER_LBN,
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800531 !!(efx->phy_mode & PHY_MODE_LOW_POWER));
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100532}
533
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000534static int tenxpress_phy_reconfigure(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100535{
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100536 struct tenxpress_phy_data *phy_data = efx->phy_data;
Steve Hodgson8b9dc8d2009-01-29 17:49:09 +0000537 bool phy_mode_change, loop_reset;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100538
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800539 if (efx->phy_mode & (PHY_MODE_OFF | PHY_MODE_SPECIAL)) {
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100540 phy_data->phy_mode = efx->phy_mode;
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000541 return 0;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100542 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100543
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800544 phy_mode_change = (efx->phy_mode == PHY_MODE_NORMAL &&
545 phy_data->phy_mode != PHY_MODE_NORMAL);
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000546 loop_reset = (LOOPBACK_OUT_OF(phy_data, efx, LOOPBACKS_EXTERNAL(efx)) ||
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800547 LOOPBACK_CHANGED(phy_data, efx, 1 << LOOPBACK_GPHY));
548
Steve Hodgson8b9dc8d2009-01-29 17:49:09 +0000549 if (loop_reset || phy_mode_change) {
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000550 tenxpress_special_reset(efx);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800551
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000552 /* Reset XAUI if we were in 10G, and are staying
553 * in 10G. If we're moving into and out of 10G
554 * then xaui will be reset anyway */
555 if (EFX_IS10G(efx))
556 falcon_reset_xaui(efx);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100557 }
558
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000559 tenxpress_low_power(efx);
Ben Hutchings68e7f452009-04-29 08:05:08 +0000560 efx_mdio_transmit_disable(efx);
561 efx_mdio_phy_reconfigure(efx);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800562 tenxpress_ext_loopback(efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000563 efx_mdio_an_reconfigure(efx);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100564
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100565 phy_data->loopback_mode = efx->loopback_mode;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100566 phy_data->phy_mode = efx->phy_mode;
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000567
568 return 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100569}
570
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000571static void
572tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd);
573
574/* Poll for link state changes */
575static bool tenxpress_phy_poll(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100576{
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000577 struct efx_link_state old_state = efx->link_state;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100578
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800579 if (efx->phy_type == PHY_TYPE_SFX7101) {
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000580 efx->link_state.up = sfx7101_link_ok(efx);
581 efx->link_state.speed = 10000;
582 efx->link_state.fd = true;
583 efx->link_state.fc = efx_mdio_get_pause(efx);
584
585 sfx7101_check_bad_lp(efx, efx->link_state.up);
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800586 } else {
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000587 struct ethtool_cmd ecmd;
588
589 /* Check the LASI alarm first */
590 if (efx->loopback_mode == LOOPBACK_NONE &&
591 !(efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT) &
592 MDIO_PMA_LASI_LSALARM))
593 return false;
594
595 tenxpress_get_settings(efx, &ecmd);
596
597 efx->link_state.up = sft9001_link_ok(efx, &ecmd);
598 efx->link_state.speed = ecmd.speed;
599 efx->link_state.fd = (ecmd.duplex == DUPLEX_FULL);
600 efx->link_state.fc = efx_mdio_get_pause(efx);
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800601 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100602
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000603 return !efx_link_state_equal(&efx->link_state, &old_state);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100604}
605
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000606static void sfx7101_phy_fini(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100607{
608 int reg;
609
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000610 /* Power down the LNPGA */
611 reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
612 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
613
614 /* Waiting here ensures that the board fini, which can turn
615 * off the power to the PHY, won't get run until the LNPGA
616 * powerdown has been given long enough to complete. */
617 schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
618}
619
620static void tenxpress_phy_remove(struct efx_nic *efx)
621{
Ben Hutchings2a7e6372009-01-11 00:18:13 -0800622 if (efx->phy_type == PHY_TYPE_SFT9001B)
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800623 device_remove_file(&efx->pci_dev->dev,
624 &dev_attr_phy_short_reach);
Ben Hutchings2a7e6372009-01-11 00:18:13 -0800625
Ben Hutchings8ceee662008-04-27 12:55:59 +0100626 kfree(efx->phy_data);
627 efx->phy_data = NULL;
628}
629
630
Ben Hutchings398468e2009-11-23 16:03:45 +0000631/* Override the RX, TX and link LEDs */
632void tenxpress_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100633{
634 int reg;
635
Ben Hutchings398468e2009-11-23 16:03:45 +0000636 switch (mode) {
637 case EFX_LED_OFF:
638 reg = (PMA_PMD_LED_OFF << PMA_PMD_LED_TX_LBN) |
639 (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN) |
640 (PMA_PMD_LED_OFF << PMA_PMD_LED_LINK_LBN);
641 break;
642 case EFX_LED_ON:
643 reg = (PMA_PMD_LED_ON << PMA_PMD_LED_TX_LBN) |
644 (PMA_PMD_LED_ON << PMA_PMD_LED_RX_LBN) |
645 (PMA_PMD_LED_ON << PMA_PMD_LED_LINK_LBN);
646 break;
647 default:
Ben Hutchingsdcf477b2009-11-23 16:02:49 +0000648 if (efx->phy_type == PHY_TYPE_SFX7101)
649 reg = SFX7101_PMA_PMD_LED_DEFAULT;
650 else
651 reg = SFT9001_PMA_PMD_LED_DEFAULT;
Ben Hutchings398468e2009-11-23 16:03:45 +0000652 break;
653 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100654
Ben Hutchings68e7f452009-04-29 08:05:08 +0000655 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, reg);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100656}
657
Ben Hutchings307505e2008-12-26 13:48:00 -0800658static const char *const sfx7101_test_names[] = {
Ben Hutchings17967212008-12-26 13:47:25 -0800659 "bist"
660};
661
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000662static const char *sfx7101_test_name(struct efx_nic *efx, unsigned int index)
663{
664 if (index < ARRAY_SIZE(sfx7101_test_names))
665 return sfx7101_test_names[index];
666 return NULL;
667}
668
Ben Hutchings17967212008-12-26 13:47:25 -0800669static int
Ben Hutchings307505e2008-12-26 13:48:00 -0800670sfx7101_run_tests(struct efx_nic *efx, int *results, unsigned flags)
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100671{
Ben Hutchings17967212008-12-26 13:47:25 -0800672 int rc;
673
674 if (!(flags & ETH_TEST_FL_OFFLINE))
675 return 0;
676
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100677 /* BIST is automatically run after a special software reset */
Ben Hutchings17967212008-12-26 13:47:25 -0800678 rc = tenxpress_special_reset(efx);
679 results[0] = rc ? -1 : 1;
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000680
681 efx_mdio_an_reconfigure(efx);
682
Ben Hutchings17967212008-12-26 13:47:25 -0800683 return rc;
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100684}
685
Ben Hutchings307505e2008-12-26 13:48:00 -0800686static const char *const sft9001_test_names[] = {
687 "bist",
688 "cable.pairA.status",
689 "cable.pairB.status",
690 "cable.pairC.status",
691 "cable.pairD.status",
692 "cable.pairA.length",
693 "cable.pairB.length",
694 "cable.pairC.length",
695 "cable.pairD.length",
696};
697
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000698static const char *sft9001_test_name(struct efx_nic *efx, unsigned int index)
699{
700 if (index < ARRAY_SIZE(sft9001_test_names))
701 return sft9001_test_names[index];
702 return NULL;
703}
704
Ben Hutchings307505e2008-12-26 13:48:00 -0800705static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags)
706{
Ben Hutchings22ef02c2009-02-27 13:04:07 +0000707 int rc = 0, rc2, i, ctrl_reg, res_reg;
Ben Hutchings307505e2008-12-26 13:48:00 -0800708
Ben Hutchings307505e2008-12-26 13:48:00 -0800709 /* Initialise cable diagnostic results to unknown failure */
710 for (i = 1; i < 9; ++i)
711 results[i] = -1;
712
713 /* Run cable diagnostics; wait up to 5 seconds for them to complete.
714 * A cable fault is not a self-test failure, but a timeout is. */
Ben Hutchings22ef02c2009-02-27 13:04:07 +0000715 ctrl_reg = ((1 << CDIAG_CTRL_IMMED_LBN) |
716 (CDIAG_CTRL_LEN_METRES << CDIAG_CTRL_LEN_UNIT_LBN));
717 if (flags & ETH_TEST_FL_OFFLINE) {
718 /* Break the link in order to run full diagnostics. We
719 * must reset the PHY to resume normal service. */
720 ctrl_reg |= (1 << CDIAG_CTRL_BRK_LINK_LBN);
721 }
Ben Hutchings68e7f452009-04-29 08:05:08 +0000722 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG,
723 ctrl_reg);
Ben Hutchings307505e2008-12-26 13:48:00 -0800724 i = 0;
Ben Hutchings68e7f452009-04-29 08:05:08 +0000725 while (efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG) &
Ben Hutchings307505e2008-12-26 13:48:00 -0800726 (1 << CDIAG_CTRL_IN_PROG_LBN)) {
727 if (++i == 50) {
728 rc = -ETIMEDOUT;
Ben Hutchings22ef02c2009-02-27 13:04:07 +0000729 goto out;
Ben Hutchings307505e2008-12-26 13:48:00 -0800730 }
731 msleep(100);
732 }
Ben Hutchings68e7f452009-04-29 08:05:08 +0000733 res_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_RES_REG);
Ben Hutchings307505e2008-12-26 13:48:00 -0800734 for (i = 0; i < 4; i++) {
735 int pair_res =
736 (res_reg >> (CDIAG_RES_A_LBN - i * CDIAG_RES_WIDTH))
737 & ((1 << CDIAG_RES_WIDTH) - 1);
Ben Hutchings68e7f452009-04-29 08:05:08 +0000738 int len_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
739 PMA_PMD_CDIAG_LEN_REG + i);
Ben Hutchings307505e2008-12-26 13:48:00 -0800740 if (pair_res == CDIAG_RES_OK)
741 results[1 + i] = 1;
742 else if (pair_res == CDIAG_RES_INVALID)
743 results[1 + i] = -1;
744 else
745 results[1 + i] = -pair_res;
746 if (pair_res != CDIAG_RES_INVALID &&
747 pair_res != CDIAG_RES_OPEN &&
748 len_reg != 0xffff)
749 results[5 + i] = len_reg;
750 }
751
Ben Hutchings22ef02c2009-02-27 13:04:07 +0000752out:
753 if (flags & ETH_TEST_FL_OFFLINE) {
754 /* Reset, running the BIST and then resuming normal service. */
755 rc2 = tenxpress_special_reset(efx);
756 results[0] = rc2 ? -1 : 1;
757 if (!rc)
758 rc = rc2;
Ben Hutchings307505e2008-12-26 13:48:00 -0800759
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000760 efx_mdio_an_reconfigure(efx);
Ben Hutchings22ef02c2009-02-27 13:04:07 +0000761 }
Ben Hutchings307505e2008-12-26 13:48:00 -0800762
763 return rc;
764}
765
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000766static void
767tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800768{
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000769 u32 adv = 0, lpa = 0;
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800770 int reg;
771
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800772 if (efx->phy_type != PHY_TYPE_SFX7101) {
Ben Hutchings68e7f452009-04-29 08:05:08 +0000773 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL);
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000774 if (reg & (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN))
775 adv |= ADVERTISED_1000baseT_Full;
Ben Hutchings68e7f452009-04-29 08:05:08 +0000776 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_STATUS);
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000777 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN))
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800778 lpa |= ADVERTISED_1000baseT_Half;
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000779 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN))
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800780 lpa |= ADVERTISED_1000baseT_Full;
781 }
Ben Hutchings68e7f452009-04-29 08:05:08 +0000782 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL);
783 if (reg & MDIO_AN_10GBT_CTRL_ADV10G)
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000784 adv |= ADVERTISED_10000baseT_Full;
Ben Hutchings68e7f452009-04-29 08:05:08 +0000785 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
786 if (reg & MDIO_AN_10GBT_STAT_LP10G)
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800787 lpa |= ADVERTISED_10000baseT_Full;
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800788
Ben Hutchings68e7f452009-04-29 08:05:08 +0000789 mdio45_ethtool_gset_npage(&efx->mdio, ecmd, adv, lpa);
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800790
Ben Hutchingse762cd72009-06-10 05:30:05 +0000791 if (efx->phy_type != PHY_TYPE_SFX7101) {
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000792 ecmd->supported |= (SUPPORTED_100baseT_Full |
793 SUPPORTED_1000baseT_Full);
Ben Hutchingse762cd72009-06-10 05:30:05 +0000794 if (ecmd->speed != SPEED_10000) {
795 ecmd->eth_tp_mdix =
796 (efx_mdio_read(efx, MDIO_MMD_PMAPMD,
797 PMA_PMD_XSTATUS_REG) &
798 (1 << PMA_PMD_XSTAT_MDIX_LBN))
799 ? ETH_TP_MDI_X : ETH_TP_MDI;
800 }
801 }
Steve Hodgson8b9dc8d2009-01-29 17:49:09 +0000802
803 /* In loopback, the PHY automatically brings up the correct interface,
804 * but doesn't advertise the correct speed. So override it */
805 if (efx->loopback_mode == LOOPBACK_GPHY)
806 ecmd->speed = SPEED_1000;
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000807 else if (LOOPBACK_EXTERNAL(efx))
Steve Hodgson8b9dc8d2009-01-29 17:49:09 +0000808 ecmd->speed = SPEED_10000;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100809}
810
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000811static int tenxpress_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100812{
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000813 if (!ecmd->autoneg)
814 return -EINVAL;
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800815
Ben Hutchings68e7f452009-04-29 08:05:08 +0000816 return efx_mdio_set_settings(efx, ecmd);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100817}
818
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000819static void sfx7101_set_npage_adv(struct efx_nic *efx, u32 advertising)
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800820{
Ben Hutchings68e7f452009-04-29 08:05:08 +0000821 efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
822 MDIO_AN_10GBT_CTRL_ADV10G,
823 advertising & ADVERTISED_10000baseT_Full);
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000824}
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800825
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000826static void sft9001_set_npage_adv(struct efx_nic *efx, u32 advertising)
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800827{
Ben Hutchings68e7f452009-04-29 08:05:08 +0000828 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL,
829 1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN,
830 advertising & ADVERTISED_1000baseT_Full);
831 efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
832 MDIO_AN_10GBT_CTRL_ADV10G,
833 advertising & ADVERTISED_10000baseT_Full);
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800834}
835
836struct efx_phy_operations falcon_sfx7101_phy_ops = {
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000837 .probe = tenxpress_phy_probe,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100838 .init = tenxpress_phy_init,
839 .reconfigure = tenxpress_phy_reconfigure,
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800840 .poll = tenxpress_phy_poll,
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000841 .fini = sfx7101_phy_fini,
842 .remove = tenxpress_phy_remove,
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000843 .get_settings = tenxpress_get_settings,
844 .set_settings = tenxpress_set_settings,
845 .set_npage_adv = sfx7101_set_npage_adv,
Ben Hutchings4f16c072010-02-03 09:30:50 +0000846 .test_alive = efx_mdio_test_alive,
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000847 .test_name = sfx7101_test_name,
Ben Hutchings307505e2008-12-26 13:48:00 -0800848 .run_tests = sfx7101_run_tests,
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800849};
850
851struct efx_phy_operations falcon_sft9001_phy_ops = {
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000852 .probe = tenxpress_phy_probe,
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800853 .init = tenxpress_phy_init,
854 .reconfigure = tenxpress_phy_reconfigure,
855 .poll = tenxpress_phy_poll,
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000856 .fini = efx_port_dummy_op_void,
857 .remove = tenxpress_phy_remove,
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000858 .get_settings = tenxpress_get_settings,
859 .set_settings = tenxpress_set_settings,
860 .set_npage_adv = sft9001_set_npage_adv,
Ben Hutchings4f16c072010-02-03 09:30:50 +0000861 .test_alive = efx_mdio_test_alive,
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000862 .test_name = sft9001_test_name,
Ben Hutchings307505e2008-12-26 13:48:00 -0800863 .run_tests = sft9001_run_tests,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100864};