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Alan Coxb2248da2007-03-06 02:38:11 -08001/*
2 * pata_cmd640.c - CMD640 PCI PATA for new ATA layer
3 * (C) 2007 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Based upon
7 * linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996
8 *
9 * Copyright (C) 1995-1996 Linus Torvalds & authors (see driver)
10 *
11 * This drives only the PCI version of the controller. If you have a
12 * VLB one then we have enough docs to support it but you can write
13 * your own code.
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/blkdev.h>
21#include <linux/delay.h>
22#include <scsi/scsi_host.h>
23#include <linux/libata.h>
24
25#define DRV_NAME "pata_cmd640"
Alan Cox7938a722007-03-07 16:43:29 +000026#define DRV_VERSION "0.0.5"
Alan Coxb2248da2007-03-06 02:38:11 -080027
28struct cmd640_reg {
29 int last;
30 u8 reg58[ATA_MAX_DEVICES];
31};
32
33enum {
34 CFR = 0x50,
35 CNTRL = 0x51,
36 CMDTIM = 0x52,
37 ARTIM0 = 0x53,
38 DRWTIM0 = 0x54,
39 ARTIM23 = 0x57,
40 DRWTIM23 = 0x58,
41 BRST = 0x59
42};
43
44/**
45 * cmd640_set_piomode - set initial PIO mode data
Alan Cox7938a722007-03-07 16:43:29 +000046 * @ap: ATA port
Alan Coxb2248da2007-03-06 02:38:11 -080047 * @adev: ATA device
48 *
49 * Called to do the PIO mode setup.
50 */
51
52static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
53{
54 struct cmd640_reg *timing = ap->private_data;
55 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
56 struct ata_timing t;
57 const unsigned long T = 1000000 / 33;
58 const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
59 u8 reg;
60 int arttim = ARTIM0 + 2 * adev->devno;
61 struct ata_device *pair = ata_dev_pair(adev);
62
63 if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
64 printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
65 return;
66 }
67
68 /* The second channel has shared timings and the setup timing is
69 messy to switch to merge it for worst case */
70 if (ap->port_no && pair) {
71 struct ata_timing p;
72 ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
73 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
74 }
75
76 /* Make the timings fit */
77 if (t.recover > 16) {
78 t.active += t.recover - 16;
79 t.recover = 16;
80 }
81 if (t.active > 16)
82 t.active = 16;
83
84 /* Now convert the clocks into values we can actually stuff into
85 the chip */
86
87 if (t.recover > 1)
88 t.recover--; /* 640B only */
89 else
90 t.recover = 15;
91
92 if (t.setup > 4)
93 t.setup = 0xC0;
94 else
95 t.setup = setup_data[t.setup];
96
97 if (ap->port_no == 0) {
98 t.active &= 0x0F; /* 0 = 16 */
99
100 /* Load setup timing */
101 pci_read_config_byte(pdev, arttim, &reg);
102 reg &= 0x3F;
103 reg |= t.setup;
104 pci_write_config_byte(pdev, arttim, reg);
105
106 /* Load active/recovery */
107 pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
108 } else {
109 /* Save the shared timings for channel, they will be loaded
Tejun Heo9363c382008-04-07 22:47:16 +0900110 by qc_issue. Reloading the setup time is expensive so we
111 keep a merged one loaded */
Alan Coxb2248da2007-03-06 02:38:11 -0800112 pci_read_config_byte(pdev, ARTIM23, &reg);
113 reg &= 0x3F;
114 reg |= t.setup;
115 pci_write_config_byte(pdev, ARTIM23, reg);
116 timing->reg58[adev->devno] = (t.active << 4) | t.recover;
117 }
118}
119
120
121/**
Tejun Heo9363c382008-04-07 22:47:16 +0900122 * cmd640_qc_issue - command preparation hook
Alan Coxb2248da2007-03-06 02:38:11 -0800123 * @qc: Command to be issued
124 *
125 * Channel 1 has shared timings. We must reprogram the
126 * clock each drive 2/3 switch we do.
127 */
128
Tejun Heo9363c382008-04-07 22:47:16 +0900129static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
Alan Coxb2248da2007-03-06 02:38:11 -0800130{
131 struct ata_port *ap = qc->ap;
132 struct ata_device *adev = qc->dev;
133 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
134 struct cmd640_reg *timing = ap->private_data;
135
136 if (ap->port_no != 0 && adev->devno != timing->last) {
137 pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
138 timing->last = adev->devno;
139 }
Tejun Heo9363c382008-04-07 22:47:16 +0900140 return ata_sff_qc_issue(qc);
Alan Coxb2248da2007-03-06 02:38:11 -0800141}
142
143/**
144 * cmd640_port_start - port setup
145 * @ap: ATA port being set up
146 *
147 * The CMD640 needs to maintain private data structures so we
148 * allocate space here.
149 */
150
151static int cmd640_port_start(struct ata_port *ap)
152{
153 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
154 struct cmd640_reg *timing;
155
Alan Cox81ad1832007-08-22 22:55:41 +0100156 int ret = ata_sff_port_start(ap);
Alan Coxb2248da2007-03-06 02:38:11 -0800157 if (ret < 0)
158 return ret;
159
160 timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
161 if (timing == NULL)
162 return -ENOMEM;
163 timing->last = -1; /* Force a load */
164 ap->private_data = timing;
165 return ret;
166}
167
168static struct scsi_host_template cmd640_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900169 ATA_BMDMA_SHT(DRV_NAME),
Alan Coxb2248da2007-03-06 02:38:11 -0800170};
171
172static struct ata_port_operations cmd640_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900173 .inherits = &ata_bmdma_port_ops,
174 /* In theory xfer_noirq is not needed once we kill the prefetcher */
Tejun Heo5682ed32008-04-07 22:47:16 +0900175 .sff_data_xfer = ata_sff_data_xfer_noirq,
Tejun Heo9363c382008-04-07 22:47:16 +0900176 .qc_issue = cmd640_qc_issue,
Tejun Heo029cfd62008-03-25 12:22:49 +0900177 .cable_detect = ata_cable_40wire,
178 .set_piomode = cmd640_set_piomode,
Alan Coxb2248da2007-03-06 02:38:11 -0800179 .port_start = cmd640_port_start,
180};
181
Alan Cox7938a722007-03-07 16:43:29 +0000182static void cmd640_hardware_init(struct pci_dev *pdev)
Alan Coxb2248da2007-03-06 02:38:11 -0800183{
184 u8 r;
185 u8 ctrl;
186
Alan Coxb2248da2007-03-06 02:38:11 -0800187 /* CMD640 detected, commiserations */
Alan Cox7938a722007-03-07 16:43:29 +0000188 pci_write_config_byte(pdev, 0x5B, 0x00);
Alan Coxb2248da2007-03-06 02:38:11 -0800189 /* Get version info */
190 pci_read_config_byte(pdev, CFR, &r);
191 /* PIO0 command cycles */
192 pci_write_config_byte(pdev, CMDTIM, 0);
193 /* 512 byte bursts (sector) */
194 pci_write_config_byte(pdev, BRST, 0x40);
Jeff Garzika617c092007-05-21 20:14:23 -0400195 /*
Alan Coxb2248da2007-03-06 02:38:11 -0800196 * A reporter a long time ago
197 * Had problems with the data fifo
198 * So don't run the risk
199 * Of putting crap on the disk
200 * For its better just to go slow
201 */
202 /* Do channel 0 */
203 pci_read_config_byte(pdev, CNTRL, &ctrl);
204 pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
205 /* Ditto for channel 1 */
206 pci_read_config_byte(pdev, ARTIM23, &ctrl);
207 ctrl |= 0x0C;
208 pci_write_config_byte(pdev, ARTIM23, ctrl);
Alan Cox7938a722007-03-07 16:43:29 +0000209}
Alan Coxb2248da2007-03-06 02:38:11 -0800210
Alan Cox7938a722007-03-07 16:43:29 +0000211static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
212{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200213 static const struct ata_port_info info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400214 .flags = ATA_FLAG_SLAVE_POSS,
Alan Cox7938a722007-03-07 16:43:29 +0000215 .pio_mask = 0x1f,
216 .port_ops = &cmd640_port_ops
217 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200218 const struct ata_port_info *ppi[] = { &info, NULL };
Tejun Heof08048e2008-03-25 12:22:47 +0900219 int rc;
220
221 rc = pcim_enable_device(pdev);
222 if (rc)
223 return rc;
Alan Cox7938a722007-03-07 16:43:29 +0000224
225 cmd640_hardware_init(pdev);
Tejun Heof08048e2008-03-25 12:22:47 +0900226
Tejun Heo9363c382008-04-07 22:47:16 +0900227 return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL);
Alan Coxb2248da2007-03-06 02:38:11 -0800228}
229
Tejun Heof08048e2008-03-25 12:22:47 +0900230#ifdef CONFIG_PM
Alan Coxb2248da2007-03-06 02:38:11 -0800231static int cmd640_reinit_one(struct pci_dev *pdev)
232{
Tejun Heof08048e2008-03-25 12:22:47 +0900233 struct ata_host *host = dev_get_drvdata(&pdev->dev);
234 int rc;
235
236 rc = ata_pci_device_do_resume(pdev);
237 if (rc)
238 return rc;
Alan Cox7938a722007-03-07 16:43:29 +0000239 cmd640_hardware_init(pdev);
Tejun Heof08048e2008-03-25 12:22:47 +0900240 ata_host_resume(host);
Andrew Morton4b22afd2007-04-26 00:19:26 -0700241 return 0;
Alan Coxb2248da2007-03-06 02:38:11 -0800242}
Tejun Heof08048e2008-03-25 12:22:47 +0900243#endif
Alan Coxb2248da2007-03-06 02:38:11 -0800244
245static const struct pci_device_id cmd640[] = {
246 { PCI_VDEVICE(CMD, 0x640), 0 },
247 { },
248};
249
250static struct pci_driver cmd640_pci_driver = {
251 .name = DRV_NAME,
252 .id_table = cmd640,
253 .probe = cmd640_init_one,
254 .remove = ata_pci_remove_one,
Andrew Morton4b22afd2007-04-26 00:19:26 -0700255#ifdef CONFIG_PM
Alan Coxb2248da2007-03-06 02:38:11 -0800256 .suspend = ata_pci_device_suspend,
Alan Coxb2248da2007-03-06 02:38:11 -0800257 .resume = cmd640_reinit_one,
Tejun Heof08048e2008-03-25 12:22:47 +0900258#endif
Alan Coxb2248da2007-03-06 02:38:11 -0800259};
260
261static int __init cmd640_init(void)
262{
263 return pci_register_driver(&cmd640_pci_driver);
264}
265
266static void __exit cmd640_exit(void)
267{
268 pci_unregister_driver(&cmd640_pci_driver);
269}
270
271MODULE_AUTHOR("Alan Cox");
272MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
273MODULE_LICENSE("GPL");
274MODULE_DEVICE_TABLE(pci, cmd640);
275MODULE_VERSION(DRV_VERSION);
276
277module_init(cmd640_init);
278module_exit(cmd640_exit);