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David Howellsaf170c52012-12-14 22:37:13 +00001#ifndef _UAPI_ASM_X86_SIGCONTEXT_H
2#define _UAPI_ASM_X86_SIGCONTEXT_H
3
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +02004/*
5 * Linux signal context definitions. The sigcontext includes a complex hierarchy of CPU
6 * and FPU state, available to user-space (on the stack) when a signal handler is
7 * executed.
8 *
9 * As over the years this ABI grew from its very simple roots towards supporting more and
10 * more CPU state organically, some of the details (which were rather clever hacks back
11 * in the days) became a bit quirky by today.
12 *
13 * The current ABI includes flexible provisions for future extensions, so we won't have
14 * to grow new quirks for quite some time. Promise!
15 */
16
David Howellsaf170c52012-12-14 22:37:13 +000017#include <linux/compiler.h>
18#include <linux/types.h>
19
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020020#define FP_XSTATE_MAGIC1 0x46505853U
21#define FP_XSTATE_MAGIC2 0x46505845U
22#define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2)
David Howellsaf170c52012-12-14 22:37:13 +000023
24/*
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020025 * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame
26 * are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes
27 * are used to extend the fpstate pointer in the sigcontext, which now
David Howellsaf170c52012-12-14 22:37:13 +000028 * includes the extended state information along with fpstate information.
29 *
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020030 * If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a sw_reserved.extended_size
31 * bytes large extended context area present. (The last 32-bit word of this extended
32 * area (at the fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to
33 * FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.)
34 *
35 * This extended area typically grows with newer CPUs that have larger and larger
36 * XSAVE areas.
David Howellsaf170c52012-12-14 22:37:13 +000037 */
38struct _fpx_sw_bytes {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020039 /* If set to FP_XSTATE_MAGIC1 then this is an xstate context. 0 if a legacy frame. */
40 __u32 magic1;
41
42 /*
43 * Total size of the fpstate area:
44 *
45 * - if magic1 == 0 then it's sizeof(struct _fpstate)
46 * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate) plus extensions (if any)
47 */
48 __u32 extended_size;
49
50 /*
51 * Feature bit mask (including FP/SSE/extended state) that is present
52 * in the memory layout:
53 */
54 __u64 xfeatures;
55
56 /*
57 * Actual XSAVE state size, based on the xfeatures saved in the layout.
58 * 'extended_size' is greater than 'xstate_size':
59 */
60 __u32 xstate_size;
61
62 /* For future use: */
63 __u32 padding[7];
David Howellsaf170c52012-12-14 22:37:13 +000064};
65
66#ifdef __i386__
67/*
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020068 * As documented in the iBCS2 standard:
David Howellsaf170c52012-12-14 22:37:13 +000069 *
70 * The first part of "struct _fpstate" is just the normal i387
71 * hardware setup, the extra "status" word is used to save the
72 * coprocessor status word before entering the handler.
73 *
David Howellsaf170c52012-12-14 22:37:13 +000074 * The FPU state data structure has had to grow to accommodate the
75 * extended FPU state required by the Streaming SIMD Extensions.
76 * There is no documented standard to accomplish this at the moment.
77 */
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020078
79/* 10-byte legacy floating point register: */
David Howellsaf170c52012-12-14 22:37:13 +000080struct _fpreg {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020081 unsigned short significand[4];
82 unsigned short exponent;
David Howellsaf170c52012-12-14 22:37:13 +000083};
84
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020085/* 16-byte floating point register: */
David Howellsaf170c52012-12-14 22:37:13 +000086struct _fpxreg {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020087 unsigned short significand[4];
88 unsigned short exponent;
89 unsigned short padding[3];
David Howellsaf170c52012-12-14 22:37:13 +000090};
91
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020092/* 16-byte XMM register: */
David Howellsaf170c52012-12-14 22:37:13 +000093struct _xmmreg {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020094 unsigned long element[4];
David Howellsaf170c52012-12-14 22:37:13 +000095};
96
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +020097#define X86_FXSR_MAGIC 0x0000
98
David Howellsaf170c52012-12-14 22:37:13 +000099struct _fpstate {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200100 /* Legacy FPU environment: */
101 unsigned long cw;
102 unsigned long sw;
103 unsigned long tag;
104 unsigned long ipoff;
105 unsigned long cssel;
106 unsigned long dataoff;
107 unsigned long datasel;
108 struct _fpreg _st[8];
109 unsigned short status;
110 unsigned short magic; /* 0xffff: regular FPU data only */
111 /* 0x0000: FXSR FPU data */
David Howellsaf170c52012-12-14 22:37:13 +0000112
113 /* FXSR FPU environment */
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200114 unsigned long _fxsr_env[6]; /* FXSR FPU env is ignored */
115 unsigned long mxcsr;
116 unsigned long reserved;
117 struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
118 struct _xmmreg _xmm[8]; /* First 8 XMM registers */
119 unsigned long padding1[44]; /* Second 8 XMM registers plus padding */
David Howellsaf170c52012-12-14 22:37:13 +0000120
121 union {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200122 unsigned long padding2[12];
123 struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */
David Howellsaf170c52012-12-14 22:37:13 +0000124 };
125};
126
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200127# ifndef __KERNEL__
David Howellsaf170c52012-12-14 22:37:13 +0000128/*
129 * User-space might still rely on the old definition:
130 */
131struct sigcontext {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200132 unsigned short gs, __gsh;
133 unsigned short fs, __fsh;
134 unsigned short es, __esh;
135 unsigned short ds, __dsh;
136 unsigned long edi;
137 unsigned long esi;
138 unsigned long ebp;
139 unsigned long esp;
140 unsigned long ebx;
141 unsigned long edx;
142 unsigned long ecx;
143 unsigned long eax;
144 unsigned long trapno;
145 unsigned long err;
146 unsigned long eip;
147 unsigned short cs, __csh;
148 unsigned long eflags;
149 unsigned long esp_at_signal;
150 unsigned short ss, __ssh;
151 struct _fpstate __user *fpstate;
152 unsigned long oldmask;
153 unsigned long cr2;
David Howellsaf170c52012-12-14 22:37:13 +0000154};
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200155# endif /* !__KERNEL__ */
David Howellsaf170c52012-12-14 22:37:13 +0000156
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200157#else /* __x86_64__: */
David Howellsaf170c52012-12-14 22:37:13 +0000158
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200159/*
160 * The FXSAVE frame.
161 *
162 * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is
163 * larger: 'struct _xstate'. Note that 'struct _xstate' embedds
164 * 'struct _fpstate' so that you can always assume the _fpstate portion
165 * exists so that you can check the magic value.
166 *
167 * Note2: Reserved fields may someday contain valuable data. Always save/restore
168 * them when you change signal frames.
169 */
David Howellsaf170c52012-12-14 22:37:13 +0000170struct _fpstate {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200171 __u16 cwd;
172 __u16 swd;
173 /* Note this is not the same as the 32-bit/x87/FSAVE twd: */
174 __u16 twd;
175 __u16 fop;
176 __u64 rip;
177 __u64 rdp;
178 __u32 mxcsr;
179 __u32 mxcsr_mask;
180 __u32 st_space[32]; /* 8x FP registers, 16 bytes each */
181 __u32 xmm_space[64]; /* 16x XMM registers, 16 bytes each */
182 __u32 reserved2[12];
David Howellsaf170c52012-12-14 22:37:13 +0000183 union {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200184 __u32 reserved3[12];
185 struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */
David Howellsaf170c52012-12-14 22:37:13 +0000186 };
187};
188
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200189# ifndef __KERNEL__
David Howellsaf170c52012-12-14 22:37:13 +0000190/*
191 * User-space might still rely on the old definition:
192 */
193struct sigcontext {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200194 __u64 r8;
195 __u64 r9;
196 __u64 r10;
197 __u64 r11;
198 __u64 r12;
199 __u64 r13;
200 __u64 r14;
201 __u64 r15;
202 __u64 rdi;
203 __u64 rsi;
204 __u64 rbp;
205 __u64 rbx;
206 __u64 rdx;
207 __u64 rax;
208 __u64 rcx;
209 __u64 rsp;
210 __u64 rip;
211 __u64 eflags; /* RFLAGS */
212 __u16 cs;
213 __u16 gs;
214 __u16 fs;
215 __u16 __pad0;
216 __u64 err;
217 __u64 trapno;
218 __u64 oldmask;
219 __u64 cr2;
220 struct _fpstate __user *fpstate; /* Zero when no FPU context */
221# ifdef __ILP32__
222 __u32 __fpstate_pad;
223# endif
224 __u64 reserved1[8];
David Howellsaf170c52012-12-14 22:37:13 +0000225};
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200226# endif /* !__KERNEL__ */
David Howellsaf170c52012-12-14 22:37:13 +0000227
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200228#endif /* __x86_64__ */
David Howellsaf170c52012-12-14 22:37:13 +0000229
Ingo Molnar3a544502015-04-24 10:14:36 +0200230struct _header {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200231 __u64 xfeatures;
232 __u64 reserved1[2];
233 __u64 reserved2[5];
David Howellsaf170c52012-12-14 22:37:13 +0000234};
235
236struct _ymmh_state {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200237 /* 16x YMM registers, 16 bytes each: */
238 __u32 ymmh_space[64];
David Howellsaf170c52012-12-14 22:37:13 +0000239};
240
241/*
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200242 * Extended state pointed to by sigcontext::fpstate.
243 *
244 * In addition to the fpstate, information encoded in _xstate::xstate_hdr
245 * indicates the presence of other extended state information supported
246 * by the CPU and kernel:
David Howellsaf170c52012-12-14 22:37:13 +0000247 */
248struct _xstate {
Ingo Molnarcbf5f4f2015-09-05 09:32:31 +0200249 struct _fpstate fpstate;
250 struct _header xstate_hdr;
251 struct _ymmh_state ymmh;
252 /* New processor state extensions go here: */
David Howellsaf170c52012-12-14 22:37:13 +0000253};
254
255#endif /* _UAPI_ASM_X86_SIGCONTEXT_H */