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Len Brown26717172010-03-08 14:07:30 -05001/*
2 * intel_idle.c - native hardware idle loop for modern Intel processors
3 *
Len Brownfab04b22013-11-09 00:30:17 -05004 * Copyright (c) 2013, Intel Corporation.
Len Brown26717172010-03-08 14:07:30 -05005 * Len Brown <len.brown@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21/*
22 * intel_idle is a cpuidle driver that loads on specific Intel processors
23 * in lieu of the legacy ACPI processor_idle driver. The intent is to
24 * make Linux more efficient on these processors, as intel_idle knows
25 * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
26 */
27
28/*
29 * Design Assumptions
30 *
31 * All CPUs have same idle states as boot CPU
32 *
33 * Chipset BM_STS (bus master status) bit is a NOP
34 * for preventing entry into deep C-stats
35 */
36
37/*
38 * Known limitations
39 *
40 * The driver currently initializes for_each_online_cpu() upon modprobe.
41 * It it unaware of subsequent processors hot-added to the system.
42 * This means that if you boot with maxcpus=n and later online
43 * processors above n, those processors will use C1 only.
44 *
45 * ACPI has a .suspend hack to turn off deep c-statees during suspend
46 * to avoid complications with the lapic timer workaround.
47 * Have not seen issues with suspend, but may need same workaround here.
48 *
Len Brown26717172010-03-08 14:07:30 -050049 */
50
51/* un-comment DEBUG to enable pr_debug() statements */
52#define DEBUG
53
54#include <linux/kernel.h>
55#include <linux/cpuidle.h>
Thomas Gleixner76962ca2015-04-03 02:02:34 +020056#include <linux/tick.h>
Len Brown26717172010-03-08 14:07:30 -050057#include <trace/events/power.h>
58#include <linux/sched.h>
Shaohua Li2a2d31c2011-01-10 09:38:12 +080059#include <linux/notifier.h>
60#include <linux/cpu.h>
Paul Gortmaker02c4fae2016-06-17 01:28:33 -040061#include <linux/moduleparam.h>
Andi Kleenb66b8b92012-01-26 00:09:07 +010062#include <asm/cpu_device_id.h>
Dave Hansendb73c5a2016-06-02 17:19:32 -070063#include <asm/intel-family.h>
H. Peter Anvinbc83ccc2010-09-17 15:36:40 -070064#include <asm/mwait.h>
Len Brown14796fc2011-01-18 20:48:27 -050065#include <asm/msr.h>
Len Brown26717172010-03-08 14:07:30 -050066
Len Brownd70e28f2016-03-13 00:33:48 -050067#define INTEL_IDLE_VERSION "0.4.1"
Len Brown26717172010-03-08 14:07:30 -050068#define PREFIX "intel_idle: "
69
Len Brown26717172010-03-08 14:07:30 -050070static struct cpuidle_driver intel_idle_driver = {
71 .name = "intel_idle",
72 .owner = THIS_MODULE,
73};
74/* intel_idle.max_cstate=0 disables driver */
Len Brown137ecc72013-02-01 21:35:35 -050075static int max_cstate = CPUIDLE_STATE_MAX - 1;
Len Brown26717172010-03-08 14:07:30 -050076
Len Brownc4236282010-05-28 02:22:03 -040077static unsigned int mwait_substates;
Len Brown26717172010-03-08 14:07:30 -050078
Shaohua Li2a2d31c2011-01-10 09:38:12 +080079#define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
Len Brown26717172010-03-08 14:07:30 -050080/* Reliable LAPIC Timer States, bit 1 for C1 etc. */
Len Brownd13780d2010-07-07 00:12:03 -040081static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */
Len Brown26717172010-03-08 14:07:30 -050082
Andi Kleenb66b8b92012-01-26 00:09:07 +010083struct idle_cpu {
84 struct cpuidle_state *state_table;
85
86 /*
87 * Hardware C-state auto-demotion may not always be optimal.
88 * Indicate which enable bits to clear here.
89 */
90 unsigned long auto_demotion_disable_flags;
Len Brown8c058d532014-07-31 15:21:24 -040091 bool byt_auto_demotion_disable_flag;
Len Brown32e95182013-02-02 01:31:56 -050092 bool disable_promotion_to_c1e;
Andi Kleenb66b8b92012-01-26 00:09:07 +010093};
94
95static const struct idle_cpu *icpu;
Namhyung Kim3265eba2010-08-08 03:10:03 +090096static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +053097static int intel_idle(struct cpuidle_device *dev,
98 struct cpuidle_driver *drv, int index);
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +010099static void intel_idle_freeze(struct cpuidle_device *dev,
100 struct cpuidle_driver *drv, int index);
Len Brown26717172010-03-08 14:07:30 -0500101static struct cpuidle_state *cpuidle_state_table;
102
103/*
Len Brown956d0332011-01-12 02:51:20 -0500104 * Set this flag for states where the HW flushes the TLB for us
105 * and so we don't need cross-calls to keep it consistent.
106 * If this flag is set, SW flushes the TLB, so even if the
107 * HW doesn't do the flushing, this flag is safe to use.
108 */
109#define CPUIDLE_FLAG_TLB_FLUSHED 0x10000
110
111/*
Len Brownb1beab42013-01-31 19:55:37 -0500112 * MWAIT takes an 8-bit "hint" in EAX "suggesting"
113 * the C-state (top nibble) and sub-state (bottom nibble)
114 * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc.
115 *
116 * We store the hint at the top of our "flags" for each state.
117 */
118#define flg2MWAIT(flags) (((flags) >> 24) & 0xFF)
119#define MWAIT2flg(eax) ((eax & 0xFF) << 24)
120
121/*
Len Brown26717172010-03-08 14:07:30 -0500122 * States are indexed by the cstate number,
123 * which is also the index into the MWAIT hint array.
124 * Thus C0 is a dummy.
125 */
Jiang Liuba0dc812014-01-09 15:30:26 +0800126static struct cpuidle_state nehalem_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500127 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100128 .name = "C1-NHM",
Len Brown26717172010-03-08 14:07:30 -0500129 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100130 .flags = MWAIT2flg(0x00),
Len Brown26717172010-03-08 14:07:30 -0500131 .exit_latency = 3,
Len Brown26717172010-03-08 14:07:30 -0500132 .target_residency = 6,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100133 .enter = &intel_idle,
134 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500135 {
Len Brown32e95182013-02-02 01:31:56 -0500136 .name = "C1E-NHM",
137 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100138 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500139 .exit_latency = 10,
140 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100141 .enter = &intel_idle,
142 .enter_freeze = intel_idle_freeze, },
Len Brown32e95182013-02-02 01:31:56 -0500143 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100144 .name = "C3-NHM",
Len Brown26717172010-03-08 14:07:30 -0500145 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100146 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500147 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500148 .target_residency = 80,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100149 .enter = &intel_idle,
150 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500151 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100152 .name = "C6-NHM",
Len Brown26717172010-03-08 14:07:30 -0500153 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100154 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500155 .exit_latency = 200,
Len Brown26717172010-03-08 14:07:30 -0500156 .target_residency = 800,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100157 .enter = &intel_idle,
158 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500159 {
160 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500161};
162
Jiang Liuba0dc812014-01-09 15:30:26 +0800163static struct cpuidle_state snb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500164 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100165 .name = "C1-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400166 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100167 .flags = MWAIT2flg(0x00),
Len Brown32e95182013-02-02 01:31:56 -0500168 .exit_latency = 2,
169 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100170 .enter = &intel_idle,
171 .enter_freeze = intel_idle_freeze, },
Len Brown32e95182013-02-02 01:31:56 -0500172 {
173 .name = "C1E-SNB",
174 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100175 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500176 .exit_latency = 10,
177 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100178 .enter = &intel_idle,
179 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500180 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100181 .name = "C3-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400182 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100183 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400184 .exit_latency = 80,
Len Brownddbd5502010-12-13 18:28:22 -0500185 .target_residency = 211,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100186 .enter = &intel_idle,
187 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500188 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100189 .name = "C6-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400190 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100191 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400192 .exit_latency = 104,
Len Brownddbd5502010-12-13 18:28:22 -0500193 .target_residency = 345,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100194 .enter = &intel_idle,
195 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500196 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100197 .name = "C7-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400198 .desc = "MWAIT 0x30",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100199 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400200 .exit_latency = 109,
Len Brownddbd5502010-12-13 18:28:22 -0500201 .target_residency = 345,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100202 .enter = &intel_idle,
203 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500204 {
205 .enter = NULL }
Len Brownd13780d2010-07-07 00:12:03 -0400206};
207
Len Brown718987d2014-02-14 02:30:00 -0500208static struct cpuidle_state byt_cstates[] = {
209 {
210 .name = "C1-BYT",
211 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100212 .flags = MWAIT2flg(0x00),
Len Brown718987d2014-02-14 02:30:00 -0500213 .exit_latency = 1,
214 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100215 .enter = &intel_idle,
216 .enter_freeze = intel_idle_freeze, },
Len Brown718987d2014-02-14 02:30:00 -0500217 {
Len Brown718987d2014-02-14 02:30:00 -0500218 .name = "C6N-BYT",
219 .desc = "MWAIT 0x58",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100220 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd7ef7672015-03-24 23:23:20 -0400221 .exit_latency = 300,
Len Brown718987d2014-02-14 02:30:00 -0500222 .target_residency = 275,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100223 .enter = &intel_idle,
224 .enter_freeze = intel_idle_freeze, },
Len Brown718987d2014-02-14 02:30:00 -0500225 {
226 .name = "C6S-BYT",
227 .desc = "MWAIT 0x52",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100228 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd7ef7672015-03-24 23:23:20 -0400229 .exit_latency = 500,
Len Brown718987d2014-02-14 02:30:00 -0500230 .target_residency = 560,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100231 .enter = &intel_idle,
232 .enter_freeze = intel_idle_freeze, },
Len Brown718987d2014-02-14 02:30:00 -0500233 {
234 .name = "C7-BYT",
235 .desc = "MWAIT 0x60",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100236 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown718987d2014-02-14 02:30:00 -0500237 .exit_latency = 1200,
Len Brownd7ef7672015-03-24 23:23:20 -0400238 .target_residency = 4000,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100239 .enter = &intel_idle,
240 .enter_freeze = intel_idle_freeze, },
Len Brown718987d2014-02-14 02:30:00 -0500241 {
242 .name = "C7S-BYT",
243 .desc = "MWAIT 0x64",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100244 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown718987d2014-02-14 02:30:00 -0500245 .exit_latency = 10000,
246 .target_residency = 20000,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100247 .enter = &intel_idle,
248 .enter_freeze = intel_idle_freeze, },
Len Brown718987d2014-02-14 02:30:00 -0500249 {
250 .enter = NULL }
251};
252
Len Browncab07a52015-03-27 20:54:01 -0400253static struct cpuidle_state cht_cstates[] = {
254 {
255 .name = "C1-CHT",
256 .desc = "MWAIT 0x00",
257 .flags = MWAIT2flg(0x00),
258 .exit_latency = 1,
259 .target_residency = 1,
260 .enter = &intel_idle,
261 .enter_freeze = intel_idle_freeze, },
262 {
263 .name = "C6N-CHT",
264 .desc = "MWAIT 0x58",
265 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
266 .exit_latency = 80,
267 .target_residency = 275,
268 .enter = &intel_idle,
269 .enter_freeze = intel_idle_freeze, },
270 {
271 .name = "C6S-CHT",
272 .desc = "MWAIT 0x52",
273 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
274 .exit_latency = 200,
275 .target_residency = 560,
276 .enter = &intel_idle,
277 .enter_freeze = intel_idle_freeze, },
278 {
279 .name = "C7-CHT",
280 .desc = "MWAIT 0x60",
281 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
282 .exit_latency = 1200,
283 .target_residency = 4000,
284 .enter = &intel_idle,
285 .enter_freeze = intel_idle_freeze, },
286 {
287 .name = "C7S-CHT",
288 .desc = "MWAIT 0x64",
289 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
290 .exit_latency = 10000,
291 .target_residency = 20000,
292 .enter = &intel_idle,
293 .enter_freeze = intel_idle_freeze, },
294 {
295 .enter = NULL }
296};
297
Jiang Liuba0dc812014-01-09 15:30:26 +0800298static struct cpuidle_state ivb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500299 {
Len Brown6edab082012-06-01 19:45:32 -0400300 .name = "C1-IVB",
301 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100302 .flags = MWAIT2flg(0x00),
Len Brown6edab082012-06-01 19:45:32 -0400303 .exit_latency = 1,
304 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100305 .enter = &intel_idle,
306 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500307 {
Len Brown32e95182013-02-02 01:31:56 -0500308 .name = "C1E-IVB",
309 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100310 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500311 .exit_latency = 10,
312 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100313 .enter = &intel_idle,
314 .enter_freeze = intel_idle_freeze, },
Len Brown32e95182013-02-02 01:31:56 -0500315 {
Len Brown6edab082012-06-01 19:45:32 -0400316 .name = "C3-IVB",
317 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100318 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400319 .exit_latency = 59,
320 .target_residency = 156,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100321 .enter = &intel_idle,
322 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500323 {
Len Brown6edab082012-06-01 19:45:32 -0400324 .name = "C6-IVB",
325 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100326 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400327 .exit_latency = 80,
328 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100329 .enter = &intel_idle,
330 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500331 {
Len Brown6edab082012-06-01 19:45:32 -0400332 .name = "C7-IVB",
333 .desc = "MWAIT 0x30",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100334 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400335 .exit_latency = 87,
336 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100337 .enter = &intel_idle,
338 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500339 {
340 .enter = NULL }
Len Brown6edab082012-06-01 19:45:32 -0400341};
342
Len Brown0138d8f2014-04-04 01:21:07 -0400343static struct cpuidle_state ivt_cstates[] = {
344 {
345 .name = "C1-IVT",
346 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100347 .flags = MWAIT2flg(0x00),
Len Brown0138d8f2014-04-04 01:21:07 -0400348 .exit_latency = 1,
349 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100350 .enter = &intel_idle,
351 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400352 {
353 .name = "C1E-IVT",
354 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100355 .flags = MWAIT2flg(0x01),
Len Brown0138d8f2014-04-04 01:21:07 -0400356 .exit_latency = 10,
357 .target_residency = 80,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100358 .enter = &intel_idle,
359 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400360 {
361 .name = "C3-IVT",
362 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100363 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400364 .exit_latency = 59,
365 .target_residency = 156,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100366 .enter = &intel_idle,
367 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400368 {
369 .name = "C6-IVT",
370 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100371 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400372 .exit_latency = 82,
373 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100374 .enter = &intel_idle,
375 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400376 {
377 .enter = NULL }
378};
379
380static struct cpuidle_state ivt_cstates_4s[] = {
381 {
382 .name = "C1-IVT-4S",
383 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100384 .flags = MWAIT2flg(0x00),
Len Brown0138d8f2014-04-04 01:21:07 -0400385 .exit_latency = 1,
386 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100387 .enter = &intel_idle,
388 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400389 {
390 .name = "C1E-IVT-4S",
391 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100392 .flags = MWAIT2flg(0x01),
Len Brown0138d8f2014-04-04 01:21:07 -0400393 .exit_latency = 10,
394 .target_residency = 250,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100395 .enter = &intel_idle,
396 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400397 {
398 .name = "C3-IVT-4S",
399 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100400 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400401 .exit_latency = 59,
402 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100403 .enter = &intel_idle,
404 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400405 {
406 .name = "C6-IVT-4S",
407 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100408 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400409 .exit_latency = 84,
410 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100411 .enter = &intel_idle,
412 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400413 {
414 .enter = NULL }
415};
416
417static struct cpuidle_state ivt_cstates_8s[] = {
418 {
419 .name = "C1-IVT-8S",
420 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100421 .flags = MWAIT2flg(0x00),
Len Brown0138d8f2014-04-04 01:21:07 -0400422 .exit_latency = 1,
423 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100424 .enter = &intel_idle,
425 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400426 {
427 .name = "C1E-IVT-8S",
428 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100429 .flags = MWAIT2flg(0x01),
Len Brown0138d8f2014-04-04 01:21:07 -0400430 .exit_latency = 10,
431 .target_residency = 500,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100432 .enter = &intel_idle,
433 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400434 {
435 .name = "C3-IVT-8S",
436 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100437 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400438 .exit_latency = 59,
439 .target_residency = 600,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100440 .enter = &intel_idle,
441 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400442 {
443 .name = "C6-IVT-8S",
444 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100445 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400446 .exit_latency = 88,
447 .target_residency = 700,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100448 .enter = &intel_idle,
449 .enter_freeze = intel_idle_freeze, },
Len Brown0138d8f2014-04-04 01:21:07 -0400450 {
451 .enter = NULL }
452};
453
Jiang Liuba0dc812014-01-09 15:30:26 +0800454static struct cpuidle_state hsw_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500455 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500456 .name = "C1-HSW",
457 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100458 .flags = MWAIT2flg(0x00),
Len Brown85a4d2d2013-01-31 14:40:49 -0500459 .exit_latency = 2,
460 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100461 .enter = &intel_idle,
462 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500463 {
Len Brown32e95182013-02-02 01:31:56 -0500464 .name = "C1E-HSW",
465 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100466 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500467 .exit_latency = 10,
468 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100469 .enter = &intel_idle,
470 .enter_freeze = intel_idle_freeze, },
Len Brown32e95182013-02-02 01:31:56 -0500471 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500472 .name = "C3-HSW",
473 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100474 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown85a4d2d2013-01-31 14:40:49 -0500475 .exit_latency = 33,
476 .target_residency = 100,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100477 .enter = &intel_idle,
478 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500479 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500480 .name = "C6-HSW",
481 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100482 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown85a4d2d2013-01-31 14:40:49 -0500483 .exit_latency = 133,
484 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100485 .enter = &intel_idle,
486 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500487 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500488 .name = "C7s-HSW",
489 .desc = "MWAIT 0x32",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100490 .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown85a4d2d2013-01-31 14:40:49 -0500491 .exit_latency = 166,
492 .target_residency = 500,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100493 .enter = &intel_idle,
494 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500495 {
Len Brown86239ce2013-02-27 13:18:50 -0500496 .name = "C8-HSW",
497 .desc = "MWAIT 0x40",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100498 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown86239ce2013-02-27 13:18:50 -0500499 .exit_latency = 300,
500 .target_residency = 900,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100501 .enter = &intel_idle,
502 .enter_freeze = intel_idle_freeze, },
Len Brown86239ce2013-02-27 13:18:50 -0500503 {
504 .name = "C9-HSW",
505 .desc = "MWAIT 0x50",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100506 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown86239ce2013-02-27 13:18:50 -0500507 .exit_latency = 600,
508 .target_residency = 1800,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100509 .enter = &intel_idle,
510 .enter_freeze = intel_idle_freeze, },
Len Brown86239ce2013-02-27 13:18:50 -0500511 {
512 .name = "C10-HSW",
513 .desc = "MWAIT 0x60",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100514 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown86239ce2013-02-27 13:18:50 -0500515 .exit_latency = 2600,
516 .target_residency = 7700,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100517 .enter = &intel_idle,
518 .enter_freeze = intel_idle_freeze, },
Len Brown86239ce2013-02-27 13:18:50 -0500519 {
Len Browne022e7e2013-02-01 23:37:30 -0500520 .enter = NULL }
Len Brown85a4d2d2013-01-31 14:40:49 -0500521};
Len Browna138b562014-02-04 23:56:40 -0500522static struct cpuidle_state bdw_cstates[] = {
523 {
524 .name = "C1-BDW",
525 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100526 .flags = MWAIT2flg(0x00),
Len Browna138b562014-02-04 23:56:40 -0500527 .exit_latency = 2,
528 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100529 .enter = &intel_idle,
530 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500531 {
532 .name = "C1E-BDW",
533 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100534 .flags = MWAIT2flg(0x01),
Len Browna138b562014-02-04 23:56:40 -0500535 .exit_latency = 10,
536 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100537 .enter = &intel_idle,
538 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500539 {
540 .name = "C3-BDW",
541 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100542 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500543 .exit_latency = 40,
544 .target_residency = 100,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100545 .enter = &intel_idle,
546 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500547 {
548 .name = "C6-BDW",
549 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100550 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500551 .exit_latency = 133,
552 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100553 .enter = &intel_idle,
554 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500555 {
556 .name = "C7s-BDW",
557 .desc = "MWAIT 0x32",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100558 .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500559 .exit_latency = 166,
560 .target_residency = 500,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100561 .enter = &intel_idle,
562 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500563 {
564 .name = "C8-BDW",
565 .desc = "MWAIT 0x40",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100566 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500567 .exit_latency = 300,
568 .target_residency = 900,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100569 .enter = &intel_idle,
570 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500571 {
572 .name = "C9-BDW",
573 .desc = "MWAIT 0x50",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100574 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500575 .exit_latency = 600,
576 .target_residency = 1800,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100577 .enter = &intel_idle,
578 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500579 {
580 .name = "C10-BDW",
581 .desc = "MWAIT 0x60",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100582 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500583 .exit_latency = 2600,
584 .target_residency = 7700,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100585 .enter = &intel_idle,
586 .enter_freeze = intel_idle_freeze, },
Len Browna138b562014-02-04 23:56:40 -0500587 {
588 .enter = NULL }
589};
Len Brown85a4d2d2013-01-31 14:40:49 -0500590
Len Brown493f1332015-03-25 23:20:37 -0400591static struct cpuidle_state skl_cstates[] = {
592 {
593 .name = "C1-SKL",
594 .desc = "MWAIT 0x00",
595 .flags = MWAIT2flg(0x00),
596 .exit_latency = 2,
597 .target_residency = 2,
598 .enter = &intel_idle,
599 .enter_freeze = intel_idle_freeze, },
600 {
601 .name = "C1E-SKL",
602 .desc = "MWAIT 0x01",
603 .flags = MWAIT2flg(0x01),
604 .exit_latency = 10,
605 .target_residency = 20,
606 .enter = &intel_idle,
607 .enter_freeze = intel_idle_freeze, },
608 {
609 .name = "C3-SKL",
610 .desc = "MWAIT 0x10",
611 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
612 .exit_latency = 70,
613 .target_residency = 100,
614 .enter = &intel_idle,
615 .enter_freeze = intel_idle_freeze, },
616 {
617 .name = "C6-SKL",
618 .desc = "MWAIT 0x20",
619 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown135919a2015-09-09 13:35:05 -0400620 .exit_latency = 85,
Len Brown493f1332015-03-25 23:20:37 -0400621 .target_residency = 200,
622 .enter = &intel_idle,
623 .enter_freeze = intel_idle_freeze, },
624 {
625 .name = "C7s-SKL",
626 .desc = "MWAIT 0x33",
627 .flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED,
628 .exit_latency = 124,
629 .target_residency = 800,
630 .enter = &intel_idle,
631 .enter_freeze = intel_idle_freeze, },
632 {
633 .name = "C8-SKL",
634 .desc = "MWAIT 0x40",
635 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown135919a2015-09-09 13:35:05 -0400636 .exit_latency = 200,
Len Brown493f1332015-03-25 23:20:37 -0400637 .target_residency = 800,
638 .enter = &intel_idle,
639 .enter_freeze = intel_idle_freeze, },
640 {
Len Brown135919a2015-09-09 13:35:05 -0400641 .name = "C9-SKL",
642 .desc = "MWAIT 0x50",
643 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
644 .exit_latency = 480,
645 .target_residency = 5000,
646 .enter = &intel_idle,
647 .enter_freeze = intel_idle_freeze, },
648 {
Len Brown493f1332015-03-25 23:20:37 -0400649 .name = "C10-SKL",
650 .desc = "MWAIT 0x60",
651 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
652 .exit_latency = 890,
653 .target_residency = 5000,
654 .enter = &intel_idle,
655 .enter_freeze = intel_idle_freeze, },
656 {
657 .enter = NULL }
658};
659
Len Brownf9e71652016-04-06 17:00:58 -0400660static struct cpuidle_state skx_cstates[] = {
661 {
662 .name = "C1-SKX",
663 .desc = "MWAIT 0x00",
664 .flags = MWAIT2flg(0x00),
665 .exit_latency = 2,
666 .target_residency = 2,
667 .enter = &intel_idle,
668 .enter_freeze = intel_idle_freeze, },
669 {
670 .name = "C1E-SKX",
671 .desc = "MWAIT 0x01",
672 .flags = MWAIT2flg(0x01),
673 .exit_latency = 10,
674 .target_residency = 20,
675 .enter = &intel_idle,
676 .enter_freeze = intel_idle_freeze, },
677 {
678 .name = "C6-SKX",
679 .desc = "MWAIT 0x20",
680 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
681 .exit_latency = 133,
682 .target_residency = 600,
683 .enter = &intel_idle,
684 .enter_freeze = intel_idle_freeze, },
685 {
686 .enter = NULL }
687};
688
Jiang Liuba0dc812014-01-09 15:30:26 +0800689static struct cpuidle_state atom_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500690 {
Len Brown32e95182013-02-02 01:31:56 -0500691 .name = "C1E-ATM",
Len Brown26717172010-03-08 14:07:30 -0500692 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100693 .flags = MWAIT2flg(0x00),
Len Brown32e95182013-02-02 01:31:56 -0500694 .exit_latency = 10,
695 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100696 .enter = &intel_idle,
697 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500698 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100699 .name = "C2-ATM",
Len Brown26717172010-03-08 14:07:30 -0500700 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100701 .flags = MWAIT2flg(0x10),
Len Brown26717172010-03-08 14:07:30 -0500702 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500703 .target_residency = 80,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100704 .enter = &intel_idle,
705 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500706 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100707 .name = "C4-ATM",
Len Brown26717172010-03-08 14:07:30 -0500708 .desc = "MWAIT 0x30",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100709 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500710 .exit_latency = 100,
Len Brown26717172010-03-08 14:07:30 -0500711 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100712 .enter = &intel_idle,
713 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500714 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100715 .name = "C6-ATM",
Len Brown7fcca7d2010-10-05 13:43:14 -0400716 .desc = "MWAIT 0x52",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100717 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown7fcca7d2010-10-05 13:43:14 -0400718 .exit_latency = 140,
Len Brown7fcca7d2010-10-05 13:43:14 -0400719 .target_residency = 560,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100720 .enter = &intel_idle,
721 .enter_freeze = intel_idle_freeze, },
Len Browne022e7e2013-02-01 23:37:30 -0500722 {
723 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500724};
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300725static struct cpuidle_state tangier_cstates[] = {
726 {
727 .name = "C1-TNG",
728 .desc = "MWAIT 0x00",
729 .flags = MWAIT2flg(0x00),
730 .exit_latency = 1,
731 .target_residency = 4,
732 .enter = &intel_idle,
733 .enter_freeze = intel_idle_freeze, },
734 {
735 .name = "C4-TNG",
736 .desc = "MWAIT 0x30",
737 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
738 .exit_latency = 100,
739 .target_residency = 400,
740 .enter = &intel_idle,
741 .enter_freeze = intel_idle_freeze, },
742 {
743 .name = "C6-TNG",
744 .desc = "MWAIT 0x52",
745 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
746 .exit_latency = 140,
747 .target_residency = 560,
748 .enter = &intel_idle,
749 .enter_freeze = intel_idle_freeze, },
750 {
751 .name = "C7-TNG",
752 .desc = "MWAIT 0x60",
753 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
754 .exit_latency = 1200,
755 .target_residency = 4000,
756 .enter = &intel_idle,
757 .enter_freeze = intel_idle_freeze, },
758 {
759 .name = "C9-TNG",
760 .desc = "MWAIT 0x64",
761 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
762 .exit_latency = 10000,
763 .target_residency = 20000,
764 .enter = &intel_idle,
765 .enter_freeze = intel_idle_freeze, },
766 {
767 .enter = NULL }
768};
Jiang Liu88390992014-01-09 15:30:27 +0800769static struct cpuidle_state avn_cstates[] = {
Len Brownfab04b22013-11-09 00:30:17 -0500770 {
771 .name = "C1-AVN",
772 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100773 .flags = MWAIT2flg(0x00),
Len Brownfab04b22013-11-09 00:30:17 -0500774 .exit_latency = 2,
775 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100776 .enter = &intel_idle,
777 .enter_freeze = intel_idle_freeze, },
Len Brownfab04b22013-11-09 00:30:17 -0500778 {
779 .name = "C6-AVN",
780 .desc = "MWAIT 0x51",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100781 .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownfab04b22013-11-09 00:30:17 -0500782 .exit_latency = 15,
783 .target_residency = 45,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100784 .enter = &intel_idle,
785 .enter_freeze = intel_idle_freeze, },
Jiang Liu88390992014-01-09 15:30:27 +0800786 {
787 .enter = NULL }
Len Brownfab04b22013-11-09 00:30:17 -0500788};
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -0700789static struct cpuidle_state knl_cstates[] = {
790 {
791 .name = "C1-KNL",
792 .desc = "MWAIT 0x00",
793 .flags = MWAIT2flg(0x00),
794 .exit_latency = 1,
795 .target_residency = 2,
796 .enter = &intel_idle,
797 .enter_freeze = intel_idle_freeze },
798 {
799 .name = "C6-KNL",
800 .desc = "MWAIT 0x10",
801 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
802 .exit_latency = 120,
803 .target_residency = 500,
804 .enter = &intel_idle,
805 .enter_freeze = intel_idle_freeze },
806 {
807 .enter = NULL }
808};
Len Brown26717172010-03-08 14:07:30 -0500809
Len Brown5dcef692016-04-06 17:00:47 -0400810static struct cpuidle_state bxt_cstates[] = {
811 {
812 .name = "C1-BXT",
813 .desc = "MWAIT 0x00",
814 .flags = MWAIT2flg(0x00),
815 .exit_latency = 2,
816 .target_residency = 2,
817 .enter = &intel_idle,
818 .enter_freeze = intel_idle_freeze, },
819 {
820 .name = "C1E-BXT",
821 .desc = "MWAIT 0x01",
822 .flags = MWAIT2flg(0x01),
823 .exit_latency = 10,
824 .target_residency = 20,
825 .enter = &intel_idle,
826 .enter_freeze = intel_idle_freeze, },
827 {
828 .name = "C6-BXT",
829 .desc = "MWAIT 0x20",
830 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
831 .exit_latency = 133,
832 .target_residency = 133,
833 .enter = &intel_idle,
834 .enter_freeze = intel_idle_freeze, },
835 {
836 .name = "C7s-BXT",
837 .desc = "MWAIT 0x31",
838 .flags = MWAIT2flg(0x31) | CPUIDLE_FLAG_TLB_FLUSHED,
839 .exit_latency = 155,
840 .target_residency = 155,
841 .enter = &intel_idle,
842 .enter_freeze = intel_idle_freeze, },
843 {
844 .name = "C8-BXT",
845 .desc = "MWAIT 0x40",
846 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
847 .exit_latency = 1000,
848 .target_residency = 1000,
849 .enter = &intel_idle,
850 .enter_freeze = intel_idle_freeze, },
851 {
852 .name = "C9-BXT",
853 .desc = "MWAIT 0x50",
854 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
855 .exit_latency = 2000,
856 .target_residency = 2000,
857 .enter = &intel_idle,
858 .enter_freeze = intel_idle_freeze, },
859 {
860 .name = "C10-BXT",
861 .desc = "MWAIT 0x60",
862 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
863 .exit_latency = 10000,
864 .target_residency = 10000,
865 .enter = &intel_idle,
866 .enter_freeze = intel_idle_freeze, },
867 {
868 .enter = NULL }
869};
870
Jacob Pan0080d652016-06-17 01:28:34 -0400871static struct cpuidle_state dnv_cstates[] = {
872 {
873 .name = "C1-DNV",
874 .desc = "MWAIT 0x00",
875 .flags = MWAIT2flg(0x00),
876 .exit_latency = 2,
877 .target_residency = 2,
878 .enter = &intel_idle,
879 .enter_freeze = intel_idle_freeze, },
880 {
881 .name = "C1E-DNV",
882 .desc = "MWAIT 0x01",
883 .flags = MWAIT2flg(0x01),
884 .exit_latency = 10,
885 .target_residency = 20,
886 .enter = &intel_idle,
887 .enter_freeze = intel_idle_freeze, },
888 {
889 .name = "C6-DNV",
890 .desc = "MWAIT 0x20",
891 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
892 .exit_latency = 50,
893 .target_residency = 500,
894 .enter = &intel_idle,
895 .enter_freeze = intel_idle_freeze, },
896 {
897 .enter = NULL }
898};
899
Len Brown26717172010-03-08 14:07:30 -0500900/**
901 * intel_idle
902 * @dev: cpuidle_device
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530903 * @drv: cpuidle driver
Deepthi Dharware978aa72011-10-28 16:20:09 +0530904 * @index: index of cpuidle state
Len Brown26717172010-03-08 14:07:30 -0500905 *
Yanmin Zhang63ff07b2012-01-10 15:48:21 -0800906 * Must be called under local_irq_disable().
Len Brown26717172010-03-08 14:07:30 -0500907 */
Chris Metcalf6727ad92016-10-07 17:02:55 -0700908static __cpuidle int intel_idle(struct cpuidle_device *dev,
909 struct cpuidle_driver *drv, int index)
Len Brown26717172010-03-08 14:07:30 -0500910{
911 unsigned long ecx = 1; /* break on interrupt flag */
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530912 struct cpuidle_state *state = &drv->states[index];
Len Brownb1beab42013-01-31 19:55:37 -0500913 unsigned long eax = flg2MWAIT(state->flags);
Len Brown26717172010-03-08 14:07:30 -0500914 unsigned int cstate;
Len Brown26717172010-03-08 14:07:30 -0500915 int cpu = smp_processor_id();
916
917 cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
918
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400919 /*
Len Brownc8381cc2010-10-15 20:43:06 -0400920 * leave_mm() to avoid costly and often unnecessary wakeups
921 * for flushing the user TLB's associated with the active mm.
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400922 */
Len Brownc8381cc2010-10-15 20:43:06 -0400923 if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400924 leave_mm(cpu);
925
Len Brown26717172010-03-08 14:07:30 -0500926 if (!(lapic_timer_reliable_states & (1 << (cstate))))
Thomas Gleixnerf6cee192015-04-03 02:14:23 +0200927 tick_broadcast_enter();
Len Brown26717172010-03-08 14:07:30 -0500928
Peter Zijlstra16824252013-12-12 15:08:36 +0100929 mwait_idle_with_hints(eax, ecx);
Len Brown26717172010-03-08 14:07:30 -0500930
Len Brown26717172010-03-08 14:07:30 -0500931 if (!(lapic_timer_reliable_states & (1 << (cstate))))
Thomas Gleixnerf6cee192015-04-03 02:14:23 +0200932 tick_broadcast_exit();
Len Brown26717172010-03-08 14:07:30 -0500933
Deepthi Dharware978aa72011-10-28 16:20:09 +0530934 return index;
Len Brown26717172010-03-08 14:07:30 -0500935}
936
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100937/**
938 * intel_idle_freeze - simplified "enter" callback routine for suspend-to-idle
939 * @dev: cpuidle_device
940 * @drv: cpuidle driver
941 * @index: state index
942 */
943static void intel_idle_freeze(struct cpuidle_device *dev,
944 struct cpuidle_driver *drv, int index)
945{
946 unsigned long ecx = 1; /* break on interrupt flag */
947 unsigned long eax = flg2MWAIT(drv->states[index].flags);
948
949 mwait_idle_with_hints(eax, ecx);
950}
951
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +0100952static void __setup_broadcast_timer(bool on)
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800953{
Thomas Gleixner76962ca2015-04-03 02:02:34 +0200954 if (on)
955 tick_broadcast_enable();
956 else
957 tick_broadcast_disable();
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800958}
959
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +0100960static void auto_demotion_disable(void)
Len Brown14796fc2011-01-18 20:48:27 -0500961{
962 unsigned long long msr_bits;
963
964 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
Andi Kleenb66b8b92012-01-26 00:09:07 +0100965 msr_bits &= ~(icpu->auto_demotion_disable_flags);
Len Brown14796fc2011-01-18 20:48:27 -0500966 wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
967}
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +0100968static void c1e_promotion_disable(void)
Len Brown32e95182013-02-02 01:31:56 -0500969{
970 unsigned long long msr_bits;
971
972 rdmsrl(MSR_IA32_POWER_CTL, msr_bits);
973 msr_bits &= ~0x2;
974 wrmsrl(MSR_IA32_POWER_CTL, msr_bits);
975}
Len Brown14796fc2011-01-18 20:48:27 -0500976
Andi Kleenb66b8b92012-01-26 00:09:07 +0100977static const struct idle_cpu idle_cpu_nehalem = {
978 .state_table = nehalem_cstates,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100979 .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
Len Brown32e95182013-02-02 01:31:56 -0500980 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100981};
982
983static const struct idle_cpu idle_cpu_atom = {
984 .state_table = atom_cstates,
985};
986
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300987static const struct idle_cpu idle_cpu_tangier = {
988 .state_table = tangier_cstates,
989};
990
Andi Kleenb66b8b92012-01-26 00:09:07 +0100991static const struct idle_cpu idle_cpu_lincroft = {
992 .state_table = atom_cstates,
993 .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE,
994};
995
996static const struct idle_cpu idle_cpu_snb = {
997 .state_table = snb_cstates,
Len Brown32e95182013-02-02 01:31:56 -0500998 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100999};
1000
Len Brown718987d2014-02-14 02:30:00 -05001001static const struct idle_cpu idle_cpu_byt = {
1002 .state_table = byt_cstates,
1003 .disable_promotion_to_c1e = true,
Len Brown8c058d532014-07-31 15:21:24 -04001004 .byt_auto_demotion_disable_flag = true,
Len Brown718987d2014-02-14 02:30:00 -05001005};
1006
Len Browncab07a52015-03-27 20:54:01 -04001007static const struct idle_cpu idle_cpu_cht = {
1008 .state_table = cht_cstates,
1009 .disable_promotion_to_c1e = true,
1010 .byt_auto_demotion_disable_flag = true,
1011};
1012
Len Brown6edab082012-06-01 19:45:32 -04001013static const struct idle_cpu idle_cpu_ivb = {
1014 .state_table = ivb_cstates,
Len Brown32e95182013-02-02 01:31:56 -05001015 .disable_promotion_to_c1e = true,
Len Brown6edab082012-06-01 19:45:32 -04001016};
1017
Len Brown0138d8f2014-04-04 01:21:07 -04001018static const struct idle_cpu idle_cpu_ivt = {
1019 .state_table = ivt_cstates,
1020 .disable_promotion_to_c1e = true,
1021};
1022
Len Brown85a4d2d2013-01-31 14:40:49 -05001023static const struct idle_cpu idle_cpu_hsw = {
1024 .state_table = hsw_cstates,
Len Brown32e95182013-02-02 01:31:56 -05001025 .disable_promotion_to_c1e = true,
Len Brown85a4d2d2013-01-31 14:40:49 -05001026};
1027
Len Browna138b562014-02-04 23:56:40 -05001028static const struct idle_cpu idle_cpu_bdw = {
1029 .state_table = bdw_cstates,
1030 .disable_promotion_to_c1e = true,
1031};
1032
Len Brown493f1332015-03-25 23:20:37 -04001033static const struct idle_cpu idle_cpu_skl = {
1034 .state_table = skl_cstates,
1035 .disable_promotion_to_c1e = true,
1036};
1037
Len Brownf9e71652016-04-06 17:00:58 -04001038static const struct idle_cpu idle_cpu_skx = {
1039 .state_table = skx_cstates,
1040 .disable_promotion_to_c1e = true,
1041};
Len Brown493f1332015-03-25 23:20:37 -04001042
Len Brownfab04b22013-11-09 00:30:17 -05001043static const struct idle_cpu idle_cpu_avn = {
1044 .state_table = avn_cstates,
1045 .disable_promotion_to_c1e = true,
1046};
1047
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -07001048static const struct idle_cpu idle_cpu_knl = {
1049 .state_table = knl_cstates,
1050};
1051
Len Brown5dcef692016-04-06 17:00:47 -04001052static const struct idle_cpu idle_cpu_bxt = {
1053 .state_table = bxt_cstates,
1054 .disable_promotion_to_c1e = true,
1055};
1056
Jacob Pan0080d652016-06-17 01:28:34 -04001057static const struct idle_cpu idle_cpu_dnv = {
1058 .state_table = dnv_cstates,
1059 .disable_promotion_to_c1e = true,
1060};
1061
Andi Kleenb66b8b92012-01-26 00:09:07 +01001062#define ICPU(model, cpu) \
1063 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
1064
Mathias Kraused5cdc3c2015-03-25 22:15:14 +01001065static const struct x86_cpu_id intel_idle_ids[] __initconst = {
Dave Hansendb73c5a2016-06-02 17:19:32 -07001066 ICPU(INTEL_FAM6_NEHALEM_EP, idle_cpu_nehalem),
1067 ICPU(INTEL_FAM6_NEHALEM, idle_cpu_nehalem),
Dave Hansen4b3b2342016-06-29 12:27:37 -07001068 ICPU(INTEL_FAM6_NEHALEM_G, idle_cpu_nehalem),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001069 ICPU(INTEL_FAM6_WESTMERE, idle_cpu_nehalem),
1070 ICPU(INTEL_FAM6_WESTMERE_EP, idle_cpu_nehalem),
1071 ICPU(INTEL_FAM6_NEHALEM_EX, idle_cpu_nehalem),
1072 ICPU(INTEL_FAM6_ATOM_PINEVIEW, idle_cpu_atom),
1073 ICPU(INTEL_FAM6_ATOM_LINCROFT, idle_cpu_lincroft),
1074 ICPU(INTEL_FAM6_WESTMERE_EX, idle_cpu_nehalem),
1075 ICPU(INTEL_FAM6_SANDYBRIDGE, idle_cpu_snb),
1076 ICPU(INTEL_FAM6_SANDYBRIDGE_X, idle_cpu_snb),
1077 ICPU(INTEL_FAM6_ATOM_CEDARVIEW, idle_cpu_atom),
1078 ICPU(INTEL_FAM6_ATOM_SILVERMONT1, idle_cpu_byt),
Andy Shevchenko5e7ec262016-10-25 17:11:39 +03001079 ICPU(INTEL_FAM6_ATOM_MERRIFIELD, idle_cpu_tangier),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001080 ICPU(INTEL_FAM6_ATOM_AIRMONT, idle_cpu_cht),
1081 ICPU(INTEL_FAM6_IVYBRIDGE, idle_cpu_ivb),
1082 ICPU(INTEL_FAM6_IVYBRIDGE_X, idle_cpu_ivt),
1083 ICPU(INTEL_FAM6_HASWELL_CORE, idle_cpu_hsw),
1084 ICPU(INTEL_FAM6_HASWELL_X, idle_cpu_hsw),
1085 ICPU(INTEL_FAM6_HASWELL_ULT, idle_cpu_hsw),
1086 ICPU(INTEL_FAM6_HASWELL_GT3E, idle_cpu_hsw),
1087 ICPU(INTEL_FAM6_ATOM_SILVERMONT2, idle_cpu_avn),
1088 ICPU(INTEL_FAM6_BROADWELL_CORE, idle_cpu_bdw),
1089 ICPU(INTEL_FAM6_BROADWELL_GT3E, idle_cpu_bdw),
1090 ICPU(INTEL_FAM6_BROADWELL_X, idle_cpu_bdw),
1091 ICPU(INTEL_FAM6_BROADWELL_XEON_D, idle_cpu_bdw),
1092 ICPU(INTEL_FAM6_SKYLAKE_MOBILE, idle_cpu_skl),
1093 ICPU(INTEL_FAM6_SKYLAKE_DESKTOP, idle_cpu_skl),
1094 ICPU(INTEL_FAM6_KABYLAKE_MOBILE, idle_cpu_skl),
1095 ICPU(INTEL_FAM6_KABYLAKE_DESKTOP, idle_cpu_skl),
1096 ICPU(INTEL_FAM6_SKYLAKE_X, idle_cpu_skx),
1097 ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
Piotr Luca2c1bc62016-10-13 17:30:58 +02001098 ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001099 ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
Jacob Pan0080d652016-06-17 01:28:34 -04001100 ICPU(INTEL_FAM6_ATOM_DENVERTON, idle_cpu_dnv),
Andi Kleenb66b8b92012-01-26 00:09:07 +01001101 {}
1102};
Andi Kleenb66b8b92012-01-26 00:09:07 +01001103
Len Brown26717172010-03-08 14:07:30 -05001104/*
1105 * intel_idle_probe()
1106 */
Bartlomiej Zolnierkiewicz00f3e752013-08-30 12:27:45 +02001107static int __init intel_idle_probe(void)
Len Brown26717172010-03-08 14:07:30 -05001108{
Len Brownc4236282010-05-28 02:22:03 -04001109 unsigned int eax, ebx, ecx;
Andi Kleenb66b8b92012-01-26 00:09:07 +01001110 const struct x86_cpu_id *id;
Len Brown26717172010-03-08 14:07:30 -05001111
1112 if (max_cstate == 0) {
1113 pr_debug(PREFIX "disabled\n");
1114 return -EPERM;
1115 }
1116
Andi Kleenb66b8b92012-01-26 00:09:07 +01001117 id = x86_match_cpu(intel_idle_ids);
1118 if (!id) {
1119 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
1120 boot_cpu_data.x86 == 6)
1121 pr_debug(PREFIX "does not run on family %d model %d\n",
1122 boot_cpu_data.x86, boot_cpu_data.x86_model);
Len Brown26717172010-03-08 14:07:30 -05001123 return -ENODEV;
Andi Kleenb66b8b92012-01-26 00:09:07 +01001124 }
Len Brown26717172010-03-08 14:07:30 -05001125
1126 if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
1127 return -ENODEV;
1128
Len Brownc4236282010-05-28 02:22:03 -04001129 cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
Len Brown26717172010-03-08 14:07:30 -05001130
1131 if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
Thomas Renninger5c2a9f02011-12-04 22:17:29 +01001132 !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
1133 !mwait_substates)
Len Brown26717172010-03-08 14:07:30 -05001134 return -ENODEV;
Len Brown26717172010-03-08 14:07:30 -05001135
Len Brownc4236282010-05-28 02:22:03 -04001136 pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
Len Brown26717172010-03-08 14:07:30 -05001137
Andi Kleenb66b8b92012-01-26 00:09:07 +01001138 icpu = (const struct idle_cpu *)id->driver_data;
1139 cpuidle_state_table = icpu->state_table;
Len Brown26717172010-03-08 14:07:30 -05001140
1141 pr_debug(PREFIX "v" INTEL_IDLE_VERSION
1142 " model 0x%X\n", boot_cpu_data.x86_model);
1143
Len Brown26717172010-03-08 14:07:30 -05001144 return 0;
1145}
1146
1147/*
1148 * intel_idle_cpuidle_devices_uninit()
Richard Cochranca424892016-04-06 17:00:53 -04001149 * Unregisters the cpuidle devices.
Len Brown26717172010-03-08 14:07:30 -05001150 */
1151static void intel_idle_cpuidle_devices_uninit(void)
1152{
1153 int i;
1154 struct cpuidle_device *dev;
1155
1156 for_each_online_cpu(i) {
1157 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
1158 cpuidle_unregister_device(dev);
1159 }
Len Brown26717172010-03-08 14:07:30 -05001160}
Len Brown0138d8f2014-04-04 01:21:07 -04001161
1162/*
Len Brownd70e28f2016-03-13 00:33:48 -05001163 * ivt_idle_state_table_update(void)
1164 *
1165 * Tune IVT multi-socket targets
1166 * Assumption: num_sockets == (max_package_num + 1)
1167 */
1168static void ivt_idle_state_table_update(void)
1169{
1170 /* IVT uses a different table for 1-2, 3-4, and > 4 sockets */
1171 int cpu, package_num, num_sockets = 1;
1172
1173 for_each_online_cpu(cpu) {
1174 package_num = topology_physical_package_id(cpu);
1175 if (package_num + 1 > num_sockets) {
1176 num_sockets = package_num + 1;
1177
1178 if (num_sockets > 4) {
1179 cpuidle_state_table = ivt_cstates_8s;
1180 return;
1181 }
1182 }
1183 }
1184
1185 if (num_sockets > 2)
1186 cpuidle_state_table = ivt_cstates_4s;
1187
1188 /* else, 1 and 2 socket systems use default ivt_cstates */
1189}
Len Brown5dcef692016-04-06 17:00:47 -04001190
1191/*
1192 * Translate IRTL (Interrupt Response Time Limit) MSR to usec
1193 */
1194
1195static unsigned int irtl_ns_units[] = {
1196 1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
1197
1198static unsigned long long irtl_2_usec(unsigned long long irtl)
1199{
1200 unsigned long long ns;
1201
Jan Beulich3451ab32016-06-27 00:35:12 -06001202 if (!irtl)
1203 return 0;
1204
Jan Beulichbef45092016-06-27 00:35:48 -06001205 ns = irtl_ns_units[(irtl >> 10) & 0x7];
Len Brown5dcef692016-04-06 17:00:47 -04001206
1207 return div64_u64((irtl & 0x3FF) * ns, 1000);
1208}
1209/*
1210 * bxt_idle_state_table_update(void)
1211 *
1212 * On BXT, we trust the IRTL to show the definitive maximum latency
1213 * We use the same value for target_residency.
1214 */
1215static void bxt_idle_state_table_update(void)
1216{
1217 unsigned long long msr;
Jan Beulich3451ab32016-06-27 00:35:12 -06001218 unsigned int usec;
Len Brown5dcef692016-04-06 17:00:47 -04001219
1220 rdmsrl(MSR_PKGC6_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001221 usec = irtl_2_usec(msr);
1222 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001223 bxt_cstates[2].exit_latency = usec;
1224 bxt_cstates[2].target_residency = usec;
1225 }
1226
1227 rdmsrl(MSR_PKGC7_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001228 usec = irtl_2_usec(msr);
1229 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001230 bxt_cstates[3].exit_latency = usec;
1231 bxt_cstates[3].target_residency = usec;
1232 }
1233
1234 rdmsrl(MSR_PKGC8_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001235 usec = irtl_2_usec(msr);
1236 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001237 bxt_cstates[4].exit_latency = usec;
1238 bxt_cstates[4].target_residency = usec;
1239 }
1240
1241 rdmsrl(MSR_PKGC9_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001242 usec = irtl_2_usec(msr);
1243 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001244 bxt_cstates[5].exit_latency = usec;
1245 bxt_cstates[5].target_residency = usec;
1246 }
1247
1248 rdmsrl(MSR_PKGC10_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001249 usec = irtl_2_usec(msr);
1250 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001251 bxt_cstates[6].exit_latency = usec;
1252 bxt_cstates[6].target_residency = usec;
1253 }
1254
1255}
Len Brownd70e28f2016-03-13 00:33:48 -05001256/*
1257 * sklh_idle_state_table_update(void)
1258 *
1259 * On SKL-H (model 0x5e) disable C8 and C9 if:
1260 * C10 is enabled and SGX disabled
1261 */
1262static void sklh_idle_state_table_update(void)
1263{
1264 unsigned long long msr;
1265 unsigned int eax, ebx, ecx, edx;
1266
1267
1268 /* if PC10 disabled via cmdline intel_idle.max_cstate=7 or shallower */
1269 if (max_cstate <= 7)
1270 return;
1271
1272 /* if PC10 not present in CPUID.MWAIT.EDX */
1273 if ((mwait_substates & (0xF << 28)) == 0)
1274 return;
1275
1276 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr);
1277
1278 /* PC10 is not enabled in PKG C-state limit */
1279 if ((msr & 0xF) != 8)
1280 return;
1281
1282 ecx = 0;
1283 cpuid(7, &eax, &ebx, &ecx, &edx);
1284
1285 /* if SGX is present */
1286 if (ebx & (1 << 2)) {
1287
1288 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
1289
1290 /* if SGX is enabled */
1291 if (msr & (1 << 18))
1292 return;
1293 }
1294
1295 skl_cstates[5].disabled = 1; /* C8-SKL */
1296 skl_cstates[6].disabled = 1; /* C9-SKL */
1297}
1298/*
Len Brown0138d8f2014-04-04 01:21:07 -04001299 * intel_idle_state_table_update()
1300 *
1301 * Update the default state_table for this CPU-id
Len Brown0138d8f2014-04-04 01:21:07 -04001302 */
Len Brownd70e28f2016-03-13 00:33:48 -05001303
1304static void intel_idle_state_table_update(void)
Len Brown0138d8f2014-04-04 01:21:07 -04001305{
Len Brownd70e28f2016-03-13 00:33:48 -05001306 switch (boot_cpu_data.x86_model) {
Len Brown0138d8f2014-04-04 01:21:07 -04001307
Dave Hansendb73c5a2016-06-02 17:19:32 -07001308 case INTEL_FAM6_IVYBRIDGE_X:
Len Brownd70e28f2016-03-13 00:33:48 -05001309 ivt_idle_state_table_update();
1310 break;
Dave Hansendb73c5a2016-06-02 17:19:32 -07001311 case INTEL_FAM6_ATOM_GOLDMONT:
Len Brown5dcef692016-04-06 17:00:47 -04001312 bxt_idle_state_table_update();
1313 break;
Dave Hansendb73c5a2016-06-02 17:19:32 -07001314 case INTEL_FAM6_SKYLAKE_DESKTOP:
Len Brownd70e28f2016-03-13 00:33:48 -05001315 sklh_idle_state_table_update();
1316 break;
Len Brown0138d8f2014-04-04 01:21:07 -04001317 }
Len Brown0138d8f2014-04-04 01:21:07 -04001318}
1319
Len Brown26717172010-03-08 14:07:30 -05001320/*
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301321 * intel_idle_cpuidle_driver_init()
1322 * allocate, initialize cpuidle_states
1323 */
Richard Cochran5469c822016-04-06 17:00:49 -04001324static void __init intel_idle_cpuidle_driver_init(void)
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301325{
1326 int cstate;
1327 struct cpuidle_driver *drv = &intel_idle_driver;
1328
Len Brown0138d8f2014-04-04 01:21:07 -04001329 intel_idle_state_table_update();
1330
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301331 drv->state_count = 1;
1332
Len Browne022e7e2013-02-01 23:37:30 -05001333 for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) {
Len Brown24bfa952014-02-14 00:50:34 -05001334 int num_substates, mwait_hint, mwait_cstate;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301335
Len Brown7dd0e0a2015-05-27 17:11:37 -04001336 if ((cpuidle_state_table[cstate].enter == NULL) &&
1337 (cpuidle_state_table[cstate].enter_freeze == NULL))
Len Browne022e7e2013-02-01 23:37:30 -05001338 break;
1339
1340 if (cstate + 1 > max_cstate) {
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301341 printk(PREFIX "max_cstate %d reached\n",
1342 max_cstate);
1343 break;
1344 }
1345
Len Browne022e7e2013-02-01 23:37:30 -05001346 mwait_hint = flg2MWAIT(cpuidle_state_table[cstate].flags);
1347 mwait_cstate = MWAIT_HINT2CSTATE(mwait_hint);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301348
Len Brown24bfa952014-02-14 00:50:34 -05001349 /* number of sub-states for this state in CPUID.MWAIT */
Len Browne022e7e2013-02-01 23:37:30 -05001350 num_substates = (mwait_substates >> ((mwait_cstate + 1) * 4))
1351 & MWAIT_SUBSTATE_MASK;
1352
Len Brown24bfa952014-02-14 00:50:34 -05001353 /* if NO sub-states for this state in CPUID, skip it */
1354 if (num_substates == 0)
Len Browne022e7e2013-02-01 23:37:30 -05001355 continue;
1356
Len Brownd70e28f2016-03-13 00:33:48 -05001357 /* if state marked as disabled, skip it */
1358 if (cpuidle_state_table[cstate].disabled != 0) {
1359 pr_debug(PREFIX "state %s is disabled",
1360 cpuidle_state_table[cstate].name);
1361 continue;
1362 }
1363
1364
Len Browne022e7e2013-02-01 23:37:30 -05001365 if (((mwait_cstate + 1) > 2) &&
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301366 !boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
1367 mark_tsc_unstable("TSC halts in idle"
1368 " states deeper than C2");
1369
1370 drv->states[drv->state_count] = /* structure copy */
1371 cpuidle_state_table[cstate];
1372
1373 drv->state_count += 1;
1374 }
1375
Len Brown8c058d532014-07-31 15:21:24 -04001376 if (icpu->byt_auto_demotion_disable_flag) {
1377 wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
1378 wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
1379 }
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301380}
1381
1382
1383/*
Thomas Renninger65b7f832012-01-17 22:40:08 +01001384 * intel_idle_cpu_init()
Len Brown26717172010-03-08 14:07:30 -05001385 * allocate, initialize, register cpuidle_devices
Thomas Renninger65b7f832012-01-17 22:40:08 +01001386 * @cpu: cpu/core to initialize
Len Brown26717172010-03-08 14:07:30 -05001387 */
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001388static int intel_idle_cpu_init(unsigned int cpu)
Len Brown26717172010-03-08 14:07:30 -05001389{
Len Brown26717172010-03-08 14:07:30 -05001390 struct cpuidle_device *dev;
1391
Thomas Renninger65b7f832012-01-17 22:40:08 +01001392 dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
Thomas Renninger65b7f832012-01-17 22:40:08 +01001393 dev->cpu = cpu;
Len Brown26717172010-03-08 14:07:30 -05001394
Thomas Renninger65b7f832012-01-17 22:40:08 +01001395 if (cpuidle_register_device(dev)) {
1396 pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
Thomas Renninger65b7f832012-01-17 22:40:08 +01001397 return -EIO;
Len Brown26717172010-03-08 14:07:30 -05001398 }
1399
Andi Kleenb66b8b92012-01-26 00:09:07 +01001400 if (icpu->auto_demotion_disable_flags)
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001401 auto_demotion_disable();
Thomas Renninger65b7f832012-01-17 22:40:08 +01001402
Bartlomiej Zolnierkiewiczdbf87ab2013-12-20 19:47:28 +01001403 if (icpu->disable_promotion_to_c1e)
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001404 c1e_promotion_disable();
1405
1406 return 0;
1407}
1408
1409static int intel_idle_cpu_online(unsigned int cpu)
1410{
1411 struct cpuidle_device *dev;
1412
1413 if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
1414 __setup_broadcast_timer(true);
1415
1416 /*
1417 * Some systems can hotplug a cpu at runtime after
1418 * the kernel has booted, we have to initialize the
1419 * driver in this case
1420 */
1421 dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
1422 if (!dev->registered)
1423 return intel_idle_cpu_init(cpu);
Bartlomiej Zolnierkiewiczdbf87ab2013-12-20 19:47:28 +01001424
Len Brown26717172010-03-08 14:07:30 -05001425 return 0;
1426}
Len Brown26717172010-03-08 14:07:30 -05001427
1428static int __init intel_idle_init(void)
1429{
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001430 int retval;
Len Brown26717172010-03-08 14:07:30 -05001431
Thomas Renningerd1896042010-11-03 17:06:14 +01001432 /* Do not load intel_idle at all for now if idle= is passed */
1433 if (boot_option_idle_override != IDLE_NO_OVERRIDE)
1434 return -ENODEV;
1435
Len Brown26717172010-03-08 14:07:30 -05001436 retval = intel_idle_probe();
1437 if (retval)
1438 return retval;
1439
Richard Cochrane9df69c2016-04-06 17:00:52 -04001440 intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
1441 if (intel_idle_cpuidle_devices == NULL)
1442 return -ENOMEM;
1443
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301444 intel_idle_cpuidle_driver_init();
Len Brown26717172010-03-08 14:07:30 -05001445 retval = cpuidle_register_driver(&intel_idle_driver);
1446 if (retval) {
Konrad Rzeszutek Wilk3735d522012-08-16 22:06:55 +02001447 struct cpuidle_driver *drv = cpuidle_get_driver();
Len Brown26717172010-03-08 14:07:30 -05001448 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
Konrad Rzeszutek Wilk3735d522012-08-16 22:06:55 +02001449 drv ? drv->name : "none");
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001450 goto init_driver_fail;
Len Brown26717172010-03-08 14:07:30 -05001451 }
1452
Richard Cochran2259a812016-04-06 17:00:54 -04001453 if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
1454 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
Richard Cochran2259a812016-04-06 17:00:54 -04001455
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001456 retval = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "idle/intel:online",
1457 intel_idle_cpu_online, NULL);
1458 if (retval < 0)
1459 goto hp_setup_fail;
Len Brown26717172010-03-08 14:07:30 -05001460
Richard Cochran2259a812016-04-06 17:00:54 -04001461 pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
1462 lapic_timer_reliable_states);
1463
Len Brown26717172010-03-08 14:07:30 -05001464 return 0;
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001465
1466hp_setup_fail:
1467 intel_idle_cpuidle_devices_uninit();
1468 cpuidle_unregister_driver(&intel_idle_driver);
1469init_driver_fail:
1470 free_percpu(intel_idle_cpuidle_devices);
1471 return retval;
1472
Len Brown26717172010-03-08 14:07:30 -05001473}
Paul Gortmaker02c4fae2016-06-17 01:28:33 -04001474device_initcall(intel_idle_init);
Len Brown26717172010-03-08 14:07:30 -05001475
Paul Gortmaker02c4fae2016-06-17 01:28:33 -04001476/*
1477 * We are not really modular, but we used to support that. Meaning we also
1478 * support "intel_idle.max_cstate=..." at boot and also a read-only export of
1479 * it at /sys/module/intel_idle/parameters/max_cstate -- so using module_param
1480 * is the easiest way (currently) to continue doing that.
1481 */
Len Brown26717172010-03-08 14:07:30 -05001482module_param(max_cstate, int, 0444);