Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 1 | /* |
| 2 | * OMAP4 Power Management Routines |
| 3 | * |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 4 | * Copyright (C) 2010-2011 Texas Instruments, Inc. |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 5 | * Rajendra Nayak <rnayak@ti.com> |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 6 | * Santosh Shilimkar <santosh.shilimkar@ti.com> |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/pm.h> |
| 14 | #include <linux/suspend.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/err.h> |
| 18 | #include <linux/slab.h> |
| 19 | |
Tony Lindgren | 4e65331 | 2011-11-10 22:45:17 +0100 | [diff] [blame] | 20 | #include "common.h" |
Santosh Shilimkar | 3c50729 | 2011-01-05 22:03:17 +0530 | [diff] [blame] | 21 | #include "clockdomain.h" |
Paul Walmsley | 72e06d0 | 2010-12-21 21:05:16 -0700 | [diff] [blame] | 22 | #include "powerdomain.h" |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 23 | #include "pm.h" |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 24 | |
| 25 | struct power_state { |
| 26 | struct powerdomain *pwrdm; |
| 27 | u32 next_state; |
| 28 | #ifdef CONFIG_SUSPEND |
| 29 | u32 saved_state; |
Santosh Shilimkar | 3ba2a73 | 2011-06-06 14:33:29 +0530 | [diff] [blame] | 30 | u32 saved_logic_state; |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 31 | #endif |
| 32 | struct list_head node; |
| 33 | }; |
| 34 | |
| 35 | static LIST_HEAD(pwrst_list); |
| 36 | |
| 37 | #ifdef CONFIG_SUSPEND |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 38 | static int omap4_pm_suspend(void) |
| 39 | { |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 40 | struct power_state *pwrst; |
| 41 | int state, ret = 0; |
| 42 | u32 cpu_id = smp_processor_id(); |
| 43 | |
| 44 | /* Save current powerdomain state */ |
| 45 | list_for_each_entry(pwrst, &pwrst_list, node) { |
| 46 | pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); |
Santosh Shilimkar | 3ba2a73 | 2011-06-06 14:33:29 +0530 | [diff] [blame] | 47 | pwrst->saved_logic_state = pwrdm_read_logic_retst(pwrst->pwrdm); |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 48 | } |
| 49 | |
| 50 | /* Set targeted power domain states by suspend */ |
| 51 | list_for_each_entry(pwrst, &pwrst_list, node) { |
| 52 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state); |
Santosh Shilimkar | 3ba2a73 | 2011-06-06 14:33:29 +0530 | [diff] [blame] | 53 | pwrdm_set_logic_retst(pwrst->pwrdm, PWRDM_POWER_OFF); |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 54 | } |
| 55 | |
| 56 | /* |
| 57 | * For MPUSS to hit power domain retention(CSWR or OSWR), |
| 58 | * CPU0 and CPU1 power domains need to be in OFF or DORMANT state, |
| 59 | * since CPU power domain CSWR is not supported by hardware |
| 60 | * Only master CPU follows suspend path. All other CPUs follow |
| 61 | * CPU hotplug path in system wide suspend. On OMAP4, CPU power |
| 62 | * domain CSWR is not supported by hardware. |
| 63 | * More details can be found in OMAP4430 TRM section 4.3.4.2. |
| 64 | */ |
| 65 | omap4_enter_lowpower(cpu_id, PWRDM_POWER_OFF); |
| 66 | |
| 67 | /* Restore next powerdomain state */ |
| 68 | list_for_each_entry(pwrst, &pwrst_list, node) { |
| 69 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); |
| 70 | if (state > pwrst->next_state) { |
| 71 | pr_info("Powerdomain (%s) didn't enter " |
| 72 | "target state %d\n", |
| 73 | pwrst->pwrdm->name, pwrst->next_state); |
| 74 | ret = -1; |
| 75 | } |
| 76 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); |
Santosh Shilimkar | 3ba2a73 | 2011-06-06 14:33:29 +0530 | [diff] [blame] | 77 | pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->saved_logic_state); |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 78 | } |
| 79 | if (ret) |
| 80 | pr_crit("Could not enter target state in pm_suspend\n"); |
| 81 | else |
| 82 | pr_info("Successfully put all powerdomains to target state\n"); |
| 83 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | static int omap4_pm_enter(suspend_state_t suspend_state) |
| 88 | { |
| 89 | int ret = 0; |
| 90 | |
| 91 | switch (suspend_state) { |
| 92 | case PM_SUSPEND_STANDBY: |
| 93 | case PM_SUSPEND_MEM: |
| 94 | ret = omap4_pm_suspend(); |
| 95 | break; |
| 96 | default: |
| 97 | ret = -EINVAL; |
| 98 | } |
| 99 | |
| 100 | return ret; |
| 101 | } |
| 102 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 103 | static int omap4_pm_begin(suspend_state_t state) |
| 104 | { |
Jean Pihet | c166381 | 2010-12-09 18:39:58 +0100 | [diff] [blame] | 105 | disable_hlt(); |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | static void omap4_pm_end(void) |
| 110 | { |
Jean Pihet | c166381 | 2010-12-09 18:39:58 +0100 | [diff] [blame] | 111 | enable_hlt(); |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 112 | return; |
| 113 | } |
| 114 | |
Lionel Debroux | 2f55ac0 | 2010-11-16 14:14:02 +0100 | [diff] [blame] | 115 | static const struct platform_suspend_ops omap_pm_ops = { |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 116 | .begin = omap4_pm_begin, |
| 117 | .end = omap4_pm_end, |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 118 | .enter = omap4_pm_enter, |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 119 | .valid = suspend_valid_only_mem, |
| 120 | }; |
| 121 | #endif /* CONFIG_SUSPEND */ |
| 122 | |
| 123 | static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) |
| 124 | { |
| 125 | struct power_state *pwrst; |
| 126 | |
| 127 | if (!pwrdm->pwrsts) |
| 128 | return 0; |
| 129 | |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 130 | /* |
| 131 | * Skip CPU0 and CPU1 power domains. CPU1 is programmed |
| 132 | * through hotplug path and CPU0 explicitly programmed |
| 133 | * further down in the code path |
| 134 | */ |
| 135 | if (!strncmp(pwrdm->name, "cpu", 3)) |
| 136 | return 0; |
| 137 | |
| 138 | /* |
| 139 | * FIXME: Remove this check when core retention is supported |
| 140 | * Only MPUSS power domain is added in the list. |
| 141 | */ |
| 142 | if (strcmp(pwrdm->name, "mpu_pwrdm")) |
| 143 | return 0; |
| 144 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 145 | pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC); |
| 146 | if (!pwrst) |
| 147 | return -ENOMEM; |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 148 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 149 | pwrst->pwrdm = pwrdm; |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 150 | pwrst->next_state = PWRDM_POWER_RET; |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 151 | list_add(&pwrst->node, &pwrst_list); |
| 152 | |
Santosh Shilimkar | e44f9a7 | 2010-06-16 22:19:49 +0530 | [diff] [blame] | 153 | return omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state); |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 154 | } |
| 155 | |
| 156 | /** |
Santosh Shilimkar | 72826b9 | 2011-07-18 12:25:10 +0530 | [diff] [blame] | 157 | * omap_default_idle - OMAP4 default ilde routine.' |
| 158 | * |
| 159 | * Implements OMAP4 memory, IO ordering requirements which can't be addressed |
Nicolas Pitre | ae94091 | 2011-12-19 03:03:58 -0500 | [diff] [blame] | 160 | * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and |
Santosh Shilimkar | 72826b9 | 2011-07-18 12:25:10 +0530 | [diff] [blame] | 161 | * by secondary CPU with CONFIG_CPUIDLE. |
| 162 | */ |
| 163 | static void omap_default_idle(void) |
| 164 | { |
Santosh Shilimkar | 72826b9 | 2011-07-18 12:25:10 +0530 | [diff] [blame] | 165 | local_fiq_disable(); |
| 166 | |
| 167 | omap_do_wfi(); |
| 168 | |
| 169 | local_fiq_enable(); |
Santosh Shilimkar | 72826b9 | 2011-07-18 12:25:10 +0530 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | /** |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 173 | * omap4_pm_init - Init routine for OMAP4 PM |
| 174 | * |
| 175 | * Initializes all powerdomain and clockdomain target states |
| 176 | * and all PRCM settings. |
| 177 | */ |
| 178 | static int __init omap4_pm_init(void) |
| 179 | { |
| 180 | int ret; |
Santosh Shilimkar | 12f2782 | 2011-03-08 18:24:30 +0530 | [diff] [blame] | 181 | struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm; |
| 182 | struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm; |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 183 | |
| 184 | if (!cpu_is_omap44xx()) |
| 185 | return -ENODEV; |
| 186 | |
Santosh Shilimkar | 361b02f | 2011-03-11 16:13:09 +0530 | [diff] [blame] | 187 | if (omap_rev() == OMAP4430_REV_ES1_0) { |
| 188 | WARN(1, "Power Management not supported on OMAP4430 ES1.0\n"); |
| 189 | return -ENODEV; |
| 190 | } |
| 191 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 192 | pr_err("Power Management for TI OMAP4.\n"); |
| 193 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 194 | ret = pwrdm_for_each(pwrdms_setup, NULL); |
| 195 | if (ret) { |
| 196 | pr_err("Failed to setup powerdomains\n"); |
| 197 | goto err2; |
| 198 | } |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 199 | |
Santosh Shilimkar | 12f2782 | 2011-03-08 18:24:30 +0530 | [diff] [blame] | 200 | /* |
| 201 | * The dynamic dependency between MPUSS -> MEMIF and |
| 202 | * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as |
| 203 | * expected. The hardware recommendation is to enable static |
| 204 | * dependencies for these to avoid system lock ups or random crashes. |
| 205 | */ |
| 206 | mpuss_clkdm = clkdm_lookup("mpuss_clkdm"); |
| 207 | emif_clkdm = clkdm_lookup("l3_emif_clkdm"); |
| 208 | l3_1_clkdm = clkdm_lookup("l3_1_clkdm"); |
| 209 | l3_2_clkdm = clkdm_lookup("l3_2_clkdm"); |
| 210 | l4_per_clkdm = clkdm_lookup("l4_per_clkdm"); |
| 211 | ducati_clkdm = clkdm_lookup("ducati_clkdm"); |
| 212 | if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || |
| 213 | (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm)) |
| 214 | goto err2; |
| 215 | |
| 216 | ret = clkdm_add_wkdep(mpuss_clkdm, emif_clkdm); |
| 217 | ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm); |
| 218 | ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm); |
| 219 | ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm); |
| 220 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); |
| 221 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); |
| 222 | if (ret) { |
| 223 | pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 " |
| 224 | "wakeup dependency\n"); |
| 225 | goto err2; |
| 226 | } |
| 227 | |
Santosh Shilimkar | b2b9762 | 2010-06-16 22:19:48 +0530 | [diff] [blame] | 228 | ret = omap4_mpuss_init(); |
| 229 | if (ret) { |
| 230 | pr_err("Failed to initialise OMAP4 MPUSS\n"); |
| 231 | goto err2; |
| 232 | } |
| 233 | |
Paul Walmsley | 92206fd | 2012-02-02 02:38:50 -0700 | [diff] [blame] | 234 | (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); |
Santosh Shilimkar | 3c50729 | 2011-01-05 22:03:17 +0530 | [diff] [blame] | 235 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 236 | #ifdef CONFIG_SUSPEND |
| 237 | suspend_set_ops(&omap_pm_ops); |
| 238 | #endif /* CONFIG_SUSPEND */ |
| 239 | |
Nicolas Pitre | ae94091 | 2011-12-19 03:03:58 -0500 | [diff] [blame] | 240 | /* Overwrite the default cpu_do_idle() */ |
Nicolas Pitre | 0bcd24b | 2012-01-04 16:27:48 -0500 | [diff] [blame] | 241 | arm_pm_idle = omap_default_idle; |
Santosh Shilimkar | 72826b9 | 2011-07-18 12:25:10 +0530 | [diff] [blame] | 242 | |
Santosh Shilimkar | 9827266 | 2011-08-16 17:31:40 +0530 | [diff] [blame] | 243 | omap4_idle_init(); |
| 244 | |
Rajendra Nayak | 5643aeb | 2010-08-02 13:18:18 +0300 | [diff] [blame] | 245 | err2: |
| 246 | return ret; |
| 247 | } |
| 248 | late_initcall(omap4_pm_init); |