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gerrit-public.fairphone.software / kernel / msm-4.19 / 161c51ccb7a6faf45ffe09aa5cf1ad85ccdad503 / . / arch / m68k / coldfire / m523x.c
blob: f7a0fcc5618c3fe86bb64c4b5850064227d6fe60 [file] [log] [blame]
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]1/***************************************************************************/
2
3/*
Greg Ungererece9ae62014-08-19 11:55:24 +1000[diff] [blame]4 * m523x.c -- platform support for ColdFire 523x based boards
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]5 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300[diff] [blame]6 * Sub-architcture dependent initialization code for the Freescale
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]7 * 523x CPUs.
8 *
9 * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]15#include <linux/kernel.h>
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]16#include <linux/param.h>
17#include <linux/init.h>
Greg Ungerer4b61a352008-02-01 17:34:15 +1000[diff] [blame]18#include <linux/io.h>
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]19#include <asm/machdep.h>
20#include <asm/coldfire.h>
21#include <asm/mcfsim.h>
Greg Ungerera0f8f8c2012-07-13 15:57:38 +1000[diff] [blame]22#include <asm/mcfclk.h>
23
24/***************************************************************************/
25
26DEFINE_CLK(pll, "pll.0", MCF_CLK);
27DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
28DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
29DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
30DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
31DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
32DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
33DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
34DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
Steven King74859522014-05-14 10:06:29 -0700[diff] [blame]35DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
Greg Ungerera0f8f8c2012-07-13 15:57:38 +1000[diff] [blame]36DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
Steven King2d24b532014-06-30 09:53:19 -0700[diff] [blame]37DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
Greg Ungerera0f8f8c2012-07-13 15:57:38 +1000[diff] [blame]38
39struct clk *mcf_clks[] = {
40 &clk_pll,
41 &clk_sys,
42 &clk_mcfpit0,
43 &clk_mcfpit1,
44 &clk_mcfpit2,
45 &clk_mcfpit3,
46 &clk_mcfuart0,
47 &clk_mcfuart1,
48 &clk_mcfuart2,
Steven King74859522014-05-14 10:06:29 -0700[diff] [blame]49 &clk_mcfqspi0,
Greg Ungerera0f8f8c2012-07-13 15:57:38 +1000[diff] [blame]50 &clk_fec0,
Steven King2d24b532014-06-30 09:53:19 -0700[diff] [blame]51 &clk_mcfi2c0,
Greg Ungerera0f8f8c2012-07-13 15:57:38 +1000[diff] [blame]52 NULL
53};
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]54
55/***************************************************************************/
56
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]57static void __init m523x_qspi_init(void)
58{
Steven King151d14f2014-05-14 10:07:55 -0700[diff] [blame]59#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]60 u16 par;
61
62 /* setup QSPS pins for QSPI with gpio CS control */
63 writeb(0x1f, MCFGPIO_PAR_QSPI);
64 /* and CS2 & CS3 as gpio */
65 par = readw(MCFGPIO_PAR_TIMER);
66 par &= 0x3f3f;
67 writew(par, MCFGPIO_PAR_TIMER);
Steven King83ca6002012-05-06 12:22:53 -0700[diff] [blame]68#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
Steven King151d14f2014-05-14 10:07:55 -0700[diff] [blame]69}
Greg Ungerer4b61a352008-02-01 17:34:15 +1000[diff] [blame]70
71/***************************************************************************/
72
Steven King2d24b532014-06-30 09:53:19 -0700[diff] [blame]73static void __init m523x_i2c_init(void)
74{
75#if IS_ENABLED(CONFIG_I2C_IMX)
76 u8 par;
77
78 /* setup Port AS Pin Assignment Register for I2C */
79 /* set PASPA0 to SCL and PASPA1 to SDA */
80 par = readb(MCFGPIO_PAR_FECI2C);
81 par |= 0x0f;
82 writeb(par, MCFGPIO_PAR_FECI2C);
83#endif /* IS_ENABLED(CONFIG_I2C_IMX) */
84}
85
86/***************************************************************************/
87
Greg Ungerer14c16db2009-08-12 16:14:43 +1000[diff] [blame]88static void __init m523x_fec_init(void)
89{
Greg Ungerer14c16db2009-08-12 16:14:43 +1000[diff] [blame]90 /* Set multi-function pins to ethernet use */
Greg Ungerer98d96962012-09-18 12:14:18 +1000[diff] [blame]91 writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
Greg Ungerer14c16db2009-08-12 16:14:43 +1000[diff] [blame]92}
93
94/***************************************************************************/
95
Greg Ungerer4b61a352008-02-01 17:34:15 +1000[diff] [blame]96void __init config_BSP(char *commandp, int size)
Greg Ungererb5aaf3f2005-09-02 10:42:52 +1000[diff] [blame]97{
Greg Ungerer35aefb22012-01-23 15:34:58 +1000[diff] [blame]98 mach_sched_init = hw_timer_init;
Greg Ungerer2ba168a2011-12-24 13:00:02 +1000[diff] [blame]99 m523x_fec_init();
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]100 m523x_qspi_init();
Steven King2d24b532014-06-30 09:53:19 -0700[diff] [blame]101 m523x_i2c_init();
Greg Ungerer4b61a352008-02-01 17:34:15 +1000[diff] [blame]102}
103
Greg Ungerer4b61a352008-02-01 17:34:15 +1000[diff] [blame]104/***************************************************************************/