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Fabio Estevamffebc8c2016-07-12 11:19:06 -03001/*
2 * Copyright (C) 2016 NXP Semiconductors.
3 * Author: Fabio Estevam <fabio.estevam@nxp.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45
46#include <dt-bindings/input/input.h>
47#include "imx7s.dtsi"
48
49/ {
50 model = "Warp i.MX7 Board";
51 compatible = "warp,imx7s-warp", "fsl,imx7s";
52
53 memory {
54 reg = <0x80000000 0x20000000>;
55 };
56};
57
58&cpu0 {
59 arm-supply = <&sw1a_reg>;
60};
61
62&i2c1 {
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_i2c1>;
65 status = "okay";
66
67 pmic: pfuze3000@08 {
68 compatible = "fsl,pfuze3000";
69 reg = <0x08>;
70
71 regulators {
72 sw1a_reg: sw1a {
73 regulator-min-microvolt = <700000>;
74 regulator-max-microvolt = <1475000>;
75 regulator-boot-on;
76 regulator-always-on;
77 regulator-ramp-delay = <6250>;
78 };
79
80 /* use sw1c_reg to align with pfuze100/pfuze200 */
81 sw1c_reg: sw1b {
82 regulator-min-microvolt = <700000>;
83 regulator-max-microvolt = <1475000>;
84 regulator-boot-on;
85 regulator-always-on;
86 regulator-ramp-delay = <6250>;
87 };
88
89 sw2_reg: sw2 {
90 regulator-min-microvolt = <1500000>;
91 regulator-max-microvolt = <1850000>;
92 regulator-boot-on;
93 regulator-always-on;
94 };
95
96 sw3a_reg: sw3 {
97 regulator-min-microvolt = <900000>;
98 regulator-max-microvolt = <1650000>;
99 regulator-boot-on;
100 regulator-always-on;
101 };
102
103 swbst_reg: swbst {
104 regulator-min-microvolt = <5000000>;
105 regulator-max-microvolt = <5150000>;
106 };
107
108 snvs_reg: vsnvs {
109 regulator-min-microvolt = <1000000>;
110 regulator-max-microvolt = <3000000>;
111 regulator-boot-on;
112 regulator-always-on;
113 };
114
115 vref_reg: vrefddr {
116 regulator-boot-on;
117 regulator-always-on;
118 };
119
120 vgen1_reg: vldo1 {
121 regulator-min-microvolt = <1800000>;
122 regulator-max-microvolt = <3300000>;
123 regulator-always-on;
124 };
125
126 vgen2_reg: vldo2 {
127 regulator-min-microvolt = <800000>;
128 regulator-max-microvolt = <1550000>;
129 };
130
131 vgen3_reg: vccsd {
132 regulator-min-microvolt = <2850000>;
133 regulator-max-microvolt = <3300000>;
134 regulator-always-on;
135 };
136
137 vgen4_reg: v33 {
138 regulator-min-microvolt = <2850000>;
139 regulator-max-microvolt = <3300000>;
140 regulator-always-on;
141 };
142
143 vgen5_reg: vldo3 {
144 regulator-min-microvolt = <1800000>;
145 regulator-max-microvolt = <3300000>;
146 regulator-always-on;
147 };
148
149 vgen6_reg: vldo4 {
150 regulator-min-microvolt = <1800000>;
151 regulator-max-microvolt = <3300000>;
152 regulator-always-on;
153 };
154 };
155 };
156};
157
Breno Lima171befe2016-08-09 15:40:45 -0300158&i2c4 {
159 clock-frequency = <100000>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_i2c4>;
162 status = "okay";
163
164 mpl3115@60 {
165 compatible = "fsl,mpl3115";
166 reg = <0x60>;
167 };
168};
169
Fabio Estevamffebc8c2016-07-12 11:19:06 -0300170&uart1 {
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_uart1>;
173 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
174 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
175 status = "okay";
176};
177
178&usbotg1 {
179 dr_mode = "peripheral";
180 status = "okay";
181};
182
183&usdhc3 {
184 pinctrl-names = "default", "state_100mhz", "state_200mhz";
185 pinctrl-0 = <&pinctrl_usdhc3>;
186 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
187 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
188 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
189 assigned-clock-rates = <400000000>;
190 bus-width = <8>;
191 fsl,tuning-step = <2>;
192 non-removable;
193 status = "okay";
194};
195
196&iomuxc {
197 pinctrl_i2c1: i2c1grp {
198 fsl,pins = <
199 MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
200 MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
201 >;
202 };
203
Breno Lima171befe2016-08-09 15:40:45 -0300204 pinctrl_i2c4: i2c4grp {
205 fsl,pins = <
206 MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f
207 MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f
208 >;
209 };
210
Fabio Estevamffebc8c2016-07-12 11:19:06 -0300211 pinctrl_uart1: uart1grp {
212 fsl,pins = <
213 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
214 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
215 >;
216 };
217
218 pinctrl_usdhc3: usdhc3grp {
219 fsl,pins = <
220 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
221 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
222 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
223 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
224 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
225 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
226 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
227 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
228 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
229 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
230 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x19
231 >;
232 };
233
234 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
235 fsl,pins = <
236 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
237 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
238 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
239 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
240 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
241 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
242 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
243 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
244 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
245 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
246 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x1a
247 >;
248 };
249
250 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
251 fsl,pins = <
252 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
253 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
254 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
255 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
256 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
257 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
258 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
259 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
260 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
261 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
262 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x1b
263 >;
264 };
265};