| Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Device Tree Source for OMAP3 SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | /include/ "skeleton.dtsi" |
| 12 | |
| 13 | / { |
| 14 | compatible = "ti,omap3430", "ti,omap3"; |
| 15 | |
| 16 | /* |
| 17 | * The soc node represents the soc top level view. It is uses for IPs |
| 18 | * that are not memory mapped in the MPU view or for the MPU itself. |
| 19 | */ |
| 20 | soc { |
| 21 | compatible = "ti,omap-infra"; |
| 22 | }; |
| 23 | |
| 24 | /* |
| 25 | * XXX: Use a flat representation of the OMAP3 interconnect. |
| 26 | * The real OMAP interconnect network is quite complex. |
| 27 | * Since that will not bring real advantage to represent that in DT for |
| 28 | * the moment, just use a fake OCP bus entry to represent the whole bus |
| 29 | * hierarchy. |
| 30 | */ |
| 31 | ocp { |
| 32 | compatible = "simple-bus"; |
| 33 | #address-cells = <1>; |
| 34 | #size-cells = <1>; |
| 35 | ranges; |
| 36 | ti,hwmods = "l3_main"; |
| 37 | |
| 38 | intc: interrupt-controller@1 { |
| 39 | compatible = "ti,omap3-intc"; |
| 40 | interrupt-controller; |
| 41 | #interrupt-cells = <1>; |
| 42 | }; |
| 43 | }; |
| 44 | }; |