Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * forcedeth: Ethernet driver for NVIDIA nForce media access controllers. |
| 3 | * |
| 4 | * Note: This driver is a cleanroom reimplementation based on reverse |
| 5 | * engineered documentation written by Carl-Daniel Hailfinger |
Ayaz Abdulla | 87046e5 | 2006-12-19 23:33:32 -0500 | [diff] [blame] | 6 | * and Andrew de Quincey. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
| 8 | * NVIDIA, nForce and other NVIDIA marks are trademarks or registered |
| 9 | * trademarks of NVIDIA Corporation in the United States and other |
| 10 | * countries. |
| 11 | * |
Manfred Spraul | 1836098 | 2005-12-24 14:19:24 +0100 | [diff] [blame] | 12 | * Copyright (C) 2003,4,5 Manfred Spraul |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | * Copyright (C) 2004 Andrew de Quincey (wol support) |
| 14 | * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane |
| 15 | * IRQ rate fixes, bigendian fixes, cleanups, verification) |
Ayaz Abdulla | f648d12 | 2008-01-13 16:02:57 -0500 | [diff] [blame] | 16 | * Copyright (c) 2004,2005,2006,2007,2008 NVIDIA Corporation |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | * |
| 18 | * This program is free software; you can redistribute it and/or modify |
| 19 | * it under the terms of the GNU General Public License as published by |
| 20 | * the Free Software Foundation; either version 2 of the License, or |
| 21 | * (at your option) any later version. |
| 22 | * |
| 23 | * This program is distributed in the hope that it will be useful, |
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 26 | * GNU General Public License for more details. |
| 27 | * |
| 28 | * You should have received a copy of the GNU General Public License |
| 29 | * along with this program; if not, write to the Free Software |
| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 31 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | * Known bugs: |
| 33 | * We suspect that on some hardware no TX done interrupts are generated. |
| 34 | * This means recovery from netif_stop_queue only happens if the hw timer |
| 35 | * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT) |
| 36 | * and the timer is active in the IRQMask, or if a rx packet arrives by chance. |
| 37 | * If your hardware reliably generates tx done interrupts, then you can remove |
| 38 | * DEV_NEED_TIMERIRQ from the driver_data flags. |
| 39 | * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few |
| 40 | * superfluous timer interrupts from the nic. |
| 41 | */ |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 42 | #define FORCEDETH_VERSION "0.61" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #define DRV_NAME "forcedeth" |
| 44 | |
| 45 | #include <linux/module.h> |
| 46 | #include <linux/types.h> |
| 47 | #include <linux/pci.h> |
| 48 | #include <linux/interrupt.h> |
| 49 | #include <linux/netdevice.h> |
| 50 | #include <linux/etherdevice.h> |
| 51 | #include <linux/delay.h> |
| 52 | #include <linux/spinlock.h> |
| 53 | #include <linux/ethtool.h> |
| 54 | #include <linux/timer.h> |
| 55 | #include <linux/skbuff.h> |
| 56 | #include <linux/mii.h> |
| 57 | #include <linux/random.h> |
| 58 | #include <linux/init.h> |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 59 | #include <linux/if_vlan.h> |
Matthias Gehre | 910638a | 2006-03-28 01:56:48 -0800 | [diff] [blame] | 60 | #include <linux/dma-mapping.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | |
| 62 | #include <asm/irq.h> |
| 63 | #include <asm/io.h> |
| 64 | #include <asm/uaccess.h> |
| 65 | #include <asm/system.h> |
| 66 | |
| 67 | #if 0 |
| 68 | #define dprintk printk |
| 69 | #else |
| 70 | #define dprintk(x...) do { } while (0) |
| 71 | #endif |
| 72 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 73 | #define TX_WORK_PER_LOOP 64 |
| 74 | #define RX_WORK_PER_LOOP 64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | |
| 76 | /* |
| 77 | * Hardware access: |
| 78 | */ |
| 79 | |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 80 | #define DEV_NEED_TIMERIRQ 0x00001 /* set the timer irq flag in the irq mask */ |
| 81 | #define DEV_NEED_LINKTIMER 0x00002 /* poll link settings. Relies on the timer irq */ |
| 82 | #define DEV_HAS_LARGEDESC 0x00004 /* device supports jumbo frames and needs packet format 2 */ |
| 83 | #define DEV_HAS_HIGH_DMA 0x00008 /* device supports 64bit dma */ |
| 84 | #define DEV_HAS_CHECKSUM 0x00010 /* device supports tx and rx checksum offloads */ |
| 85 | #define DEV_HAS_VLAN 0x00020 /* device supports vlan tagging and striping */ |
| 86 | #define DEV_HAS_MSI 0x00040 /* device supports MSI */ |
| 87 | #define DEV_HAS_MSI_X 0x00080 /* device supports MSI-X */ |
| 88 | #define DEV_HAS_POWER_CNTRL 0x00100 /* device supports power savings */ |
| 89 | #define DEV_HAS_STATISTICS_V1 0x00200 /* device supports hw statistics version 1 */ |
| 90 | #define DEV_HAS_STATISTICS_V2 0x00400 /* device supports hw statistics version 2 */ |
| 91 | #define DEV_HAS_TEST_EXTENDED 0x00800 /* device supports extended diagnostic test */ |
| 92 | #define DEV_HAS_MGMT_UNIT 0x01000 /* device supports management unit */ |
| 93 | #define DEV_HAS_CORRECT_MACADDR 0x02000 /* device supports correct mac address order */ |
| 94 | #define DEV_HAS_COLLISION_FIX 0x04000 /* device supports tx collision fix */ |
| 95 | #define DEV_HAS_PAUSEFRAME_TX_V1 0x08000 /* device supports tx pause frames version 1 */ |
| 96 | #define DEV_HAS_PAUSEFRAME_TX_V2 0x10000 /* device supports tx pause frames version 2 */ |
| 97 | #define DEV_HAS_PAUSEFRAME_TX_V3 0x20000 /* device supports tx pause frames version 3 */ |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 98 | #define DEV_NEED_TX_LIMIT 0x40000 /* device needs to limit tx */ |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 99 | #define DEV_HAS_GEAR_MODE 0x80000 /* device supports gear mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | |
| 101 | enum { |
| 102 | NvRegIrqStatus = 0x000, |
| 103 | #define NVREG_IRQSTAT_MIIEVENT 0x040 |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 104 | #define NVREG_IRQSTAT_MASK 0x81ff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | NvRegIrqMask = 0x004, |
| 106 | #define NVREG_IRQ_RX_ERROR 0x0001 |
| 107 | #define NVREG_IRQ_RX 0x0002 |
| 108 | #define NVREG_IRQ_RX_NOBUF 0x0004 |
| 109 | #define NVREG_IRQ_TX_ERR 0x0008 |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 110 | #define NVREG_IRQ_TX_OK 0x0010 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | #define NVREG_IRQ_TIMER 0x0020 |
| 112 | #define NVREG_IRQ_LINK 0x0040 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 113 | #define NVREG_IRQ_RX_FORCED 0x0080 |
| 114 | #define NVREG_IRQ_TX_FORCED 0x0100 |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 115 | #define NVREG_IRQ_RECOVER_ERROR 0x8000 |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 116 | #define NVREG_IRQMASK_THROUGHPUT 0x00df |
Ayaz Abdulla | 096a458 | 2007-05-21 20:23:11 -0400 | [diff] [blame] | 117 | #define NVREG_IRQMASK_CPU 0x0060 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 118 | #define NVREG_IRQ_TX_ALL (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED) |
| 119 | #define NVREG_IRQ_RX_ALL (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED) |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 120 | #define NVREG_IRQ_OTHER (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 121 | |
| 122 | #define NVREG_IRQ_UNKNOWN (~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \ |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 123 | NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RX_FORCED| \ |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 124 | NVREG_IRQ_TX_FORCED|NVREG_IRQ_RECOVER_ERROR)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | |
| 126 | NvRegUnknownSetupReg6 = 0x008, |
| 127 | #define NVREG_UNKSETUP6_VAL 3 |
| 128 | |
| 129 | /* |
| 130 | * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic |
| 131 | * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms |
| 132 | */ |
| 133 | NvRegPollingInterval = 0x00c, |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 134 | #define NVREG_POLL_DEFAULT_THROUGHPUT 970 /* backup tx cleanup if loop max reached */ |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 135 | #define NVREG_POLL_DEFAULT_CPU 13 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 136 | NvRegMSIMap0 = 0x020, |
| 137 | NvRegMSIMap1 = 0x024, |
| 138 | NvRegMSIIrqMask = 0x030, |
| 139 | #define NVREG_MSI_VECTOR_0_ENABLED 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | NvRegMisc1 = 0x080, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 141 | #define NVREG_MISC1_PAUSE_TX 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | #define NVREG_MISC1_HD 0x02 |
| 143 | #define NVREG_MISC1_FORCE 0x3b0f3c |
| 144 | |
Ayaz Abdulla | 0a62677 | 2008-01-13 16:02:42 -0500 | [diff] [blame] | 145 | NvRegMacReset = 0x34, |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 146 | #define NVREG_MAC_RESET_ASSERT 0x0F3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | NvRegTransmitterControl = 0x084, |
| 148 | #define NVREG_XMITCTL_START 0x01 |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 149 | #define NVREG_XMITCTL_MGMT_ST 0x40000000 |
| 150 | #define NVREG_XMITCTL_SYNC_MASK 0x000f0000 |
| 151 | #define NVREG_XMITCTL_SYNC_NOT_READY 0x0 |
| 152 | #define NVREG_XMITCTL_SYNC_PHY_INIT 0x00040000 |
| 153 | #define NVREG_XMITCTL_MGMT_SEMA_MASK 0x00000f00 |
| 154 | #define NVREG_XMITCTL_MGMT_SEMA_FREE 0x0 |
| 155 | #define NVREG_XMITCTL_HOST_SEMA_MASK 0x0000f000 |
| 156 | #define NVREG_XMITCTL_HOST_SEMA_ACQ 0x0000f000 |
| 157 | #define NVREG_XMITCTL_HOST_LOADED 0x00004000 |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 158 | #define NVREG_XMITCTL_TX_PATH_EN 0x01000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | NvRegTransmitterStatus = 0x088, |
| 160 | #define NVREG_XMITSTAT_BUSY 0x01 |
| 161 | |
| 162 | NvRegPacketFilterFlags = 0x8c, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 163 | #define NVREG_PFF_PAUSE_RX 0x08 |
| 164 | #define NVREG_PFF_ALWAYS 0x7F0000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | #define NVREG_PFF_PROMISC 0x80 |
| 166 | #define NVREG_PFF_MYADDR 0x20 |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 167 | #define NVREG_PFF_LOOPBACK 0x10 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | |
| 169 | NvRegOffloadConfig = 0x90, |
| 170 | #define NVREG_OFFLOAD_HOMEPHY 0x601 |
| 171 | #define NVREG_OFFLOAD_NORMAL RX_NIC_BUFSIZE |
| 172 | NvRegReceiverControl = 0x094, |
| 173 | #define NVREG_RCVCTL_START 0x01 |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 174 | #define NVREG_RCVCTL_RX_PATH_EN 0x01000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | NvRegReceiverStatus = 0x98, |
| 176 | #define NVREG_RCVSTAT_BUSY 0x01 |
| 177 | |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 178 | NvRegSlotTime = 0x9c, |
| 179 | #define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000 |
| 180 | #define NVREG_SLOTTIME_10_100_FULL 0x00007f00 |
| 181 | #define NVREG_SLOTTIME_1000_FULL 0x0003ff00 |
| 182 | #define NVREG_SLOTTIME_HALF 0x0000ff00 |
| 183 | #define NVREG_SLOTTIME_DEFAULT 0x00007f00 |
| 184 | #define NVREG_SLOTTIME_MASK 0x000000ff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 186 | NvRegTxDeferral = 0xA0, |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 187 | #define NVREG_TX_DEFERRAL_DEFAULT 0x15050f |
| 188 | #define NVREG_TX_DEFERRAL_RGMII_10_100 0x16070f |
| 189 | #define NVREG_TX_DEFERRAL_RGMII_1000 0x14050f |
| 190 | #define NVREG_TX_DEFERRAL_RGMII_STRETCH_10 0x16190f |
| 191 | #define NVREG_TX_DEFERRAL_RGMII_STRETCH_100 0x16300f |
| 192 | #define NVREG_TX_DEFERRAL_MII_STRETCH 0x152000 |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 193 | NvRegRxDeferral = 0xA4, |
| 194 | #define NVREG_RX_DEFERRAL_DEFAULT 0x16 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | NvRegMacAddrA = 0xA8, |
| 196 | NvRegMacAddrB = 0xAC, |
| 197 | NvRegMulticastAddrA = 0xB0, |
| 198 | #define NVREG_MCASTADDRA_FORCE 0x01 |
| 199 | NvRegMulticastAddrB = 0xB4, |
| 200 | NvRegMulticastMaskA = 0xB8, |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 201 | #define NVREG_MCASTMASKA_NONE 0xffffffff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | NvRegMulticastMaskB = 0xBC, |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 203 | #define NVREG_MCASTMASKB_NONE 0xffff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | |
| 205 | NvRegPhyInterface = 0xC0, |
| 206 | #define PHY_RGMII 0x10000000 |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 207 | NvRegBackOffControl = 0xC4, |
| 208 | #define NVREG_BKOFFCTRL_DEFAULT 0x70000000 |
| 209 | #define NVREG_BKOFFCTRL_SEED_MASK 0x000003ff |
| 210 | #define NVREG_BKOFFCTRL_SELECT 24 |
| 211 | #define NVREG_BKOFFCTRL_GEAR 12 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | |
| 213 | NvRegTxRingPhysAddr = 0x100, |
| 214 | NvRegRxRingPhysAddr = 0x104, |
| 215 | NvRegRingSizes = 0x108, |
| 216 | #define NVREG_RINGSZ_TXSHIFT 0 |
| 217 | #define NVREG_RINGSZ_RXSHIFT 16 |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 218 | NvRegTransmitPoll = 0x10c, |
| 219 | #define NVREG_TRANSMITPOLL_MAC_ADDR_REV 0x00008000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | NvRegLinkSpeed = 0x110, |
| 221 | #define NVREG_LINKSPEED_FORCE 0x10000 |
| 222 | #define NVREG_LINKSPEED_10 1000 |
| 223 | #define NVREG_LINKSPEED_100 100 |
| 224 | #define NVREG_LINKSPEED_1000 50 |
| 225 | #define NVREG_LINKSPEED_MASK (0xFFF) |
| 226 | NvRegUnknownSetupReg5 = 0x130, |
| 227 | #define NVREG_UNKSETUP5_BIT31 (1<<31) |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 228 | NvRegTxWatermark = 0x13c, |
| 229 | #define NVREG_TX_WM_DESC1_DEFAULT 0x0200010 |
| 230 | #define NVREG_TX_WM_DESC2_3_DEFAULT 0x1e08000 |
| 231 | #define NVREG_TX_WM_DESC2_3_1000 0xfe08000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | NvRegTxRxControl = 0x144, |
| 233 | #define NVREG_TXRXCTL_KICK 0x0001 |
| 234 | #define NVREG_TXRXCTL_BIT1 0x0002 |
| 235 | #define NVREG_TXRXCTL_BIT2 0x0004 |
| 236 | #define NVREG_TXRXCTL_IDLE 0x0008 |
| 237 | #define NVREG_TXRXCTL_RESET 0x0010 |
| 238 | #define NVREG_TXRXCTL_RXCHECK 0x0400 |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 239 | #define NVREG_TXRXCTL_DESC_1 0 |
Ayaz Abdulla | d2f7841 | 2007-01-09 13:30:02 -0500 | [diff] [blame] | 240 | #define NVREG_TXRXCTL_DESC_2 0x002100 |
| 241 | #define NVREG_TXRXCTL_DESC_3 0xc02200 |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 242 | #define NVREG_TXRXCTL_VLANSTRIP 0x00040 |
| 243 | #define NVREG_TXRXCTL_VLANINS 0x00080 |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 244 | NvRegTxRingPhysAddrHigh = 0x148, |
| 245 | NvRegRxRingPhysAddrHigh = 0x14C, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 246 | NvRegTxPauseFrame = 0x170, |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 247 | #define NVREG_TX_PAUSEFRAME_DISABLE 0x0fff0080 |
| 248 | #define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010 |
| 249 | #define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0 |
| 250 | #define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | NvRegMIIStatus = 0x180, |
| 252 | #define NVREG_MIISTAT_ERROR 0x0001 |
| 253 | #define NVREG_MIISTAT_LINKCHANGE 0x0008 |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 254 | #define NVREG_MIISTAT_MASK_RW 0x0007 |
| 255 | #define NVREG_MIISTAT_MASK_ALL 0x000f |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 256 | NvRegMIIMask = 0x184, |
| 257 | #define NVREG_MII_LINKCHANGE 0x0008 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | |
| 259 | NvRegAdapterControl = 0x188, |
| 260 | #define NVREG_ADAPTCTL_START 0x02 |
| 261 | #define NVREG_ADAPTCTL_LINKUP 0x04 |
| 262 | #define NVREG_ADAPTCTL_PHYVALID 0x40000 |
| 263 | #define NVREG_ADAPTCTL_RUNNING 0x100000 |
| 264 | #define NVREG_ADAPTCTL_PHYSHIFT 24 |
| 265 | NvRegMIISpeed = 0x18c, |
| 266 | #define NVREG_MIISPEED_BIT8 (1<<8) |
| 267 | #define NVREG_MIIDELAY 5 |
| 268 | NvRegMIIControl = 0x190, |
| 269 | #define NVREG_MIICTL_INUSE 0x08000 |
| 270 | #define NVREG_MIICTL_WRITE 0x00400 |
| 271 | #define NVREG_MIICTL_ADDRSHIFT 5 |
| 272 | NvRegMIIData = 0x194, |
| 273 | NvRegWakeUpFlags = 0x200, |
| 274 | #define NVREG_WAKEUPFLAGS_VAL 0x7770 |
| 275 | #define NVREG_WAKEUPFLAGS_BUSYSHIFT 24 |
| 276 | #define NVREG_WAKEUPFLAGS_ENABLESHIFT 16 |
| 277 | #define NVREG_WAKEUPFLAGS_D3SHIFT 12 |
| 278 | #define NVREG_WAKEUPFLAGS_D2SHIFT 8 |
| 279 | #define NVREG_WAKEUPFLAGS_D1SHIFT 4 |
| 280 | #define NVREG_WAKEUPFLAGS_D0SHIFT 0 |
| 281 | #define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT 0x01 |
| 282 | #define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT 0x02 |
| 283 | #define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE 0x04 |
| 284 | #define NVREG_WAKEUPFLAGS_ENABLE 0x1111 |
| 285 | |
| 286 | NvRegPatternCRC = 0x204, |
| 287 | NvRegPatternMask = 0x208, |
| 288 | NvRegPowerCap = 0x268, |
| 289 | #define NVREG_POWERCAP_D3SUPP (1<<30) |
| 290 | #define NVREG_POWERCAP_D2SUPP (1<<26) |
| 291 | #define NVREG_POWERCAP_D1SUPP (1<<25) |
| 292 | NvRegPowerState = 0x26c, |
| 293 | #define NVREG_POWERSTATE_POWEREDUP 0x8000 |
| 294 | #define NVREG_POWERSTATE_VALID 0x0100 |
| 295 | #define NVREG_POWERSTATE_MASK 0x0003 |
| 296 | #define NVREG_POWERSTATE_D0 0x0000 |
| 297 | #define NVREG_POWERSTATE_D1 0x0001 |
| 298 | #define NVREG_POWERSTATE_D2 0x0002 |
| 299 | #define NVREG_POWERSTATE_D3 0x0003 |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 300 | NvRegTxCnt = 0x280, |
| 301 | NvRegTxZeroReXmt = 0x284, |
| 302 | NvRegTxOneReXmt = 0x288, |
| 303 | NvRegTxManyReXmt = 0x28c, |
| 304 | NvRegTxLateCol = 0x290, |
| 305 | NvRegTxUnderflow = 0x294, |
| 306 | NvRegTxLossCarrier = 0x298, |
| 307 | NvRegTxExcessDef = 0x29c, |
| 308 | NvRegTxRetryErr = 0x2a0, |
| 309 | NvRegRxFrameErr = 0x2a4, |
| 310 | NvRegRxExtraByte = 0x2a8, |
| 311 | NvRegRxLateCol = 0x2ac, |
| 312 | NvRegRxRunt = 0x2b0, |
| 313 | NvRegRxFrameTooLong = 0x2b4, |
| 314 | NvRegRxOverflow = 0x2b8, |
| 315 | NvRegRxFCSErr = 0x2bc, |
| 316 | NvRegRxFrameAlignErr = 0x2c0, |
| 317 | NvRegRxLenErr = 0x2c4, |
| 318 | NvRegRxUnicast = 0x2c8, |
| 319 | NvRegRxMulticast = 0x2cc, |
| 320 | NvRegRxBroadcast = 0x2d0, |
| 321 | NvRegTxDef = 0x2d4, |
| 322 | NvRegTxFrame = 0x2d8, |
| 323 | NvRegRxCnt = 0x2dc, |
| 324 | NvRegTxPause = 0x2e0, |
| 325 | NvRegRxPause = 0x2e4, |
| 326 | NvRegRxDropFrame = 0x2e8, |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 327 | NvRegVlanControl = 0x300, |
| 328 | #define NVREG_VLANCONTROL_ENABLE 0x2000 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 329 | NvRegMSIXMap0 = 0x3e0, |
| 330 | NvRegMSIXMap1 = 0x3e4, |
| 331 | NvRegMSIXIrqStatus = 0x3f0, |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 332 | |
| 333 | NvRegPowerState2 = 0x600, |
| 334 | #define NVREG_POWERSTATE2_POWERUP_MASK 0x0F11 |
| 335 | #define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | }; |
| 337 | |
| 338 | /* Big endian: should work, but is untested */ |
| 339 | struct ring_desc { |
Stephen Hemminger | a8bed49 | 2006-07-27 18:50:09 -0700 | [diff] [blame] | 340 | __le32 buf; |
| 341 | __le32 flaglen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | }; |
| 343 | |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 344 | struct ring_desc_ex { |
Stephen Hemminger | a8bed49 | 2006-07-27 18:50:09 -0700 | [diff] [blame] | 345 | __le32 bufhigh; |
| 346 | __le32 buflow; |
| 347 | __le32 txvlan; |
| 348 | __le32 flaglen; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 349 | }; |
| 350 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 351 | union ring_type { |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 352 | struct ring_desc* orig; |
| 353 | struct ring_desc_ex* ex; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 354 | }; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 355 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | #define FLAG_MASK_V1 0xffff0000 |
| 357 | #define FLAG_MASK_V2 0xffffc000 |
| 358 | #define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1) |
| 359 | #define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2) |
| 360 | |
| 361 | #define NV_TX_LASTPACKET (1<<16) |
| 362 | #define NV_TX_RETRYERROR (1<<19) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 363 | #define NV_TX_RETRYCOUNT_MASK (0xF<<20) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 364 | #define NV_TX_FORCED_INTERRUPT (1<<24) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | #define NV_TX_DEFERRED (1<<26) |
| 366 | #define NV_TX_CARRIERLOST (1<<27) |
| 367 | #define NV_TX_LATECOLLISION (1<<28) |
| 368 | #define NV_TX_UNDERFLOW (1<<29) |
| 369 | #define NV_TX_ERROR (1<<30) |
| 370 | #define NV_TX_VALID (1<<31) |
| 371 | |
| 372 | #define NV_TX2_LASTPACKET (1<<29) |
| 373 | #define NV_TX2_RETRYERROR (1<<18) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 374 | #define NV_TX2_RETRYCOUNT_MASK (0xF<<19) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 375 | #define NV_TX2_FORCED_INTERRUPT (1<<30) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | #define NV_TX2_DEFERRED (1<<25) |
| 377 | #define NV_TX2_CARRIERLOST (1<<26) |
| 378 | #define NV_TX2_LATECOLLISION (1<<27) |
| 379 | #define NV_TX2_UNDERFLOW (1<<28) |
| 380 | /* error and valid are the same for both */ |
| 381 | #define NV_TX2_ERROR (1<<30) |
| 382 | #define NV_TX2_VALID (1<<31) |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 383 | #define NV_TX2_TSO (1<<28) |
| 384 | #define NV_TX2_TSO_SHIFT 14 |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 385 | #define NV_TX2_TSO_MAX_SHIFT 14 |
| 386 | #define NV_TX2_TSO_MAX_SIZE (1<<NV_TX2_TSO_MAX_SHIFT) |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 387 | #define NV_TX2_CHECKSUM_L3 (1<<27) |
| 388 | #define NV_TX2_CHECKSUM_L4 (1<<26) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 390 | #define NV_TX3_VLAN_TAG_PRESENT (1<<18) |
| 391 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 392 | #define NV_RX_DESCRIPTORVALID (1<<16) |
| 393 | #define NV_RX_MISSEDFRAME (1<<17) |
| 394 | #define NV_RX_SUBSTRACT1 (1<<18) |
| 395 | #define NV_RX_ERROR1 (1<<23) |
| 396 | #define NV_RX_ERROR2 (1<<24) |
| 397 | #define NV_RX_ERROR3 (1<<25) |
| 398 | #define NV_RX_ERROR4 (1<<26) |
| 399 | #define NV_RX_CRCERR (1<<27) |
| 400 | #define NV_RX_OVERFLOW (1<<28) |
| 401 | #define NV_RX_FRAMINGERR (1<<29) |
| 402 | #define NV_RX_ERROR (1<<30) |
| 403 | #define NV_RX_AVAIL (1<<31) |
| 404 | |
| 405 | #define NV_RX2_CHECKSUMMASK (0x1C000000) |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 406 | #define NV_RX2_CHECKSUM_IP (0x10000000) |
| 407 | #define NV_RX2_CHECKSUM_IP_TCP (0x14000000) |
| 408 | #define NV_RX2_CHECKSUM_IP_UDP (0x18000000) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | #define NV_RX2_DESCRIPTORVALID (1<<29) |
| 410 | #define NV_RX2_SUBSTRACT1 (1<<25) |
| 411 | #define NV_RX2_ERROR1 (1<<18) |
| 412 | #define NV_RX2_ERROR2 (1<<19) |
| 413 | #define NV_RX2_ERROR3 (1<<20) |
| 414 | #define NV_RX2_ERROR4 (1<<21) |
| 415 | #define NV_RX2_CRCERR (1<<22) |
| 416 | #define NV_RX2_OVERFLOW (1<<23) |
| 417 | #define NV_RX2_FRAMINGERR (1<<24) |
| 418 | /* error and avail are the same for both */ |
| 419 | #define NV_RX2_ERROR (1<<30) |
| 420 | #define NV_RX2_AVAIL (1<<31) |
| 421 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 422 | #define NV_RX3_VLAN_TAG_PRESENT (1<<16) |
| 423 | #define NV_RX3_VLAN_TAG_MASK (0x0000FFFF) |
| 424 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | /* Miscelaneous hardware related defines: */ |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 426 | #define NV_PCI_REGSZ_VER1 0x270 |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 427 | #define NV_PCI_REGSZ_VER2 0x2d4 |
| 428 | #define NV_PCI_REGSZ_VER3 0x604 |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 429 | #define NV_PCI_REGSZ_MAX 0x604 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 430 | |
| 431 | /* various timeout delays: all in usec */ |
| 432 | #define NV_TXRX_RESET_DELAY 4 |
| 433 | #define NV_TXSTOP_DELAY1 10 |
| 434 | #define NV_TXSTOP_DELAY1MAX 500000 |
| 435 | #define NV_TXSTOP_DELAY2 100 |
| 436 | #define NV_RXSTOP_DELAY1 10 |
| 437 | #define NV_RXSTOP_DELAY1MAX 500000 |
| 438 | #define NV_RXSTOP_DELAY2 100 |
| 439 | #define NV_SETUP5_DELAY 5 |
| 440 | #define NV_SETUP5_DELAYMAX 50000 |
| 441 | #define NV_POWERUP_DELAY 5 |
| 442 | #define NV_POWERUP_DELAYMAX 5000 |
| 443 | #define NV_MIIBUSY_DELAY 50 |
| 444 | #define NV_MIIPHY_DELAY 10 |
| 445 | #define NV_MIIPHY_DELAYMAX 10000 |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 446 | #define NV_MAC_RESET_DELAY 64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | |
| 448 | #define NV_WAKEUPPATTERNS 5 |
| 449 | #define NV_WAKEUPMASKENTRIES 4 |
| 450 | |
| 451 | /* General driver defaults */ |
| 452 | #define NV_WATCHDOG_TIMEO (5*HZ) |
| 453 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 454 | #define RX_RING_DEFAULT 128 |
| 455 | #define TX_RING_DEFAULT 256 |
| 456 | #define RX_RING_MIN 128 |
| 457 | #define TX_RING_MIN 64 |
| 458 | #define RING_MAX_DESC_VER_1 1024 |
| 459 | #define RING_MAX_DESC_VER_2_3 16384 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 460 | |
| 461 | /* rx/tx mac addr + type + vlan + align + slack*/ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 462 | #define NV_RX_HEADERS (64) |
| 463 | /* even more slack. */ |
| 464 | #define NV_RX_ALLOC_PAD (64) |
| 465 | |
| 466 | /* maximum mtu size */ |
| 467 | #define NV_PKTLIMIT_1 ETH_DATA_LEN /* hard limit not known */ |
| 468 | #define NV_PKTLIMIT_2 9100 /* Actual limit according to NVidia: 9202 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | |
| 470 | #define OOM_REFILL (1+HZ/20) |
| 471 | #define POLL_WAIT (1+HZ/100) |
| 472 | #define LINK_TIMEOUT (3*HZ) |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 473 | #define STATS_INTERVAL (10*HZ) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 475 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | * desc_ver values: |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 477 | * The nic supports three different descriptor types: |
| 478 | * - DESC_VER_1: Original |
| 479 | * - DESC_VER_2: support for jumbo frames. |
| 480 | * - DESC_VER_3: 64-bit format. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | */ |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 482 | #define DESC_VER_1 1 |
| 483 | #define DESC_VER_2 2 |
| 484 | #define DESC_VER_3 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | |
| 486 | /* PHY defines */ |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 487 | #define PHY_OUI_MARVELL 0x5043 |
| 488 | #define PHY_OUI_CICADA 0x03f1 |
| 489 | #define PHY_OUI_VITESSE 0x01c1 |
| 490 | #define PHY_OUI_REALTEK 0x0732 |
| 491 | #define PHY_OUI_REALTEK2 0x0020 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | #define PHYID1_OUI_MASK 0x03ff |
| 493 | #define PHYID1_OUI_SHFT 6 |
| 494 | #define PHYID2_OUI_MASK 0xfc00 |
| 495 | #define PHYID2_OUI_SHFT 10 |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 496 | #define PHYID2_MODEL_MASK 0x03f0 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 497 | #define PHY_MODEL_REALTEK_8211 0x0110 |
| 498 | #define PHY_REV_MASK 0x0001 |
| 499 | #define PHY_REV_REALTEK_8211B 0x0000 |
| 500 | #define PHY_REV_REALTEK_8211C 0x0001 |
| 501 | #define PHY_MODEL_REALTEK_8201 0x0200 |
| 502 | #define PHY_MODEL_MARVELL_E3016 0x0220 |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 503 | #define PHY_MARVELL_E3016_INITMASK 0x0300 |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 504 | #define PHY_CICADA_INIT1 0x0f000 |
| 505 | #define PHY_CICADA_INIT2 0x0e00 |
| 506 | #define PHY_CICADA_INIT3 0x01000 |
| 507 | #define PHY_CICADA_INIT4 0x0200 |
| 508 | #define PHY_CICADA_INIT5 0x0004 |
| 509 | #define PHY_CICADA_INIT6 0x02000 |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 510 | #define PHY_VITESSE_INIT_REG1 0x1f |
| 511 | #define PHY_VITESSE_INIT_REG2 0x10 |
| 512 | #define PHY_VITESSE_INIT_REG3 0x11 |
| 513 | #define PHY_VITESSE_INIT_REG4 0x12 |
| 514 | #define PHY_VITESSE_INIT_MSK1 0xc |
| 515 | #define PHY_VITESSE_INIT_MSK2 0x0180 |
| 516 | #define PHY_VITESSE_INIT1 0x52b5 |
| 517 | #define PHY_VITESSE_INIT2 0xaf8a |
| 518 | #define PHY_VITESSE_INIT3 0x8 |
| 519 | #define PHY_VITESSE_INIT4 0x8f8a |
| 520 | #define PHY_VITESSE_INIT5 0xaf86 |
| 521 | #define PHY_VITESSE_INIT6 0x8f86 |
| 522 | #define PHY_VITESSE_INIT7 0xaf82 |
| 523 | #define PHY_VITESSE_INIT8 0x0100 |
| 524 | #define PHY_VITESSE_INIT9 0x8f82 |
| 525 | #define PHY_VITESSE_INIT10 0x0 |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 526 | #define PHY_REALTEK_INIT_REG1 0x1f |
| 527 | #define PHY_REALTEK_INIT_REG2 0x19 |
| 528 | #define PHY_REALTEK_INIT_REG3 0x13 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 529 | #define PHY_REALTEK_INIT_REG4 0x14 |
| 530 | #define PHY_REALTEK_INIT_REG5 0x18 |
| 531 | #define PHY_REALTEK_INIT_REG6 0x11 |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 532 | #define PHY_REALTEK_INIT1 0x0000 |
| 533 | #define PHY_REALTEK_INIT2 0x8e00 |
| 534 | #define PHY_REALTEK_INIT3 0x0001 |
| 535 | #define PHY_REALTEK_INIT4 0xad17 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 536 | #define PHY_REALTEK_INIT5 0xfb54 |
| 537 | #define PHY_REALTEK_INIT6 0xf5c7 |
| 538 | #define PHY_REALTEK_INIT7 0x1000 |
| 539 | #define PHY_REALTEK_INIT8 0x0003 |
| 540 | #define PHY_REALTEK_INIT_MSK1 0x0003 |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 541 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | #define PHY_GIGABIT 0x0100 |
| 543 | |
| 544 | #define PHY_TIMEOUT 0x1 |
| 545 | #define PHY_ERROR 0x2 |
| 546 | |
| 547 | #define PHY_100 0x1 |
| 548 | #define PHY_1000 0x2 |
| 549 | #define PHY_HALF 0x100 |
| 550 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 551 | #define NV_PAUSEFRAME_RX_CAPABLE 0x0001 |
| 552 | #define NV_PAUSEFRAME_TX_CAPABLE 0x0002 |
| 553 | #define NV_PAUSEFRAME_RX_ENABLE 0x0004 |
| 554 | #define NV_PAUSEFRAME_TX_ENABLE 0x0008 |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 555 | #define NV_PAUSEFRAME_RX_REQ 0x0010 |
| 556 | #define NV_PAUSEFRAME_TX_REQ 0x0020 |
| 557 | #define NV_PAUSEFRAME_AUTONEG 0x0040 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 559 | /* MSI/MSI-X defines */ |
| 560 | #define NV_MSI_X_MAX_VECTORS 8 |
| 561 | #define NV_MSI_X_VECTORS_MASK 0x000f |
| 562 | #define NV_MSI_CAPABLE 0x0010 |
| 563 | #define NV_MSI_X_CAPABLE 0x0020 |
| 564 | #define NV_MSI_ENABLED 0x0040 |
| 565 | #define NV_MSI_X_ENABLED 0x0080 |
| 566 | |
| 567 | #define NV_MSI_X_VECTOR_ALL 0x0 |
| 568 | #define NV_MSI_X_VECTOR_RX 0x0 |
| 569 | #define NV_MSI_X_VECTOR_TX 0x1 |
| 570 | #define NV_MSI_X_VECTOR_OTHER 0x2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 571 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 572 | #define NV_RESTART_TX 0x1 |
| 573 | #define NV_RESTART_RX 0x2 |
| 574 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 575 | #define NV_TX_LIMIT_COUNT 16 |
| 576 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 577 | /* statistics */ |
| 578 | struct nv_ethtool_str { |
| 579 | char name[ETH_GSTRING_LEN]; |
| 580 | }; |
| 581 | |
| 582 | static const struct nv_ethtool_str nv_estats_str[] = { |
| 583 | { "tx_bytes" }, |
| 584 | { "tx_zero_rexmt" }, |
| 585 | { "tx_one_rexmt" }, |
| 586 | { "tx_many_rexmt" }, |
| 587 | { "tx_late_collision" }, |
| 588 | { "tx_fifo_errors" }, |
| 589 | { "tx_carrier_errors" }, |
| 590 | { "tx_excess_deferral" }, |
| 591 | { "tx_retry_error" }, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 592 | { "rx_frame_error" }, |
| 593 | { "rx_extra_byte" }, |
| 594 | { "rx_late_collision" }, |
| 595 | { "rx_runt" }, |
| 596 | { "rx_frame_too_long" }, |
| 597 | { "rx_over_errors" }, |
| 598 | { "rx_crc_errors" }, |
| 599 | { "rx_frame_align_error" }, |
| 600 | { "rx_length_error" }, |
| 601 | { "rx_unicast" }, |
| 602 | { "rx_multicast" }, |
| 603 | { "rx_broadcast" }, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 604 | { "rx_packets" }, |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 605 | { "rx_errors_total" }, |
| 606 | { "tx_errors_total" }, |
| 607 | |
| 608 | /* version 2 stats */ |
| 609 | { "tx_deferral" }, |
| 610 | { "tx_packets" }, |
| 611 | { "rx_bytes" }, |
| 612 | { "tx_pause" }, |
| 613 | { "rx_pause" }, |
| 614 | { "rx_drop_frame" } |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 615 | }; |
| 616 | |
| 617 | struct nv_ethtool_stats { |
| 618 | u64 tx_bytes; |
| 619 | u64 tx_zero_rexmt; |
| 620 | u64 tx_one_rexmt; |
| 621 | u64 tx_many_rexmt; |
| 622 | u64 tx_late_collision; |
| 623 | u64 tx_fifo_errors; |
| 624 | u64 tx_carrier_errors; |
| 625 | u64 tx_excess_deferral; |
| 626 | u64 tx_retry_error; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 627 | u64 rx_frame_error; |
| 628 | u64 rx_extra_byte; |
| 629 | u64 rx_late_collision; |
| 630 | u64 rx_runt; |
| 631 | u64 rx_frame_too_long; |
| 632 | u64 rx_over_errors; |
| 633 | u64 rx_crc_errors; |
| 634 | u64 rx_frame_align_error; |
| 635 | u64 rx_length_error; |
| 636 | u64 rx_unicast; |
| 637 | u64 rx_multicast; |
| 638 | u64 rx_broadcast; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 639 | u64 rx_packets; |
| 640 | u64 rx_errors_total; |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 641 | u64 tx_errors_total; |
| 642 | |
| 643 | /* version 2 stats */ |
| 644 | u64 tx_deferral; |
| 645 | u64 tx_packets; |
| 646 | u64 rx_bytes; |
| 647 | u64 tx_pause; |
| 648 | u64 rx_pause; |
| 649 | u64 rx_drop_frame; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 650 | }; |
| 651 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 652 | #define NV_DEV_STATISTICS_V2_COUNT (sizeof(struct nv_ethtool_stats)/sizeof(u64)) |
| 653 | #define NV_DEV_STATISTICS_V1_COUNT (NV_DEV_STATISTICS_V2_COUNT - 6) |
| 654 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 655 | /* diagnostics */ |
| 656 | #define NV_TEST_COUNT_BASE 3 |
| 657 | #define NV_TEST_COUNT_EXTENDED 4 |
| 658 | |
| 659 | static const struct nv_ethtool_str nv_etests_str[] = { |
| 660 | { "link (online/offline)" }, |
| 661 | { "register (offline) " }, |
| 662 | { "interrupt (offline) " }, |
| 663 | { "loopback (offline) " } |
| 664 | }; |
| 665 | |
| 666 | struct register_test { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 667 | __u32 reg; |
| 668 | __u32 mask; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 669 | }; |
| 670 | |
| 671 | static const struct register_test nv_registers_test[] = { |
| 672 | { NvRegUnknownSetupReg6, 0x01 }, |
| 673 | { NvRegMisc1, 0x03c }, |
| 674 | { NvRegOffloadConfig, 0x03ff }, |
| 675 | { NvRegMulticastAddrA, 0xffffffff }, |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 676 | { NvRegTxWatermark, 0x0ff }, |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 677 | { NvRegWakeUpFlags, 0x07777 }, |
| 678 | { 0,0 } |
| 679 | }; |
| 680 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 681 | struct nv_skb_map { |
| 682 | struct sk_buff *skb; |
| 683 | dma_addr_t dma; |
| 684 | unsigned int dma_len; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 685 | struct ring_desc_ex *first_tx_desc; |
| 686 | struct nv_skb_map *next_tx_ctx; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 687 | }; |
| 688 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | /* |
| 690 | * SMP locking: |
| 691 | * All hardware access under dev->priv->lock, except the performance |
| 692 | * critical parts: |
| 693 | * - rx is (pseudo-) lockless: it relies on the single-threading provided |
| 694 | * by the arch code for interrupts. |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 695 | * - tx setup is lockless: it relies on netif_tx_lock. Actual submission |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | * needs dev->priv->lock :-( |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 697 | * - set_multicast_list: preparation lockless, relies on netif_tx_lock. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | */ |
| 699 | |
| 700 | /* in dev: base, irq */ |
| 701 | struct fe_priv { |
| 702 | spinlock_t lock; |
| 703 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 704 | struct net_device *dev; |
| 705 | struct napi_struct napi; |
| 706 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | /* General data: |
| 708 | * Locking: spin_lock(&np->lock); */ |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 709 | struct nv_ethtool_stats estats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | int in_shutdown; |
| 711 | u32 linkspeed; |
| 712 | int duplex; |
| 713 | int autoneg; |
| 714 | int fixed_mode; |
| 715 | int phyaddr; |
| 716 | int wolenabled; |
| 717 | unsigned int phy_oui; |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 718 | unsigned int phy_model; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 719 | unsigned int phy_rev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | u16 gigabit; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 721 | int intr_test; |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 722 | int recover_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | |
| 724 | /* General data: RO fields */ |
| 725 | dma_addr_t ring_addr; |
| 726 | struct pci_dev *pci_dev; |
| 727 | u32 orig_mac[2]; |
| 728 | u32 irqmask; |
| 729 | u32 desc_ver; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 730 | u32 txrxctl_bits; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 731 | u32 vlanctl_bits; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 732 | u32 driver_data; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 733 | u32 device_id; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 734 | u32 register_size; |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 735 | int rx_csum; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 736 | u32 mac_in_use; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 737 | |
| 738 | void __iomem *base; |
| 739 | |
| 740 | /* rx specific fields. |
| 741 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); |
| 742 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 743 | union ring_type get_rx, put_rx, first_rx, last_rx; |
| 744 | struct nv_skb_map *get_rx_ctx, *put_rx_ctx; |
| 745 | struct nv_skb_map *first_rx_ctx, *last_rx_ctx; |
| 746 | struct nv_skb_map *rx_skb; |
| 747 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 748 | union ring_type rx_ring; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | unsigned int rx_buf_sz; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 750 | unsigned int pkt_limit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 751 | struct timer_list oom_kick; |
| 752 | struct timer_list nic_poll; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 753 | struct timer_list stats_poll; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 754 | u32 nic_poll_irq; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 755 | int rx_ring_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 756 | |
| 757 | /* media detection workaround. |
| 758 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); |
| 759 | */ |
| 760 | int need_linktimer; |
| 761 | unsigned long link_timeout; |
| 762 | /* |
| 763 | * tx specific fields. |
| 764 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 765 | union ring_type get_tx, put_tx, first_tx, last_tx; |
| 766 | struct nv_skb_map *get_tx_ctx, *put_tx_ctx; |
| 767 | struct nv_skb_map *first_tx_ctx, *last_tx_ctx; |
| 768 | struct nv_skb_map *tx_skb; |
| 769 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 770 | union ring_type tx_ring; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 771 | u32 tx_flags; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 772 | int tx_ring_size; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 773 | int tx_limit; |
| 774 | u32 tx_pkts_in_progress; |
| 775 | struct nv_skb_map *tx_change_owner; |
| 776 | struct nv_skb_map *tx_end_flip; |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 777 | int tx_stop; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 778 | |
| 779 | /* vlan fields */ |
| 780 | struct vlan_group *vlangrp; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 781 | |
| 782 | /* msi/msi-x fields */ |
| 783 | u32 msi_flags; |
| 784 | struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS]; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 785 | |
| 786 | /* flow control */ |
| 787 | u32 pause_flags; |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 788 | |
| 789 | /* power saved state */ |
| 790 | u32 saved_config_space[NV_PCI_REGSZ_MAX/4]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | }; |
| 792 | |
| 793 | /* |
| 794 | * Maximum number of loops until we assume that a bit in the irq mask |
| 795 | * is stuck. Overridable with module param. |
| 796 | */ |
| 797 | static int max_interrupt_work = 5; |
| 798 | |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 799 | /* |
| 800 | * Optimization can be either throuput mode or cpu mode |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 801 | * |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 802 | * Throughput Mode: Every tx and rx packet will generate an interrupt. |
| 803 | * CPU Mode: Interrupts are controlled by a timer. |
| 804 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 805 | enum { |
| 806 | NV_OPTIMIZATION_MODE_THROUGHPUT, |
| 807 | NV_OPTIMIZATION_MODE_CPU |
| 808 | }; |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 809 | static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT; |
| 810 | |
| 811 | /* |
| 812 | * Poll interval for timer irq |
| 813 | * |
| 814 | * This interval determines how frequent an interrupt is generated. |
| 815 | * The is value is determined by [(time_in_micro_secs * 100) / (2^10)] |
| 816 | * Min = 0, and Max = 65535 |
| 817 | */ |
| 818 | static int poll_interval = -1; |
| 819 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 820 | /* |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 821 | * MSI interrupts |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 822 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 823 | enum { |
| 824 | NV_MSI_INT_DISABLED, |
| 825 | NV_MSI_INT_ENABLED |
| 826 | }; |
| 827 | static int msi = NV_MSI_INT_ENABLED; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 828 | |
| 829 | /* |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 830 | * MSIX interrupts |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 831 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 832 | enum { |
| 833 | NV_MSIX_INT_DISABLED, |
| 834 | NV_MSIX_INT_ENABLED |
| 835 | }; |
Ayaz Abdulla | caf9646 | 2007-02-20 03:34:40 -0500 | [diff] [blame] | 836 | static int msix = NV_MSIX_INT_DISABLED; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 837 | |
| 838 | /* |
| 839 | * DMA 64bit |
| 840 | */ |
| 841 | enum { |
| 842 | NV_DMA_64BIT_DISABLED, |
| 843 | NV_DMA_64BIT_ENABLED |
| 844 | }; |
| 845 | static int dma_64bit = NV_DMA_64BIT_ENABLED; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 846 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 847 | /* |
| 848 | * Crossover Detection |
| 849 | * Realtek 8201 phy + some OEM boards do not work properly. |
| 850 | */ |
| 851 | enum { |
| 852 | NV_CROSSOVER_DETECTION_DISABLED, |
| 853 | NV_CROSSOVER_DETECTION_ENABLED |
| 854 | }; |
| 855 | static int phy_cross = NV_CROSSOVER_DETECTION_DISABLED; |
| 856 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | static inline struct fe_priv *get_nvpriv(struct net_device *dev) |
| 858 | { |
| 859 | return netdev_priv(dev); |
| 860 | } |
| 861 | |
| 862 | static inline u8 __iomem *get_hwbase(struct net_device *dev) |
| 863 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 864 | return ((struct fe_priv *)netdev_priv(dev))->base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | } |
| 866 | |
| 867 | static inline void pci_push(u8 __iomem *base) |
| 868 | { |
| 869 | /* force out pending posted writes */ |
| 870 | readl(base); |
| 871 | } |
| 872 | |
| 873 | static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v) |
| 874 | { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 875 | return le32_to_cpu(prd->flaglen) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | & ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2); |
| 877 | } |
| 878 | |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 879 | static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v) |
| 880 | { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 881 | return le32_to_cpu(prd->flaglen) & LEN_MASK_V2; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 882 | } |
| 883 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 884 | static bool nv_optimized(struct fe_priv *np) |
| 885 | { |
| 886 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
| 887 | return false; |
| 888 | return true; |
| 889 | } |
| 890 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 891 | static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target, |
| 892 | int delay, int delaymax, const char *msg) |
| 893 | { |
| 894 | u8 __iomem *base = get_hwbase(dev); |
| 895 | |
| 896 | pci_push(base); |
| 897 | do { |
| 898 | udelay(delay); |
| 899 | delaymax -= delay; |
| 900 | if (delaymax < 0) { |
| 901 | if (msg) |
| 902 | printk(msg); |
| 903 | return 1; |
| 904 | } |
| 905 | } while ((readl(base + offset) & mask) != target); |
| 906 | return 0; |
| 907 | } |
| 908 | |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 909 | #define NV_SETUP_RX_RING 0x01 |
| 910 | #define NV_SETUP_TX_RING 0x02 |
| 911 | |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 912 | static inline u32 dma_low(dma_addr_t addr) |
| 913 | { |
| 914 | return addr; |
| 915 | } |
| 916 | |
| 917 | static inline u32 dma_high(dma_addr_t addr) |
| 918 | { |
| 919 | return addr>>31>>1; /* 0 if 32bit, shift down by 32 if 64bit */ |
| 920 | } |
| 921 | |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 922 | static void setup_hw_rings(struct net_device *dev, int rxtx_flags) |
| 923 | { |
| 924 | struct fe_priv *np = get_nvpriv(dev); |
| 925 | u8 __iomem *base = get_hwbase(dev); |
| 926 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 927 | if (!nv_optimized(np)) { |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 928 | if (rxtx_flags & NV_SETUP_RX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 929 | writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 930 | } |
| 931 | if (rxtx_flags & NV_SETUP_TX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 932 | writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 933 | } |
| 934 | } else { |
| 935 | if (rxtx_flags & NV_SETUP_RX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 936 | writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr); |
| 937 | writel(dma_high(np->ring_addr), base + NvRegRxRingPhysAddrHigh); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 938 | } |
| 939 | if (rxtx_flags & NV_SETUP_TX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 940 | writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr); |
| 941 | writel(dma_high(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddrHigh); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 942 | } |
| 943 | } |
| 944 | } |
| 945 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 946 | static void free_rings(struct net_device *dev) |
| 947 | { |
| 948 | struct fe_priv *np = get_nvpriv(dev); |
| 949 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 950 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 951 | if (np->rx_ring.orig) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 952 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), |
| 953 | np->rx_ring.orig, np->ring_addr); |
| 954 | } else { |
| 955 | if (np->rx_ring.ex) |
| 956 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), |
| 957 | np->rx_ring.ex, np->ring_addr); |
| 958 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 959 | if (np->rx_skb) |
| 960 | kfree(np->rx_skb); |
| 961 | if (np->tx_skb) |
| 962 | kfree(np->tx_skb); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 963 | } |
| 964 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 965 | static int using_multi_irqs(struct net_device *dev) |
| 966 | { |
| 967 | struct fe_priv *np = get_nvpriv(dev); |
| 968 | |
| 969 | if (!(np->msi_flags & NV_MSI_X_ENABLED) || |
| 970 | ((np->msi_flags & NV_MSI_X_ENABLED) && |
| 971 | ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) |
| 972 | return 0; |
| 973 | else |
| 974 | return 1; |
| 975 | } |
| 976 | |
| 977 | static void nv_enable_irq(struct net_device *dev) |
| 978 | { |
| 979 | struct fe_priv *np = get_nvpriv(dev); |
| 980 | |
| 981 | if (!using_multi_irqs(dev)) { |
| 982 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 983 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 984 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 985 | enable_irq(np->pci_dev->irq); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 986 | } else { |
| 987 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 988 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
| 989 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
| 990 | } |
| 991 | } |
| 992 | |
| 993 | static void nv_disable_irq(struct net_device *dev) |
| 994 | { |
| 995 | struct fe_priv *np = get_nvpriv(dev); |
| 996 | |
| 997 | if (!using_multi_irqs(dev)) { |
| 998 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 999 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1000 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1001 | disable_irq(np->pci_dev->irq); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1002 | } else { |
| 1003 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1004 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
| 1005 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
| 1006 | } |
| 1007 | } |
| 1008 | |
| 1009 | /* In MSIX mode, a write to irqmask behaves as XOR */ |
| 1010 | static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask) |
| 1011 | { |
| 1012 | u8 __iomem *base = get_hwbase(dev); |
| 1013 | |
| 1014 | writel(mask, base + NvRegIrqMask); |
| 1015 | } |
| 1016 | |
| 1017 | static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask) |
| 1018 | { |
| 1019 | struct fe_priv *np = get_nvpriv(dev); |
| 1020 | u8 __iomem *base = get_hwbase(dev); |
| 1021 | |
| 1022 | if (np->msi_flags & NV_MSI_X_ENABLED) { |
| 1023 | writel(mask, base + NvRegIrqMask); |
| 1024 | } else { |
| 1025 | if (np->msi_flags & NV_MSI_ENABLED) |
| 1026 | writel(0, base + NvRegMSIIrqMask); |
| 1027 | writel(0, base + NvRegIrqMask); |
| 1028 | } |
| 1029 | } |
| 1030 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1031 | #define MII_READ (-1) |
| 1032 | /* mii_rw: read/write a register on the PHY. |
| 1033 | * |
| 1034 | * Caller must guarantee serialization |
| 1035 | */ |
| 1036 | static int mii_rw(struct net_device *dev, int addr, int miireg, int value) |
| 1037 | { |
| 1038 | u8 __iomem *base = get_hwbase(dev); |
| 1039 | u32 reg; |
| 1040 | int retval; |
| 1041 | |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 1042 | writel(NVREG_MIISTAT_MASK_RW, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1043 | |
| 1044 | reg = readl(base + NvRegMIIControl); |
| 1045 | if (reg & NVREG_MIICTL_INUSE) { |
| 1046 | writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl); |
| 1047 | udelay(NV_MIIBUSY_DELAY); |
| 1048 | } |
| 1049 | |
| 1050 | reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg; |
| 1051 | if (value != MII_READ) { |
| 1052 | writel(value, base + NvRegMIIData); |
| 1053 | reg |= NVREG_MIICTL_WRITE; |
| 1054 | } |
| 1055 | writel(reg, base + NvRegMIIControl); |
| 1056 | |
| 1057 | if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0, |
| 1058 | NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) { |
| 1059 | dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d timed out.\n", |
| 1060 | dev->name, miireg, addr); |
| 1061 | retval = -1; |
| 1062 | } else if (value != MII_READ) { |
| 1063 | /* it was a write operation - fewer failures are detectable */ |
| 1064 | dprintk(KERN_DEBUG "%s: mii_rw wrote 0x%x to reg %d at PHY %d\n", |
| 1065 | dev->name, value, miireg, addr); |
| 1066 | retval = 0; |
| 1067 | } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) { |
| 1068 | dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d failed.\n", |
| 1069 | dev->name, miireg, addr); |
| 1070 | retval = -1; |
| 1071 | } else { |
| 1072 | retval = readl(base + NvRegMIIData); |
| 1073 | dprintk(KERN_DEBUG "%s: mii_rw read from reg %d at PHY %d: 0x%x.\n", |
| 1074 | dev->name, miireg, addr, retval); |
| 1075 | } |
| 1076 | |
| 1077 | return retval; |
| 1078 | } |
| 1079 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1080 | static int phy_reset(struct net_device *dev, u32 bmcr_setup) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1081 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1082 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | u32 miicontrol; |
| 1084 | unsigned int tries = 0; |
| 1085 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1086 | miicontrol = BMCR_RESET | bmcr_setup; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1087 | if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) { |
| 1088 | return -1; |
| 1089 | } |
| 1090 | |
| 1091 | /* wait for 500ms */ |
| 1092 | msleep(500); |
| 1093 | |
| 1094 | /* must wait till reset is deasserted */ |
| 1095 | while (miicontrol & BMCR_RESET) { |
| 1096 | msleep(10); |
| 1097 | miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 1098 | /* FIXME: 100 tries seem excessive */ |
| 1099 | if (tries++ > 100) |
| 1100 | return -1; |
| 1101 | } |
| 1102 | return 0; |
| 1103 | } |
| 1104 | |
| 1105 | static int phy_init(struct net_device *dev) |
| 1106 | { |
| 1107 | struct fe_priv *np = get_nvpriv(dev); |
| 1108 | u8 __iomem *base = get_hwbase(dev); |
| 1109 | u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000,reg; |
| 1110 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1111 | /* phy errata for E3016 phy */ |
| 1112 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 1113 | reg = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); |
| 1114 | reg &= ~PHY_MARVELL_E3016_INITMASK; |
| 1115 | if (mii_rw(dev, np->phyaddr, MII_NCONFIG, reg)) { |
| 1116 | printk(KERN_INFO "%s: phy write to errata reg failed.\n", pci_name(np->pci_dev)); |
| 1117 | return PHY_ERROR; |
| 1118 | } |
| 1119 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1120 | if (np->phy_oui == PHY_OUI_REALTEK) { |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1121 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1122 | np->phy_rev == PHY_REV_REALTEK_8211B) { |
| 1123 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1124 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1125 | return PHY_ERROR; |
| 1126 | } |
| 1127 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) { |
| 1128 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1129 | return PHY_ERROR; |
| 1130 | } |
| 1131 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { |
| 1132 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1133 | return PHY_ERROR; |
| 1134 | } |
| 1135 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) { |
| 1136 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1137 | return PHY_ERROR; |
| 1138 | } |
| 1139 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) { |
| 1140 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1141 | return PHY_ERROR; |
| 1142 | } |
| 1143 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) { |
| 1144 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1145 | return PHY_ERROR; |
| 1146 | } |
| 1147 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1148 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1149 | return PHY_ERROR; |
| 1150 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1151 | } |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1152 | if (np->phy_model == PHY_MODEL_REALTEK_8201) { |
| 1153 | if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 || |
| 1154 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 || |
| 1155 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_34 || |
| 1156 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_35 || |
| 1157 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_36 || |
| 1158 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_37 || |
| 1159 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_38 || |
| 1160 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_39) { |
| 1161 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); |
| 1162 | phy_reserved |= PHY_REALTEK_INIT7; |
| 1163 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) { |
| 1164 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1165 | return PHY_ERROR; |
| 1166 | } |
| 1167 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1168 | } |
| 1169 | } |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1170 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1171 | /* set advertise register */ |
| 1172 | reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1173 | reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|ADVERTISE_PAUSE_ASYM|ADVERTISE_PAUSE_CAP); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1174 | if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) { |
| 1175 | printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev)); |
| 1176 | return PHY_ERROR; |
| 1177 | } |
| 1178 | |
| 1179 | /* get phy interface type */ |
| 1180 | phyinterface = readl(base + NvRegPhyInterface); |
| 1181 | |
| 1182 | /* see if gigabit phy */ |
| 1183 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 1184 | if (mii_status & PHY_GIGABIT) { |
| 1185 | np->gigabit = PHY_GIGABIT; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1186 | mii_control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1187 | mii_control_1000 &= ~ADVERTISE_1000HALF; |
| 1188 | if (phyinterface & PHY_RGMII) |
| 1189 | mii_control_1000 |= ADVERTISE_1000FULL; |
| 1190 | else |
| 1191 | mii_control_1000 &= ~ADVERTISE_1000FULL; |
| 1192 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1193 | if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1194 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1195 | return PHY_ERROR; |
| 1196 | } |
| 1197 | } |
| 1198 | else |
| 1199 | np->gigabit = 0; |
| 1200 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1201 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 1202 | mii_control |= BMCR_ANENABLE; |
| 1203 | |
| 1204 | /* reset the phy |
| 1205 | * (certain phys need bmcr to be setup with reset) |
| 1206 | */ |
| 1207 | if (phy_reset(dev, mii_control)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1208 | printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev)); |
| 1209 | return PHY_ERROR; |
| 1210 | } |
| 1211 | |
| 1212 | /* phy vendor specific configuration */ |
| 1213 | if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII) ) { |
| 1214 | phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ); |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 1215 | phy_reserved &= ~(PHY_CICADA_INIT1 | PHY_CICADA_INIT2); |
| 1216 | phy_reserved |= (PHY_CICADA_INIT3 | PHY_CICADA_INIT4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1217 | if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) { |
| 1218 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1219 | return PHY_ERROR; |
| 1220 | } |
| 1221 | phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 1222 | phy_reserved |= PHY_CICADA_INIT5; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1223 | if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) { |
| 1224 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1225 | return PHY_ERROR; |
| 1226 | } |
| 1227 | } |
| 1228 | if (np->phy_oui == PHY_OUI_CICADA) { |
| 1229 | phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ); |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 1230 | phy_reserved |= PHY_CICADA_INIT6; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1231 | if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) { |
| 1232 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1233 | return PHY_ERROR; |
| 1234 | } |
| 1235 | } |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 1236 | if (np->phy_oui == PHY_OUI_VITESSE) { |
| 1237 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT1)) { |
| 1238 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1239 | return PHY_ERROR; |
| 1240 | } |
| 1241 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT2)) { |
| 1242 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1243 | return PHY_ERROR; |
| 1244 | } |
| 1245 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ); |
| 1246 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) { |
| 1247 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1248 | return PHY_ERROR; |
| 1249 | } |
| 1250 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ); |
| 1251 | phy_reserved &= ~PHY_VITESSE_INIT_MSK1; |
| 1252 | phy_reserved |= PHY_VITESSE_INIT3; |
| 1253 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) { |
| 1254 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1255 | return PHY_ERROR; |
| 1256 | } |
| 1257 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT4)) { |
| 1258 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1259 | return PHY_ERROR; |
| 1260 | } |
| 1261 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT5)) { |
| 1262 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1263 | return PHY_ERROR; |
| 1264 | } |
| 1265 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ); |
| 1266 | phy_reserved &= ~PHY_VITESSE_INIT_MSK1; |
| 1267 | phy_reserved |= PHY_VITESSE_INIT3; |
| 1268 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) { |
| 1269 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1270 | return PHY_ERROR; |
| 1271 | } |
| 1272 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ); |
| 1273 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) { |
| 1274 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1275 | return PHY_ERROR; |
| 1276 | } |
| 1277 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT6)) { |
| 1278 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1279 | return PHY_ERROR; |
| 1280 | } |
| 1281 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT7)) { |
| 1282 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1283 | return PHY_ERROR; |
| 1284 | } |
| 1285 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ); |
| 1286 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) { |
| 1287 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1288 | return PHY_ERROR; |
| 1289 | } |
| 1290 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ); |
| 1291 | phy_reserved &= ~PHY_VITESSE_INIT_MSK2; |
| 1292 | phy_reserved |= PHY_VITESSE_INIT8; |
| 1293 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) { |
| 1294 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1295 | return PHY_ERROR; |
| 1296 | } |
| 1297 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT9)) { |
| 1298 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1299 | return PHY_ERROR; |
| 1300 | } |
| 1301 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT10)) { |
| 1302 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1303 | return PHY_ERROR; |
| 1304 | } |
| 1305 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1306 | if (np->phy_oui == PHY_OUI_REALTEK) { |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1307 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1308 | np->phy_rev == PHY_REV_REALTEK_8211B) { |
| 1309 | /* reset could have cleared these out, set them back */ |
| 1310 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1311 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1312 | return PHY_ERROR; |
| 1313 | } |
| 1314 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) { |
| 1315 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1316 | return PHY_ERROR; |
| 1317 | } |
| 1318 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { |
| 1319 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1320 | return PHY_ERROR; |
| 1321 | } |
| 1322 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) { |
| 1323 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1324 | return PHY_ERROR; |
| 1325 | } |
| 1326 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) { |
| 1327 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1328 | return PHY_ERROR; |
| 1329 | } |
| 1330 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) { |
| 1331 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1332 | return PHY_ERROR; |
| 1333 | } |
| 1334 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1335 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1336 | return PHY_ERROR; |
| 1337 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1338 | } |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1339 | if (np->phy_model == PHY_MODEL_REALTEK_8201) { |
| 1340 | if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 || |
| 1341 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 || |
| 1342 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_34 || |
| 1343 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_35 || |
| 1344 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_36 || |
| 1345 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_37 || |
| 1346 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_38 || |
| 1347 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_39) { |
| 1348 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); |
| 1349 | phy_reserved |= PHY_REALTEK_INIT7; |
| 1350 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) { |
| 1351 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1352 | return PHY_ERROR; |
| 1353 | } |
| 1354 | } |
| 1355 | if (phy_cross == NV_CROSSOVER_DETECTION_DISABLED) { |
| 1356 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { |
| 1357 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1358 | return PHY_ERROR; |
| 1359 | } |
| 1360 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ); |
| 1361 | phy_reserved &= ~PHY_REALTEK_INIT_MSK1; |
| 1362 | phy_reserved |= PHY_REALTEK_INIT3; |
| 1363 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved)) { |
| 1364 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1365 | return PHY_ERROR; |
| 1366 | } |
| 1367 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { |
| 1368 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
| 1369 | return PHY_ERROR; |
| 1370 | } |
| 1371 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1372 | } |
| 1373 | } |
| 1374 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1375 | /* some phys clear out pause advertisment on reset, set it back */ |
| 1376 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1377 | |
| 1378 | /* restart auto negotiation */ |
| 1379 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 1380 | mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); |
| 1381 | if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { |
| 1382 | return PHY_ERROR; |
| 1383 | } |
| 1384 | |
| 1385 | return 0; |
| 1386 | } |
| 1387 | |
| 1388 | static void nv_start_rx(struct net_device *dev) |
| 1389 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1390 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1391 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1392 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1393 | |
| 1394 | dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name); |
| 1395 | /* Already running? Stop it. */ |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1396 | if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) { |
| 1397 | rx_ctrl &= ~NVREG_RCVCTL_START; |
| 1398 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1399 | pci_push(base); |
| 1400 | } |
| 1401 | writel(np->linkspeed, base + NvRegLinkSpeed); |
| 1402 | pci_push(base); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1403 | rx_ctrl |= NVREG_RCVCTL_START; |
| 1404 | if (np->mac_in_use) |
| 1405 | rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN; |
| 1406 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1407 | dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n", |
| 1408 | dev->name, np->duplex, np->linkspeed); |
| 1409 | pci_push(base); |
| 1410 | } |
| 1411 | |
| 1412 | static void nv_stop_rx(struct net_device *dev) |
| 1413 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1414 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1415 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1416 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1417 | |
| 1418 | dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1419 | if (!np->mac_in_use) |
| 1420 | rx_ctrl &= ~NVREG_RCVCTL_START; |
| 1421 | else |
| 1422 | rx_ctrl |= NVREG_RCVCTL_RX_PATH_EN; |
| 1423 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1424 | reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0, |
| 1425 | NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX, |
| 1426 | KERN_INFO "nv_stop_rx: ReceiverStatus remained busy"); |
| 1427 | |
| 1428 | udelay(NV_RXSTOP_DELAY2); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1429 | if (!np->mac_in_use) |
| 1430 | writel(0, base + NvRegLinkSpeed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1431 | } |
| 1432 | |
| 1433 | static void nv_start_tx(struct net_device *dev) |
| 1434 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1435 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1436 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1437 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1438 | |
| 1439 | dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1440 | tx_ctrl |= NVREG_XMITCTL_START; |
| 1441 | if (np->mac_in_use) |
| 1442 | tx_ctrl &= ~NVREG_XMITCTL_TX_PATH_EN; |
| 1443 | writel(tx_ctrl, base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1444 | pci_push(base); |
| 1445 | } |
| 1446 | |
| 1447 | static void nv_stop_tx(struct net_device *dev) |
| 1448 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1449 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1450 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1451 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1452 | |
| 1453 | dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1454 | if (!np->mac_in_use) |
| 1455 | tx_ctrl &= ~NVREG_XMITCTL_START; |
| 1456 | else |
| 1457 | tx_ctrl |= NVREG_XMITCTL_TX_PATH_EN; |
| 1458 | writel(tx_ctrl, base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1459 | reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0, |
| 1460 | NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX, |
| 1461 | KERN_INFO "nv_stop_tx: TransmitterStatus remained busy"); |
| 1462 | |
| 1463 | udelay(NV_TXSTOP_DELAY2); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1464 | if (!np->mac_in_use) |
| 1465 | writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, |
| 1466 | base + NvRegTransmitPoll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1467 | } |
| 1468 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1469 | static void nv_start_rxtx(struct net_device *dev) |
| 1470 | { |
| 1471 | nv_start_rx(dev); |
| 1472 | nv_start_tx(dev); |
| 1473 | } |
| 1474 | |
| 1475 | static void nv_stop_rxtx(struct net_device *dev) |
| 1476 | { |
| 1477 | nv_stop_rx(dev); |
| 1478 | nv_stop_tx(dev); |
| 1479 | } |
| 1480 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1481 | static void nv_txrx_reset(struct net_device *dev) |
| 1482 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1483 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1484 | u8 __iomem *base = get_hwbase(dev); |
| 1485 | |
| 1486 | dprintk(KERN_DEBUG "%s: nv_txrx_reset\n", dev->name); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 1487 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1488 | pci_push(base); |
| 1489 | udelay(NV_TXRX_RESET_DELAY); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 1490 | writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1491 | pci_push(base); |
| 1492 | } |
| 1493 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1494 | static void nv_mac_reset(struct net_device *dev) |
| 1495 | { |
| 1496 | struct fe_priv *np = netdev_priv(dev); |
| 1497 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1498 | u32 temp1, temp2, temp3; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1499 | |
| 1500 | dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1501 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1502 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
| 1503 | pci_push(base); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1504 | |
| 1505 | /* save registers since they will be cleared on reset */ |
| 1506 | temp1 = readl(base + NvRegMacAddrA); |
| 1507 | temp2 = readl(base + NvRegMacAddrB); |
| 1508 | temp3 = readl(base + NvRegTransmitPoll); |
| 1509 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1510 | writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset); |
| 1511 | pci_push(base); |
| 1512 | udelay(NV_MAC_RESET_DELAY); |
| 1513 | writel(0, base + NvRegMacReset); |
| 1514 | pci_push(base); |
| 1515 | udelay(NV_MAC_RESET_DELAY); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1516 | |
| 1517 | /* restore saved registers */ |
| 1518 | writel(temp1, base + NvRegMacAddrA); |
| 1519 | writel(temp2, base + NvRegMacAddrB); |
| 1520 | writel(temp3, base + NvRegTransmitPoll); |
| 1521 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1522 | writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); |
| 1523 | pci_push(base); |
| 1524 | } |
| 1525 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 1526 | static void nv_get_hw_stats(struct net_device *dev) |
| 1527 | { |
| 1528 | struct fe_priv *np = netdev_priv(dev); |
| 1529 | u8 __iomem *base = get_hwbase(dev); |
| 1530 | |
| 1531 | np->estats.tx_bytes += readl(base + NvRegTxCnt); |
| 1532 | np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt); |
| 1533 | np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt); |
| 1534 | np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt); |
| 1535 | np->estats.tx_late_collision += readl(base + NvRegTxLateCol); |
| 1536 | np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow); |
| 1537 | np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier); |
| 1538 | np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef); |
| 1539 | np->estats.tx_retry_error += readl(base + NvRegTxRetryErr); |
| 1540 | np->estats.rx_frame_error += readl(base + NvRegRxFrameErr); |
| 1541 | np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte); |
| 1542 | np->estats.rx_late_collision += readl(base + NvRegRxLateCol); |
| 1543 | np->estats.rx_runt += readl(base + NvRegRxRunt); |
| 1544 | np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong); |
| 1545 | np->estats.rx_over_errors += readl(base + NvRegRxOverflow); |
| 1546 | np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr); |
| 1547 | np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr); |
| 1548 | np->estats.rx_length_error += readl(base + NvRegRxLenErr); |
| 1549 | np->estats.rx_unicast += readl(base + NvRegRxUnicast); |
| 1550 | np->estats.rx_multicast += readl(base + NvRegRxMulticast); |
| 1551 | np->estats.rx_broadcast += readl(base + NvRegRxBroadcast); |
| 1552 | np->estats.rx_packets = |
| 1553 | np->estats.rx_unicast + |
| 1554 | np->estats.rx_multicast + |
| 1555 | np->estats.rx_broadcast; |
| 1556 | np->estats.rx_errors_total = |
| 1557 | np->estats.rx_crc_errors + |
| 1558 | np->estats.rx_over_errors + |
| 1559 | np->estats.rx_frame_error + |
| 1560 | (np->estats.rx_frame_align_error - np->estats.rx_extra_byte) + |
| 1561 | np->estats.rx_late_collision + |
| 1562 | np->estats.rx_runt + |
| 1563 | np->estats.rx_frame_too_long; |
| 1564 | np->estats.tx_errors_total = |
| 1565 | np->estats.tx_late_collision + |
| 1566 | np->estats.tx_fifo_errors + |
| 1567 | np->estats.tx_carrier_errors + |
| 1568 | np->estats.tx_excess_deferral + |
| 1569 | np->estats.tx_retry_error; |
| 1570 | |
| 1571 | if (np->driver_data & DEV_HAS_STATISTICS_V2) { |
| 1572 | np->estats.tx_deferral += readl(base + NvRegTxDef); |
| 1573 | np->estats.tx_packets += readl(base + NvRegTxFrame); |
| 1574 | np->estats.rx_bytes += readl(base + NvRegRxCnt); |
| 1575 | np->estats.tx_pause += readl(base + NvRegTxPause); |
| 1576 | np->estats.rx_pause += readl(base + NvRegRxPause); |
| 1577 | np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame); |
| 1578 | } |
| 1579 | } |
| 1580 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1581 | /* |
| 1582 | * nv_get_stats: dev->get_stats function |
| 1583 | * Get latest stats value from the nic. |
| 1584 | * Called with read_lock(&dev_base_lock) held for read - |
| 1585 | * only synchronized against unregister_netdevice. |
| 1586 | */ |
| 1587 | static struct net_device_stats *nv_get_stats(struct net_device *dev) |
| 1588 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1589 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1590 | |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1591 | /* If the nic supports hw counters then retrieve latest values */ |
| 1592 | if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2)) { |
| 1593 | nv_get_hw_stats(dev); |
| 1594 | |
| 1595 | /* copy to net_device stats */ |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1596 | dev->stats.tx_bytes = np->estats.tx_bytes; |
| 1597 | dev->stats.tx_fifo_errors = np->estats.tx_fifo_errors; |
| 1598 | dev->stats.tx_carrier_errors = np->estats.tx_carrier_errors; |
| 1599 | dev->stats.rx_crc_errors = np->estats.rx_crc_errors; |
| 1600 | dev->stats.rx_over_errors = np->estats.rx_over_errors; |
| 1601 | dev->stats.rx_errors = np->estats.rx_errors_total; |
| 1602 | dev->stats.tx_errors = np->estats.tx_errors_total; |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1603 | } |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1604 | |
| 1605 | return &dev->stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1606 | } |
| 1607 | |
| 1608 | /* |
| 1609 | * nv_alloc_rx: fill rx ring entries. |
| 1610 | * Return 1 if the allocations for the skbs failed and the |
| 1611 | * rx engine is without Available descriptors |
| 1612 | */ |
| 1613 | static int nv_alloc_rx(struct net_device *dev) |
| 1614 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1615 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1616 | struct ring_desc* less_rx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1617 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1618 | less_rx = np->get_rx.orig; |
| 1619 | if (less_rx-- == np->first_rx.orig) |
| 1620 | less_rx = np->last_rx.orig; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1621 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1622 | while (np->put_rx.orig != less_rx) { |
| 1623 | struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1624 | if (skb) { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1625 | np->put_rx_ctx->skb = skb; |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1626 | np->put_rx_ctx->dma = pci_map_single(np->pci_dev, |
| 1627 | skb->data, |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1628 | skb_tailroom(skb), |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1629 | PCI_DMA_FROMDEVICE); |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1630 | np->put_rx_ctx->dma_len = skb_tailroom(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1631 | np->put_rx.orig->buf = cpu_to_le32(np->put_rx_ctx->dma); |
| 1632 | wmb(); |
| 1633 | np->put_rx.orig->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1634 | if (unlikely(np->put_rx.orig++ == np->last_rx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1635 | np->put_rx.orig = np->first_rx.orig; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1636 | if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1637 | np->put_rx_ctx = np->first_rx_ctx; |
| 1638 | } else { |
| 1639 | return 1; |
| 1640 | } |
| 1641 | } |
| 1642 | return 0; |
| 1643 | } |
| 1644 | |
| 1645 | static int nv_alloc_rx_optimized(struct net_device *dev) |
| 1646 | { |
| 1647 | struct fe_priv *np = netdev_priv(dev); |
| 1648 | struct ring_desc_ex* less_rx; |
| 1649 | |
| 1650 | less_rx = np->get_rx.ex; |
| 1651 | if (less_rx-- == np->first_rx.ex) |
| 1652 | less_rx = np->last_rx.ex; |
| 1653 | |
| 1654 | while (np->put_rx.ex != less_rx) { |
| 1655 | struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); |
| 1656 | if (skb) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1657 | np->put_rx_ctx->skb = skb; |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1658 | np->put_rx_ctx->dma = pci_map_single(np->pci_dev, |
| 1659 | skb->data, |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1660 | skb_tailroom(skb), |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1661 | PCI_DMA_FROMDEVICE); |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1662 | np->put_rx_ctx->dma_len = skb_tailroom(skb); |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 1663 | np->put_rx.ex->bufhigh = cpu_to_le32(dma_high(np->put_rx_ctx->dma)); |
| 1664 | np->put_rx.ex->buflow = cpu_to_le32(dma_low(np->put_rx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1665 | wmb(); |
| 1666 | np->put_rx.ex->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1667 | if (unlikely(np->put_rx.ex++ == np->last_rx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1668 | np->put_rx.ex = np->first_rx.ex; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1669 | if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1670 | np->put_rx_ctx = np->first_rx_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1671 | } else { |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1672 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1673 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1674 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1675 | return 0; |
| 1676 | } |
| 1677 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1678 | /* If rx bufs are exhausted called after 50ms to attempt to refresh */ |
| 1679 | #ifdef CONFIG_FORCEDETH_NAPI |
| 1680 | static void nv_do_rx_refill(unsigned long data) |
| 1681 | { |
| 1682 | struct net_device *dev = (struct net_device *) data; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1683 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1684 | |
| 1685 | /* Just reschedule NAPI rx processing */ |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1686 | netif_rx_schedule(dev, &np->napi); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1687 | } |
| 1688 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1689 | static void nv_do_rx_refill(unsigned long data) |
| 1690 | { |
| 1691 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1692 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1693 | int retcode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1694 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1695 | if (!using_multi_irqs(dev)) { |
| 1696 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1697 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1698 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1699 | disable_irq(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 1700 | } else { |
| 1701 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1702 | } |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1703 | if (!nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1704 | retcode = nv_alloc_rx(dev); |
| 1705 | else |
| 1706 | retcode = nv_alloc_rx_optimized(dev); |
| 1707 | if (retcode) { |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1708 | spin_lock_irq(&np->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1709 | if (!np->in_shutdown) |
| 1710 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1711 | spin_unlock_irq(&np->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1712 | } |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1713 | if (!using_multi_irqs(dev)) { |
| 1714 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1715 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1716 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1717 | enable_irq(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 1718 | } else { |
| 1719 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1720 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1721 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1722 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1723 | |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 1724 | static void nv_init_rx(struct net_device *dev) |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1725 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1726 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1727 | int i; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1728 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1729 | np->get_rx = np->put_rx = np->first_rx = np->rx_ring; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1730 | |
| 1731 | if (!nv_optimized(np)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1732 | np->last_rx.orig = &np->rx_ring.orig[np->rx_ring_size-1]; |
| 1733 | else |
| 1734 | np->last_rx.ex = &np->rx_ring.ex[np->rx_ring_size-1]; |
| 1735 | np->get_rx_ctx = np->put_rx_ctx = np->first_rx_ctx = np->rx_skb; |
| 1736 | np->last_rx_ctx = &np->rx_skb[np->rx_ring_size-1]; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1737 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1738 | for (i = 0; i < np->rx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1739 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1740 | np->rx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1741 | np->rx_ring.orig[i].buf = 0; |
| 1742 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1743 | np->rx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1744 | np->rx_ring.ex[i].txvlan = 0; |
| 1745 | np->rx_ring.ex[i].bufhigh = 0; |
| 1746 | np->rx_ring.ex[i].buflow = 0; |
| 1747 | } |
| 1748 | np->rx_skb[i].skb = NULL; |
| 1749 | np->rx_skb[i].dma = 0; |
| 1750 | } |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1751 | } |
| 1752 | |
| 1753 | static void nv_init_tx(struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1754 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1755 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1756 | int i; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1757 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1758 | np->get_tx = np->put_tx = np->first_tx = np->tx_ring; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1759 | |
| 1760 | if (!nv_optimized(np)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1761 | np->last_tx.orig = &np->tx_ring.orig[np->tx_ring_size-1]; |
| 1762 | else |
| 1763 | np->last_tx.ex = &np->tx_ring.ex[np->tx_ring_size-1]; |
| 1764 | np->get_tx_ctx = np->put_tx_ctx = np->first_tx_ctx = np->tx_skb; |
| 1765 | np->last_tx_ctx = &np->tx_skb[np->tx_ring_size-1]; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1766 | np->tx_pkts_in_progress = 0; |
| 1767 | np->tx_change_owner = NULL; |
| 1768 | np->tx_end_flip = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1769 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1770 | for (i = 0; i < np->tx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1771 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1772 | np->tx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1773 | np->tx_ring.orig[i].buf = 0; |
| 1774 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1775 | np->tx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1776 | np->tx_ring.ex[i].txvlan = 0; |
| 1777 | np->tx_ring.ex[i].bufhigh = 0; |
| 1778 | np->tx_ring.ex[i].buflow = 0; |
| 1779 | } |
| 1780 | np->tx_skb[i].skb = NULL; |
| 1781 | np->tx_skb[i].dma = 0; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1782 | np->tx_skb[i].dma_len = 0; |
| 1783 | np->tx_skb[i].first_tx_desc = NULL; |
| 1784 | np->tx_skb[i].next_tx_ctx = NULL; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1785 | } |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1786 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1787 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1788 | static int nv_init_ring(struct net_device *dev) |
| 1789 | { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1790 | struct fe_priv *np = netdev_priv(dev); |
| 1791 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1792 | nv_init_tx(dev); |
| 1793 | nv_init_rx(dev); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1794 | |
| 1795 | if (!nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1796 | return nv_alloc_rx(dev); |
| 1797 | else |
| 1798 | return nv_alloc_rx_optimized(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1799 | } |
| 1800 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1801 | static int nv_release_txskb(struct net_device *dev, struct nv_skb_map* tx_skb) |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1802 | { |
| 1803 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1804 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1805 | if (tx_skb->dma) { |
| 1806 | pci_unmap_page(np->pci_dev, tx_skb->dma, |
| 1807 | tx_skb->dma_len, |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1808 | PCI_DMA_TODEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1809 | tx_skb->dma = 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1810 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1811 | if (tx_skb->skb) { |
| 1812 | dev_kfree_skb_any(tx_skb->skb); |
| 1813 | tx_skb->skb = NULL; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1814 | return 1; |
| 1815 | } else { |
| 1816 | return 0; |
| 1817 | } |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1818 | } |
| 1819 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1820 | static void nv_drain_tx(struct net_device *dev) |
| 1821 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1822 | struct fe_priv *np = netdev_priv(dev); |
| 1823 | unsigned int i; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 1824 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1825 | for (i = 0; i < np->tx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1826 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1827 | np->tx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1828 | np->tx_ring.orig[i].buf = 0; |
| 1829 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1830 | np->tx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1831 | np->tx_ring.ex[i].txvlan = 0; |
| 1832 | np->tx_ring.ex[i].bufhigh = 0; |
| 1833 | np->tx_ring.ex[i].buflow = 0; |
| 1834 | } |
| 1835 | if (nv_release_txskb(dev, &np->tx_skb[i])) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1836 | dev->stats.tx_dropped++; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1837 | np->tx_skb[i].dma = 0; |
| 1838 | np->tx_skb[i].dma_len = 0; |
| 1839 | np->tx_skb[i].first_tx_desc = NULL; |
| 1840 | np->tx_skb[i].next_tx_ctx = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1841 | } |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1842 | np->tx_pkts_in_progress = 0; |
| 1843 | np->tx_change_owner = NULL; |
| 1844 | np->tx_end_flip = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1845 | } |
| 1846 | |
| 1847 | static void nv_drain_rx(struct net_device *dev) |
| 1848 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1849 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1850 | int i; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1851 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1852 | for (i = 0; i < np->rx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1853 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1854 | np->rx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1855 | np->rx_ring.orig[i].buf = 0; |
| 1856 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1857 | np->rx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1858 | np->rx_ring.ex[i].txvlan = 0; |
| 1859 | np->rx_ring.ex[i].bufhigh = 0; |
| 1860 | np->rx_ring.ex[i].buflow = 0; |
| 1861 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1862 | wmb(); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1863 | if (np->rx_skb[i].skb) { |
| 1864 | pci_unmap_single(np->pci_dev, np->rx_skb[i].dma, |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1865 | (skb_end_pointer(np->rx_skb[i].skb) - |
| 1866 | np->rx_skb[i].skb->data), |
| 1867 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1868 | dev_kfree_skb(np->rx_skb[i].skb); |
| 1869 | np->rx_skb[i].skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1870 | } |
| 1871 | } |
| 1872 | } |
| 1873 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1874 | static void nv_drain_rxtx(struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1875 | { |
| 1876 | nv_drain_tx(dev); |
| 1877 | nv_drain_rx(dev); |
| 1878 | } |
| 1879 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1880 | static inline u32 nv_get_empty_tx_slots(struct fe_priv *np) |
| 1881 | { |
| 1882 | return (u32)(np->tx_ring_size - ((np->tx_ring_size + (np->put_tx_ctx - np->get_tx_ctx)) % np->tx_ring_size)); |
| 1883 | } |
| 1884 | |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 1885 | static void nv_legacybackoff_reseed(struct net_device *dev) |
| 1886 | { |
| 1887 | u8 __iomem *base = get_hwbase(dev); |
| 1888 | u32 reg; |
| 1889 | u32 low; |
| 1890 | int tx_status = 0; |
| 1891 | |
| 1892 | reg = readl(base + NvRegSlotTime) & ~NVREG_SLOTTIME_MASK; |
| 1893 | get_random_bytes(&low, sizeof(low)); |
| 1894 | reg |= low & NVREG_SLOTTIME_MASK; |
| 1895 | |
| 1896 | /* Need to stop tx before change takes effect. |
| 1897 | * Caller has already gained np->lock. |
| 1898 | */ |
| 1899 | tx_status = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START; |
| 1900 | if (tx_status) |
| 1901 | nv_stop_tx(dev); |
| 1902 | nv_stop_rx(dev); |
| 1903 | writel(reg, base + NvRegSlotTime); |
| 1904 | if (tx_status) |
| 1905 | nv_start_tx(dev); |
| 1906 | nv_start_rx(dev); |
| 1907 | } |
| 1908 | |
| 1909 | /* Gear Backoff Seeds */ |
| 1910 | #define BACKOFF_SEEDSET_ROWS 8 |
| 1911 | #define BACKOFF_SEEDSET_LFSRS 15 |
| 1912 | |
| 1913 | /* Known Good seed sets */ |
| 1914 | static const u32 main_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = { |
| 1915 | {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874}, |
| 1916 | {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 385, 761, 790, 974}, |
| 1917 | {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874}, |
| 1918 | {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 386, 761, 790, 974}, |
| 1919 | {266, 265, 276, 585, 397, 208, 345, 355, 365, 376, 385, 396, 771, 700, 984}, |
| 1920 | {266, 265, 276, 586, 397, 208, 346, 355, 365, 376, 285, 396, 771, 700, 984}, |
| 1921 | {366, 365, 376, 686, 497, 308, 447, 455, 466, 476, 485, 496, 871, 800, 84}, |
| 1922 | {466, 465, 476, 786, 597, 408, 547, 555, 566, 576, 585, 597, 971, 900, 184}}; |
| 1923 | |
| 1924 | static const u32 gear_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = { |
| 1925 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 1926 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 1927 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 397}, |
| 1928 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 1929 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 1930 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 1931 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 1932 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}}; |
| 1933 | |
| 1934 | static void nv_gear_backoff_reseed(struct net_device *dev) |
| 1935 | { |
| 1936 | u8 __iomem *base = get_hwbase(dev); |
| 1937 | u32 miniseed1, miniseed2, miniseed2_reversed, miniseed3, miniseed3_reversed; |
| 1938 | u32 temp, seedset, combinedSeed; |
| 1939 | int i; |
| 1940 | |
| 1941 | /* Setup seed for free running LFSR */ |
| 1942 | /* We are going to read the time stamp counter 3 times |
| 1943 | and swizzle bits around to increase randomness */ |
| 1944 | get_random_bytes(&miniseed1, sizeof(miniseed1)); |
| 1945 | miniseed1 &= 0x0fff; |
| 1946 | if (miniseed1 == 0) |
| 1947 | miniseed1 = 0xabc; |
| 1948 | |
| 1949 | get_random_bytes(&miniseed2, sizeof(miniseed2)); |
| 1950 | miniseed2 &= 0x0fff; |
| 1951 | if (miniseed2 == 0) |
| 1952 | miniseed2 = 0xabc; |
| 1953 | miniseed2_reversed = |
| 1954 | ((miniseed2 & 0xF00) >> 8) | |
| 1955 | (miniseed2 & 0x0F0) | |
| 1956 | ((miniseed2 & 0x00F) << 8); |
| 1957 | |
| 1958 | get_random_bytes(&miniseed3, sizeof(miniseed3)); |
| 1959 | miniseed3 &= 0x0fff; |
| 1960 | if (miniseed3 == 0) |
| 1961 | miniseed3 = 0xabc; |
| 1962 | miniseed3_reversed = |
| 1963 | ((miniseed3 & 0xF00) >> 8) | |
| 1964 | (miniseed3 & 0x0F0) | |
| 1965 | ((miniseed3 & 0x00F) << 8); |
| 1966 | |
| 1967 | combinedSeed = ((miniseed1 ^ miniseed2_reversed) << 12) | |
| 1968 | (miniseed2 ^ miniseed3_reversed); |
| 1969 | |
| 1970 | /* Seeds can not be zero */ |
| 1971 | if ((combinedSeed & NVREG_BKOFFCTRL_SEED_MASK) == 0) |
| 1972 | combinedSeed |= 0x08; |
| 1973 | if ((combinedSeed & (NVREG_BKOFFCTRL_SEED_MASK << NVREG_BKOFFCTRL_GEAR)) == 0) |
| 1974 | combinedSeed |= 0x8000; |
| 1975 | |
| 1976 | /* No need to disable tx here */ |
| 1977 | temp = NVREG_BKOFFCTRL_DEFAULT | (0 << NVREG_BKOFFCTRL_SELECT); |
| 1978 | temp |= combinedSeed & NVREG_BKOFFCTRL_SEED_MASK; |
| 1979 | temp |= combinedSeed >> NVREG_BKOFFCTRL_GEAR; |
| 1980 | writel(temp,base + NvRegBackOffControl); |
| 1981 | |
| 1982 | /* Setup seeds for all gear LFSRs. */ |
| 1983 | get_random_bytes(&seedset, sizeof(seedset)); |
| 1984 | seedset = seedset % BACKOFF_SEEDSET_ROWS; |
| 1985 | for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; i++) |
| 1986 | { |
| 1987 | temp = NVREG_BKOFFCTRL_DEFAULT | (i << NVREG_BKOFFCTRL_SELECT); |
| 1988 | temp |= main_seedset[seedset][i-1] & 0x3ff; |
| 1989 | temp |= ((gear_seedset[seedset][i-1] & 0x3ff) << NVREG_BKOFFCTRL_GEAR); |
| 1990 | writel(temp, base + NvRegBackOffControl); |
| 1991 | } |
| 1992 | } |
| 1993 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1994 | /* |
| 1995 | * nv_start_xmit: dev->hard_start_xmit function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 1996 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1997 | */ |
| 1998 | static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 1999 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2000 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2001 | u32 tx_flags = 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2002 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); |
| 2003 | unsigned int fragments = skb_shinfo(skb)->nr_frags; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2004 | unsigned int i; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2005 | u32 offset = 0; |
| 2006 | u32 bcnt; |
| 2007 | u32 size = skb->len-skb->data_len; |
| 2008 | u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2009 | u32 empty_slots; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2010 | struct ring_desc* put_tx; |
| 2011 | struct ring_desc* start_tx; |
| 2012 | struct ring_desc* prev_tx; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2013 | struct nv_skb_map* prev_tx_ctx; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2014 | unsigned long flags; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2015 | |
| 2016 | /* add fragments to entries count */ |
| 2017 | for (i = 0; i < fragments; i++) { |
| 2018 | entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) + |
| 2019 | ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2020 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2021 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2022 | empty_slots = nv_get_empty_tx_slots(np); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2023 | if (unlikely(empty_slots <= entries)) { |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2024 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2025 | netif_stop_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2026 | np->tx_stop = 1; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2027 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2028 | return NETDEV_TX_BUSY; |
| 2029 | } |
| 2030 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2031 | start_tx = put_tx = np->put_tx.orig; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2032 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2033 | /* setup the header buffer */ |
| 2034 | do { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2035 | prev_tx = put_tx; |
| 2036 | prev_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2037 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2038 | np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt, |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2039 | PCI_DMA_TODEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2040 | np->put_tx_ctx->dma_len = bcnt; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2041 | put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma); |
| 2042 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2043 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2044 | tx_flags = np->tx_flags; |
| 2045 | offset += bcnt; |
| 2046 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2047 | if (unlikely(put_tx++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2048 | put_tx = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2049 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2050 | np->put_tx_ctx = np->first_tx_ctx; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2051 | } while (size); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2052 | |
| 2053 | /* setup the fragments */ |
| 2054 | for (i = 0; i < fragments; i++) { |
| 2055 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 2056 | u32 size = frag->size; |
| 2057 | offset = 0; |
| 2058 | |
| 2059 | do { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2060 | prev_tx = put_tx; |
| 2061 | prev_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2062 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2063 | np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, |
| 2064 | PCI_DMA_TODEVICE); |
| 2065 | np->put_tx_ctx->dma_len = bcnt; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2066 | put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma); |
| 2067 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2068 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2069 | offset += bcnt; |
| 2070 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2071 | if (unlikely(put_tx++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2072 | put_tx = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2073 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2074 | np->put_tx_ctx = np->first_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2075 | } while (size); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2076 | } |
| 2077 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2078 | /* set last fragment flag */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2079 | prev_tx->flaglen |= cpu_to_le32(tx_flags_extra); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2080 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2081 | /* save skb in this slot's context area */ |
| 2082 | prev_tx_ctx->skb = skb; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2083 | |
Herbert Xu | 89114af | 2006-07-08 13:34:32 -0700 | [diff] [blame] | 2084 | if (skb_is_gso(skb)) |
Herbert Xu | 7967168 | 2006-06-22 02:40:14 -0700 | [diff] [blame] | 2085 | tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT); |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2086 | else |
Arjan van de Ven | 1d39ed5 | 2006-12-12 14:06:23 +0100 | [diff] [blame] | 2087 | tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ? |
Patrick McHardy | 84fa793 | 2006-08-29 16:44:56 -0700 | [diff] [blame] | 2088 | NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2089 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2090 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 164a86e | 2007-01-09 13:30:10 -0500 | [diff] [blame] | 2091 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2092 | /* set tx flags */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2093 | start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra); |
| 2094 | np->put_tx.orig = put_tx; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2095 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2096 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2097 | |
| 2098 | dprintk(KERN_DEBUG "%s: nv_start_xmit: entries %d queued for transmission. tx_flags_extra: %x\n", |
| 2099 | dev->name, entries, tx_flags_extra); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2100 | { |
| 2101 | int j; |
| 2102 | for (j=0; j<64; j++) { |
| 2103 | if ((j%16) == 0) |
| 2104 | dprintk("\n%03x:", j); |
| 2105 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
| 2106 | } |
| 2107 | dprintk("\n"); |
| 2108 | } |
| 2109 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2110 | dev->trans_start = jiffies; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 2111 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2112 | return NETDEV_TX_OK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2113 | } |
| 2114 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2115 | static int nv_start_xmit_optimized(struct sk_buff *skb, struct net_device *dev) |
| 2116 | { |
| 2117 | struct fe_priv *np = netdev_priv(dev); |
| 2118 | u32 tx_flags = 0; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2119 | u32 tx_flags_extra; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2120 | unsigned int fragments = skb_shinfo(skb)->nr_frags; |
| 2121 | unsigned int i; |
| 2122 | u32 offset = 0; |
| 2123 | u32 bcnt; |
| 2124 | u32 size = skb->len-skb->data_len; |
| 2125 | u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2126 | u32 empty_slots; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2127 | struct ring_desc_ex* put_tx; |
| 2128 | struct ring_desc_ex* start_tx; |
| 2129 | struct ring_desc_ex* prev_tx; |
| 2130 | struct nv_skb_map* prev_tx_ctx; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2131 | struct nv_skb_map* start_tx_ctx; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2132 | unsigned long flags; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2133 | |
| 2134 | /* add fragments to entries count */ |
| 2135 | for (i = 0; i < fragments; i++) { |
| 2136 | entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) + |
| 2137 | ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2138 | } |
| 2139 | |
| 2140 | empty_slots = nv_get_empty_tx_slots(np); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2141 | if (unlikely(empty_slots <= entries)) { |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2142 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2143 | netif_stop_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2144 | np->tx_stop = 1; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2145 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2146 | return NETDEV_TX_BUSY; |
| 2147 | } |
| 2148 | |
| 2149 | start_tx = put_tx = np->put_tx.ex; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2150 | start_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2151 | |
| 2152 | /* setup the header buffer */ |
| 2153 | do { |
| 2154 | prev_tx = put_tx; |
| 2155 | prev_tx_ctx = np->put_tx_ctx; |
| 2156 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
| 2157 | np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt, |
| 2158 | PCI_DMA_TODEVICE); |
| 2159 | np->put_tx_ctx->dma_len = bcnt; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 2160 | put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma)); |
| 2161 | put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2162 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2163 | |
| 2164 | tx_flags = NV_TX2_VALID; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2165 | offset += bcnt; |
| 2166 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2167 | if (unlikely(put_tx++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2168 | put_tx = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2169 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2170 | np->put_tx_ctx = np->first_tx_ctx; |
| 2171 | } while (size); |
| 2172 | |
| 2173 | /* setup the fragments */ |
| 2174 | for (i = 0; i < fragments; i++) { |
| 2175 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 2176 | u32 size = frag->size; |
| 2177 | offset = 0; |
| 2178 | |
| 2179 | do { |
| 2180 | prev_tx = put_tx; |
| 2181 | prev_tx_ctx = np->put_tx_ctx; |
| 2182 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
| 2183 | np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, |
| 2184 | PCI_DMA_TODEVICE); |
| 2185 | np->put_tx_ctx->dma_len = bcnt; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 2186 | put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma)); |
| 2187 | put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2188 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2189 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2190 | offset += bcnt; |
| 2191 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2192 | if (unlikely(put_tx++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2193 | put_tx = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2194 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2195 | np->put_tx_ctx = np->first_tx_ctx; |
| 2196 | } while (size); |
| 2197 | } |
| 2198 | |
| 2199 | /* set last fragment flag */ |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2200 | prev_tx->flaglen |= cpu_to_le32(NV_TX2_LASTPACKET); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2201 | |
| 2202 | /* save skb in this slot's context area */ |
| 2203 | prev_tx_ctx->skb = skb; |
| 2204 | |
| 2205 | if (skb_is_gso(skb)) |
| 2206 | tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT); |
| 2207 | else |
| 2208 | tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ? |
| 2209 | NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0; |
| 2210 | |
| 2211 | /* vlan tag */ |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2212 | if (likely(!np->vlangrp)) { |
| 2213 | start_tx->txvlan = 0; |
| 2214 | } else { |
| 2215 | if (vlan_tx_tag_present(skb)) |
| 2216 | start_tx->txvlan = cpu_to_le32(NV_TX3_VLAN_TAG_PRESENT | vlan_tx_tag_get(skb)); |
| 2217 | else |
| 2218 | start_tx->txvlan = 0; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2219 | } |
| 2220 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2221 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2222 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2223 | if (np->tx_limit) { |
| 2224 | /* Limit the number of outstanding tx. Setup all fragments, but |
| 2225 | * do not set the VALID bit on the first descriptor. Save a pointer |
| 2226 | * to that descriptor and also for next skb_map element. |
| 2227 | */ |
| 2228 | |
| 2229 | if (np->tx_pkts_in_progress == NV_TX_LIMIT_COUNT) { |
| 2230 | if (!np->tx_change_owner) |
| 2231 | np->tx_change_owner = start_tx_ctx; |
| 2232 | |
| 2233 | /* remove VALID bit */ |
| 2234 | tx_flags &= ~NV_TX2_VALID; |
| 2235 | start_tx_ctx->first_tx_desc = start_tx; |
| 2236 | start_tx_ctx->next_tx_ctx = np->put_tx_ctx; |
| 2237 | np->tx_end_flip = np->put_tx_ctx; |
| 2238 | } else { |
| 2239 | np->tx_pkts_in_progress++; |
| 2240 | } |
| 2241 | } |
| 2242 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2243 | /* set tx flags */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2244 | start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra); |
| 2245 | np->put_tx.ex = put_tx; |
| 2246 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2247 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2248 | |
| 2249 | dprintk(KERN_DEBUG "%s: nv_start_xmit_optimized: entries %d queued for transmission. tx_flags_extra: %x\n", |
| 2250 | dev->name, entries, tx_flags_extra); |
| 2251 | { |
| 2252 | int j; |
| 2253 | for (j=0; j<64; j++) { |
| 2254 | if ((j%16) == 0) |
| 2255 | dprintk("\n%03x:", j); |
| 2256 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
| 2257 | } |
| 2258 | dprintk("\n"); |
| 2259 | } |
| 2260 | |
| 2261 | dev->trans_start = jiffies; |
| 2262 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2263 | return NETDEV_TX_OK; |
| 2264 | } |
| 2265 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2266 | static inline void nv_tx_flip_ownership(struct net_device *dev) |
| 2267 | { |
| 2268 | struct fe_priv *np = netdev_priv(dev); |
| 2269 | |
| 2270 | np->tx_pkts_in_progress--; |
| 2271 | if (np->tx_change_owner) { |
Al Viro | 30ecce9 | 2008-03-26 05:57:12 +0000 | [diff] [blame] | 2272 | np->tx_change_owner->first_tx_desc->flaglen |= |
| 2273 | cpu_to_le32(NV_TX2_VALID); |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2274 | np->tx_pkts_in_progress++; |
| 2275 | |
| 2276 | np->tx_change_owner = np->tx_change_owner->next_tx_ctx; |
| 2277 | if (np->tx_change_owner == np->tx_end_flip) |
| 2278 | np->tx_change_owner = NULL; |
| 2279 | |
| 2280 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 2281 | } |
| 2282 | } |
| 2283 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2284 | /* |
| 2285 | * nv_tx_done: check for completed packets, release the skbs. |
| 2286 | * |
| 2287 | * Caller must own np->lock. |
| 2288 | */ |
| 2289 | static void nv_tx_done(struct net_device *dev) |
| 2290 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2291 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2292 | u32 flags; |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2293 | struct ring_desc* orig_get_tx = np->get_tx.orig; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2294 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2295 | while ((np->get_tx.orig != np->put_tx.orig) && |
| 2296 | !((flags = le32_to_cpu(np->get_tx.orig->flaglen)) & NV_TX_VALID)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2297 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2298 | dprintk(KERN_DEBUG "%s: nv_tx_done: flags 0x%x.\n", |
| 2299 | dev->name, flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2300 | |
| 2301 | pci_unmap_page(np->pci_dev, np->get_tx_ctx->dma, |
| 2302 | np->get_tx_ctx->dma_len, |
| 2303 | PCI_DMA_TODEVICE); |
| 2304 | np->get_tx_ctx->dma = 0; |
| 2305 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2306 | if (np->desc_ver == DESC_VER_1) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2307 | if (flags & NV_TX_LASTPACKET) { |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2308 | if (flags & NV_TX_ERROR) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2309 | if (flags & NV_TX_UNDERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2310 | dev->stats.tx_fifo_errors++; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2311 | if (flags & NV_TX_CARRIERLOST) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2312 | dev->stats.tx_carrier_errors++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2313 | if ((flags & NV_TX_RETRYERROR) && !(flags & NV_TX_RETRYCOUNT_MASK)) |
| 2314 | nv_legacybackoff_reseed(dev); |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2315 | dev->stats.tx_errors++; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2316 | } else { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2317 | dev->stats.tx_packets++; |
| 2318 | dev->stats.tx_bytes += np->get_tx_ctx->skb->len; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2319 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2320 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2321 | np->get_tx_ctx->skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2322 | } |
| 2323 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2324 | if (flags & NV_TX2_LASTPACKET) { |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2325 | if (flags & NV_TX2_ERROR) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2326 | if (flags & NV_TX2_UNDERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2327 | dev->stats.tx_fifo_errors++; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2328 | if (flags & NV_TX2_CARRIERLOST) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2329 | dev->stats.tx_carrier_errors++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2330 | if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) |
| 2331 | nv_legacybackoff_reseed(dev); |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2332 | dev->stats.tx_errors++; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2333 | } else { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2334 | dev->stats.tx_packets++; |
| 2335 | dev->stats.tx_bytes += np->get_tx_ctx->skb->len; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 2336 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2337 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2338 | np->get_tx_ctx->skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2339 | } |
| 2340 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2341 | if (unlikely(np->get_tx.orig++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2342 | np->get_tx.orig = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2343 | if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2344 | np->get_tx_ctx = np->first_tx_ctx; |
| 2345 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2346 | if (unlikely((np->tx_stop == 1) && (np->get_tx.orig != orig_get_tx))) { |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2347 | np->tx_stop = 0; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2348 | netif_wake_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2349 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2350 | } |
| 2351 | |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 2352 | static void nv_tx_done_optimized(struct net_device *dev, int limit) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2353 | { |
| 2354 | struct fe_priv *np = netdev_priv(dev); |
| 2355 | u32 flags; |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2356 | struct ring_desc_ex* orig_get_tx = np->get_tx.ex; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2357 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2358 | while ((np->get_tx.ex != np->put_tx.ex) && |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 2359 | !((flags = le32_to_cpu(np->get_tx.ex->flaglen)) & NV_TX_VALID) && |
| 2360 | (limit-- > 0)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2361 | |
| 2362 | dprintk(KERN_DEBUG "%s: nv_tx_done_optimized: flags 0x%x.\n", |
| 2363 | dev->name, flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2364 | |
| 2365 | pci_unmap_page(np->pci_dev, np->get_tx_ctx->dma, |
| 2366 | np->get_tx_ctx->dma_len, |
| 2367 | PCI_DMA_TODEVICE); |
| 2368 | np->get_tx_ctx->dma = 0; |
| 2369 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2370 | if (flags & NV_TX2_LASTPACKET) { |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 2371 | if (!(flags & NV_TX2_ERROR)) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2372 | dev->stats.tx_packets++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2373 | else { |
| 2374 | if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) { |
| 2375 | if (np->driver_data & DEV_HAS_GEAR_MODE) |
| 2376 | nv_gear_backoff_reseed(dev); |
| 2377 | else |
| 2378 | nv_legacybackoff_reseed(dev); |
| 2379 | } |
| 2380 | } |
| 2381 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2382 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2383 | np->get_tx_ctx->skb = NULL; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2384 | |
| 2385 | if (np->tx_limit) { |
| 2386 | nv_tx_flip_ownership(dev); |
| 2387 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2388 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2389 | if (unlikely(np->get_tx.ex++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2390 | np->get_tx.ex = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2391 | if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2392 | np->get_tx_ctx = np->first_tx_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2393 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2394 | if (unlikely((np->tx_stop == 1) && (np->get_tx.ex != orig_get_tx))) { |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2395 | np->tx_stop = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2396 | netif_wake_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2397 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2398 | } |
| 2399 | |
| 2400 | /* |
| 2401 | * nv_tx_timeout: dev->tx_timeout function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2402 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2403 | */ |
| 2404 | static void nv_tx_timeout(struct net_device *dev) |
| 2405 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2406 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2407 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 2408 | u32 status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2409 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 2410 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 2411 | status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 2412 | else |
| 2413 | status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 2414 | |
| 2415 | printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2416 | |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2417 | { |
| 2418 | int i; |
| 2419 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2420 | printk(KERN_INFO "%s: Ring at %lx\n", |
| 2421 | dev->name, (unsigned long)np->ring_addr); |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2422 | printk(KERN_INFO "%s: Dumping tx registers\n", dev->name); |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 2423 | for (i=0;i<=np->register_size;i+= 32) { |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2424 | printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n", |
| 2425 | i, |
| 2426 | readl(base + i + 0), readl(base + i + 4), |
| 2427 | readl(base + i + 8), readl(base + i + 12), |
| 2428 | readl(base + i + 16), readl(base + i + 20), |
| 2429 | readl(base + i + 24), readl(base + i + 28)); |
| 2430 | } |
| 2431 | printk(KERN_INFO "%s: Dumping tx ring\n", dev->name); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 2432 | for (i=0;i<np->tx_ring_size;i+= 4) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2433 | if (!nv_optimized(np)) { |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2434 | printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n", |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 2435 | i, |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2436 | le32_to_cpu(np->tx_ring.orig[i].buf), |
| 2437 | le32_to_cpu(np->tx_ring.orig[i].flaglen), |
| 2438 | le32_to_cpu(np->tx_ring.orig[i+1].buf), |
| 2439 | le32_to_cpu(np->tx_ring.orig[i+1].flaglen), |
| 2440 | le32_to_cpu(np->tx_ring.orig[i+2].buf), |
| 2441 | le32_to_cpu(np->tx_ring.orig[i+2].flaglen), |
| 2442 | le32_to_cpu(np->tx_ring.orig[i+3].buf), |
| 2443 | le32_to_cpu(np->tx_ring.orig[i+3].flaglen)); |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2444 | } else { |
| 2445 | printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n", |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 2446 | i, |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2447 | le32_to_cpu(np->tx_ring.ex[i].bufhigh), |
| 2448 | le32_to_cpu(np->tx_ring.ex[i].buflow), |
| 2449 | le32_to_cpu(np->tx_ring.ex[i].flaglen), |
| 2450 | le32_to_cpu(np->tx_ring.ex[i+1].bufhigh), |
| 2451 | le32_to_cpu(np->tx_ring.ex[i+1].buflow), |
| 2452 | le32_to_cpu(np->tx_ring.ex[i+1].flaglen), |
| 2453 | le32_to_cpu(np->tx_ring.ex[i+2].bufhigh), |
| 2454 | le32_to_cpu(np->tx_ring.ex[i+2].buflow), |
| 2455 | le32_to_cpu(np->tx_ring.ex[i+2].flaglen), |
| 2456 | le32_to_cpu(np->tx_ring.ex[i+3].bufhigh), |
| 2457 | le32_to_cpu(np->tx_ring.ex[i+3].buflow), |
| 2458 | le32_to_cpu(np->tx_ring.ex[i+3].flaglen)); |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2459 | } |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2460 | } |
| 2461 | } |
| 2462 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2463 | spin_lock_irq(&np->lock); |
| 2464 | |
| 2465 | /* 1) stop tx engine */ |
| 2466 | nv_stop_tx(dev); |
| 2467 | |
| 2468 | /* 2) check that the packets were not sent already: */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2469 | if (!nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2470 | nv_tx_done(dev); |
| 2471 | else |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 2472 | nv_tx_done_optimized(dev, np->tx_ring_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2473 | |
| 2474 | /* 3) if there are dead entries: clear everything */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2475 | if (np->get_tx_ctx != np->put_tx_ctx) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2476 | printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name); |
| 2477 | nv_drain_tx(dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2478 | nv_init_tx(dev); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 2479 | setup_hw_rings(dev, NV_SETUP_TX_RING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2480 | } |
| 2481 | |
Ayaz Abdulla | 3ba4d09 | 2007-03-23 05:50:02 -0500 | [diff] [blame] | 2482 | netif_wake_queue(dev); |
| 2483 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2484 | /* 4) restart tx engine */ |
| 2485 | nv_start_tx(dev); |
| 2486 | spin_unlock_irq(&np->lock); |
| 2487 | } |
| 2488 | |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2489 | /* |
| 2490 | * Called when the nic notices a mismatch between the actual data len on the |
| 2491 | * wire and the len indicated in the 802 header |
| 2492 | */ |
| 2493 | static int nv_getlen(struct net_device *dev, void *packet, int datalen) |
| 2494 | { |
| 2495 | int hdrlen; /* length of the 802 header */ |
| 2496 | int protolen; /* length as stored in the proto field */ |
| 2497 | |
| 2498 | /* 1) calculate len according to header */ |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2499 | if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) { |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2500 | protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto ); |
| 2501 | hdrlen = VLAN_HLEN; |
| 2502 | } else { |
| 2503 | protolen = ntohs( ((struct ethhdr *)packet)->h_proto); |
| 2504 | hdrlen = ETH_HLEN; |
| 2505 | } |
| 2506 | dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n", |
| 2507 | dev->name, datalen, protolen, hdrlen); |
| 2508 | if (protolen > ETH_DATA_LEN) |
| 2509 | return datalen; /* Value in proto field not a len, no checks possible */ |
| 2510 | |
| 2511 | protolen += hdrlen; |
| 2512 | /* consistency checks: */ |
| 2513 | if (datalen > ETH_ZLEN) { |
| 2514 | if (datalen >= protolen) { |
| 2515 | /* more data on wire than in 802 header, trim of |
| 2516 | * additional data. |
| 2517 | */ |
| 2518 | dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n", |
| 2519 | dev->name, protolen); |
| 2520 | return protolen; |
| 2521 | } else { |
| 2522 | /* less data on wire than mentioned in header. |
| 2523 | * Discard the packet. |
| 2524 | */ |
| 2525 | dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n", |
| 2526 | dev->name); |
| 2527 | return -1; |
| 2528 | } |
| 2529 | } else { |
| 2530 | /* short packet. Accept only if 802 values are also short */ |
| 2531 | if (protolen > ETH_ZLEN) { |
| 2532 | dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n", |
| 2533 | dev->name); |
| 2534 | return -1; |
| 2535 | } |
| 2536 | dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n", |
| 2537 | dev->name, datalen); |
| 2538 | return datalen; |
| 2539 | } |
| 2540 | } |
| 2541 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2542 | static int nv_rx_process(struct net_device *dev, int limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2543 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2544 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2545 | u32 flags; |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2546 | int rx_work = 0; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2547 | struct sk_buff *skb; |
| 2548 | int len; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 2549 | |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2550 | while((np->get_rx.orig != np->put_rx.orig) && |
| 2551 | !((flags = le32_to_cpu(np->get_rx.orig->flaglen)) & NV_RX_AVAIL) && |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2552 | (rx_work < limit)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2553 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2554 | dprintk(KERN_DEBUG "%s: nv_rx_process: flags 0x%x.\n", |
| 2555 | dev->name, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2556 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2557 | /* |
| 2558 | * the packet is for us - immediately tear down the pci mapping. |
| 2559 | * TODO: check if a prefetch of the first cacheline improves |
| 2560 | * the performance. |
| 2561 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2562 | pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma, |
| 2563 | np->get_rx_ctx->dma_len, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2564 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2565 | skb = np->get_rx_ctx->skb; |
| 2566 | np->get_rx_ctx->skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2567 | |
| 2568 | { |
| 2569 | int j; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2570 | dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2571 | for (j=0; j<64; j++) { |
| 2572 | if ((j%16) == 0) |
| 2573 | dprintk("\n%03x:", j); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2574 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2575 | } |
| 2576 | dprintk("\n"); |
| 2577 | } |
| 2578 | /* look at what we actually got: */ |
| 2579 | if (np->desc_ver == DESC_VER_1) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2580 | if (likely(flags & NV_RX_DESCRIPTORVALID)) { |
| 2581 | len = flags & LEN_MASK_V1; |
| 2582 | if (unlikely(flags & NV_RX_ERROR)) { |
| 2583 | if (flags & NV_RX_ERROR4) { |
| 2584 | len = nv_getlen(dev, skb->data, len); |
| 2585 | if (len < 0) { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2586 | dev->stats.rx_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2587 | dev_kfree_skb(skb); |
| 2588 | goto next_pkt; |
| 2589 | } |
| 2590 | } |
| 2591 | /* framing errors are soft errors */ |
| 2592 | else if (flags & NV_RX_FRAMINGERR) { |
| 2593 | if (flags & NV_RX_SUBSTRACT1) { |
| 2594 | len--; |
| 2595 | } |
| 2596 | } |
| 2597 | /* the rest are hard errors */ |
| 2598 | else { |
| 2599 | if (flags & NV_RX_MISSEDFRAME) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2600 | dev->stats.rx_missed_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2601 | if (flags & NV_RX_CRCERR) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2602 | dev->stats.rx_crc_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2603 | if (flags & NV_RX_OVERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2604 | dev->stats.rx_over_errors++; |
| 2605 | dev->stats.rx_errors++; |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2606 | dev_kfree_skb(skb); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 2607 | goto next_pkt; |
| 2608 | } |
| 2609 | } |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2610 | } else { |
| 2611 | dev_kfree_skb(skb); |
| 2612 | goto next_pkt; |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2613 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2614 | } else { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2615 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { |
| 2616 | len = flags & LEN_MASK_V2; |
| 2617 | if (unlikely(flags & NV_RX2_ERROR)) { |
| 2618 | if (flags & NV_RX2_ERROR4) { |
| 2619 | len = nv_getlen(dev, skb->data, len); |
| 2620 | if (len < 0) { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2621 | dev->stats.rx_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2622 | dev_kfree_skb(skb); |
| 2623 | goto next_pkt; |
| 2624 | } |
| 2625 | } |
| 2626 | /* framing errors are soft errors */ |
| 2627 | else if (flags & NV_RX2_FRAMINGERR) { |
| 2628 | if (flags & NV_RX2_SUBSTRACT1) { |
| 2629 | len--; |
| 2630 | } |
| 2631 | } |
| 2632 | /* the rest are hard errors */ |
| 2633 | else { |
| 2634 | if (flags & NV_RX2_CRCERR) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2635 | dev->stats.rx_crc_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2636 | if (flags & NV_RX2_OVERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2637 | dev->stats.rx_over_errors++; |
| 2638 | dev->stats.rx_errors++; |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2639 | dev_kfree_skb(skb); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 2640 | goto next_pkt; |
| 2641 | } |
| 2642 | } |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 2643 | if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */ |
| 2644 | ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */ |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2645 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2646 | } else { |
| 2647 | dev_kfree_skb(skb); |
| 2648 | goto next_pkt; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2649 | } |
| 2650 | } |
| 2651 | /* got a valid packet - forward it to the network core */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2652 | skb_put(skb, len); |
| 2653 | skb->protocol = eth_type_trans(skb, dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2654 | dprintk(KERN_DEBUG "%s: nv_rx_process: %d bytes, proto %d accepted.\n", |
| 2655 | dev->name, len, skb->protocol); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2656 | #ifdef CONFIG_FORCEDETH_NAPI |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2657 | netif_receive_skb(skb); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2658 | #else |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2659 | netif_rx(skb); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2660 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2661 | dev->last_rx = jiffies; |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2662 | dev->stats.rx_packets++; |
| 2663 | dev->stats.rx_bytes += len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2664 | next_pkt: |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2665 | if (unlikely(np->get_rx.orig++ == np->last_rx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2666 | np->get_rx.orig = np->first_rx.orig; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2667 | if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2668 | np->get_rx_ctx = np->first_rx_ctx; |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2669 | |
| 2670 | rx_work++; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2671 | } |
| 2672 | |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2673 | return rx_work; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2674 | } |
| 2675 | |
| 2676 | static int nv_rx_process_optimized(struct net_device *dev, int limit) |
| 2677 | { |
| 2678 | struct fe_priv *np = netdev_priv(dev); |
| 2679 | u32 flags; |
| 2680 | u32 vlanflags = 0; |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2681 | int rx_work = 0; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2682 | struct sk_buff *skb; |
| 2683 | int len; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2684 | |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2685 | while((np->get_rx.ex != np->put_rx.ex) && |
| 2686 | !((flags = le32_to_cpu(np->get_rx.ex->flaglen)) & NV_RX2_AVAIL) && |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2687 | (rx_work < limit)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2688 | |
| 2689 | dprintk(KERN_DEBUG "%s: nv_rx_process_optimized: flags 0x%x.\n", |
| 2690 | dev->name, flags); |
| 2691 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2692 | /* |
| 2693 | * the packet is for us - immediately tear down the pci mapping. |
| 2694 | * TODO: check if a prefetch of the first cacheline improves |
| 2695 | * the performance. |
| 2696 | */ |
| 2697 | pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma, |
| 2698 | np->get_rx_ctx->dma_len, |
| 2699 | PCI_DMA_FROMDEVICE); |
| 2700 | skb = np->get_rx_ctx->skb; |
| 2701 | np->get_rx_ctx->skb = NULL; |
| 2702 | |
| 2703 | { |
| 2704 | int j; |
| 2705 | dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags); |
| 2706 | for (j=0; j<64; j++) { |
| 2707 | if ((j%16) == 0) |
| 2708 | dprintk("\n%03x:", j); |
| 2709 | dprintk(" %02x", ((unsigned char*)skb->data)[j]); |
| 2710 | } |
| 2711 | dprintk("\n"); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2712 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2713 | /* look at what we actually got: */ |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2714 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { |
| 2715 | len = flags & LEN_MASK_V2; |
| 2716 | if (unlikely(flags & NV_RX2_ERROR)) { |
| 2717 | if (flags & NV_RX2_ERROR4) { |
| 2718 | len = nv_getlen(dev, skb->data, len); |
| 2719 | if (len < 0) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2720 | dev_kfree_skb(skb); |
| 2721 | goto next_pkt; |
| 2722 | } |
| 2723 | } |
| 2724 | /* framing errors are soft errors */ |
| 2725 | else if (flags & NV_RX2_FRAMINGERR) { |
| 2726 | if (flags & NV_RX2_SUBSTRACT1) { |
| 2727 | len--; |
| 2728 | } |
| 2729 | } |
| 2730 | /* the rest are hard errors */ |
| 2731 | else { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2732 | dev_kfree_skb(skb); |
| 2733 | goto next_pkt; |
| 2734 | } |
| 2735 | } |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2736 | |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 2737 | if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */ |
| 2738 | ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2739 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2740 | |
| 2741 | /* got a valid packet - forward it to the network core */ |
| 2742 | skb_put(skb, len); |
| 2743 | skb->protocol = eth_type_trans(skb, dev); |
| 2744 | prefetch(skb->data); |
| 2745 | |
| 2746 | dprintk(KERN_DEBUG "%s: nv_rx_process_optimized: %d bytes, proto %d accepted.\n", |
| 2747 | dev->name, len, skb->protocol); |
| 2748 | |
| 2749 | if (likely(!np->vlangrp)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2750 | #ifdef CONFIG_FORCEDETH_NAPI |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2751 | netif_receive_skb(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2752 | #else |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2753 | netif_rx(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2754 | #endif |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2755 | } else { |
| 2756 | vlanflags = le32_to_cpu(np->get_rx.ex->buflow); |
| 2757 | if (vlanflags & NV_RX3_VLAN_TAG_PRESENT) { |
| 2758 | #ifdef CONFIG_FORCEDETH_NAPI |
| 2759 | vlan_hwaccel_receive_skb(skb, np->vlangrp, |
| 2760 | vlanflags & NV_RX3_VLAN_TAG_MASK); |
| 2761 | #else |
| 2762 | vlan_hwaccel_rx(skb, np->vlangrp, |
| 2763 | vlanflags & NV_RX3_VLAN_TAG_MASK); |
| 2764 | #endif |
| 2765 | } else { |
| 2766 | #ifdef CONFIG_FORCEDETH_NAPI |
| 2767 | netif_receive_skb(skb); |
| 2768 | #else |
| 2769 | netif_rx(skb); |
| 2770 | #endif |
| 2771 | } |
| 2772 | } |
| 2773 | |
| 2774 | dev->last_rx = jiffies; |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2775 | dev->stats.rx_packets++; |
| 2776 | dev->stats.rx_bytes += len; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2777 | } else { |
| 2778 | dev_kfree_skb(skb); |
| 2779 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2780 | next_pkt: |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2781 | if (unlikely(np->get_rx.ex++ == np->last_rx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2782 | np->get_rx.ex = np->first_rx.ex; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2783 | if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2784 | np->get_rx_ctx = np->first_rx_ctx; |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2785 | |
| 2786 | rx_work++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2787 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2788 | |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2789 | return rx_work; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2790 | } |
| 2791 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2792 | static void set_bufsize(struct net_device *dev) |
| 2793 | { |
| 2794 | struct fe_priv *np = netdev_priv(dev); |
| 2795 | |
| 2796 | if (dev->mtu <= ETH_DATA_LEN) |
| 2797 | np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS; |
| 2798 | else |
| 2799 | np->rx_buf_sz = dev->mtu + NV_RX_HEADERS; |
| 2800 | } |
| 2801 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2802 | /* |
| 2803 | * nv_change_mtu: dev->change_mtu function |
| 2804 | * Called with dev_base_lock held for read. |
| 2805 | */ |
| 2806 | static int nv_change_mtu(struct net_device *dev, int new_mtu) |
| 2807 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2808 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2809 | int old_mtu; |
| 2810 | |
| 2811 | if (new_mtu < 64 || new_mtu > np->pkt_limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2812 | return -EINVAL; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2813 | |
| 2814 | old_mtu = dev->mtu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2815 | dev->mtu = new_mtu; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2816 | |
| 2817 | /* return early if the buffer sizes will not change */ |
| 2818 | if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN) |
| 2819 | return 0; |
| 2820 | if (old_mtu == new_mtu) |
| 2821 | return 0; |
| 2822 | |
| 2823 | /* synchronized against open : rtnl_lock() held by caller */ |
| 2824 | if (netif_running(dev)) { |
viro@ftp.linux.org.uk | 25097d4 | 2005-09-06 01:36:58 +0100 | [diff] [blame] | 2825 | u8 __iomem *base = get_hwbase(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2826 | /* |
| 2827 | * It seems that the nic preloads valid ring entries into an |
| 2828 | * internal buffer. The procedure for flushing everything is |
| 2829 | * guessed, there is probably a simpler approach. |
| 2830 | * Changing the MTU is a rare event, it shouldn't matter. |
| 2831 | */ |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 2832 | nv_disable_irq(dev); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2833 | netif_tx_lock_bh(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2834 | spin_lock(&np->lock); |
| 2835 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2836 | nv_stop_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2837 | nv_txrx_reset(dev); |
| 2838 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2839 | nv_drain_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2840 | /* reinit driver view of the rx queue */ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2841 | set_bufsize(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 2842 | if (nv_init_ring(dev)) { |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2843 | if (!np->in_shutdown) |
| 2844 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 2845 | } |
| 2846 | /* reinit nic view of the rx queue */ |
| 2847 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 2848 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 2849 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2850 | base + NvRegRingSizes); |
| 2851 | pci_push(base); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 2852 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2853 | pci_push(base); |
| 2854 | |
| 2855 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2856 | nv_start_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2857 | spin_unlock(&np->lock); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2858 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 2859 | nv_enable_irq(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2860 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2861 | return 0; |
| 2862 | } |
| 2863 | |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2864 | static void nv_copy_mac_to_hw(struct net_device *dev) |
| 2865 | { |
viro@ftp.linux.org.uk | 25097d4 | 2005-09-06 01:36:58 +0100 | [diff] [blame] | 2866 | u8 __iomem *base = get_hwbase(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2867 | u32 mac[2]; |
| 2868 | |
| 2869 | mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) + |
| 2870 | (dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24); |
| 2871 | mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8); |
| 2872 | |
| 2873 | writel(mac[0], base + NvRegMacAddrA); |
| 2874 | writel(mac[1], base + NvRegMacAddrB); |
| 2875 | } |
| 2876 | |
| 2877 | /* |
| 2878 | * nv_set_mac_address: dev->set_mac_address function |
| 2879 | * Called with rtnl_lock() held. |
| 2880 | */ |
| 2881 | static int nv_set_mac_address(struct net_device *dev, void *addr) |
| 2882 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2883 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2884 | struct sockaddr *macaddr = (struct sockaddr*)addr; |
| 2885 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2886 | if (!is_valid_ether_addr(macaddr->sa_data)) |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2887 | return -EADDRNOTAVAIL; |
| 2888 | |
| 2889 | /* synchronized against open : rtnl_lock() held by caller */ |
| 2890 | memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN); |
| 2891 | |
| 2892 | if (netif_running(dev)) { |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2893 | netif_tx_lock_bh(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2894 | spin_lock_irq(&np->lock); |
| 2895 | |
| 2896 | /* stop rx engine */ |
| 2897 | nv_stop_rx(dev); |
| 2898 | |
| 2899 | /* set mac address */ |
| 2900 | nv_copy_mac_to_hw(dev); |
| 2901 | |
| 2902 | /* restart rx engine */ |
| 2903 | nv_start_rx(dev); |
| 2904 | spin_unlock_irq(&np->lock); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2905 | netif_tx_unlock_bh(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2906 | } else { |
| 2907 | nv_copy_mac_to_hw(dev); |
| 2908 | } |
| 2909 | return 0; |
| 2910 | } |
| 2911 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2912 | /* |
| 2913 | * nv_set_multicast: dev->set_multicast function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2914 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2915 | */ |
| 2916 | static void nv_set_multicast(struct net_device *dev) |
| 2917 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2918 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2919 | u8 __iomem *base = get_hwbase(dev); |
| 2920 | u32 addr[2]; |
| 2921 | u32 mask[2]; |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2922 | u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2923 | |
| 2924 | memset(addr, 0, sizeof(addr)); |
| 2925 | memset(mask, 0, sizeof(mask)); |
| 2926 | |
| 2927 | if (dev->flags & IFF_PROMISC) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2928 | pff |= NVREG_PFF_PROMISC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2929 | } else { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2930 | pff |= NVREG_PFF_MYADDR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2931 | |
| 2932 | if (dev->flags & IFF_ALLMULTI || dev->mc_list) { |
| 2933 | u32 alwaysOff[2]; |
| 2934 | u32 alwaysOn[2]; |
| 2935 | |
| 2936 | alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff; |
| 2937 | if (dev->flags & IFF_ALLMULTI) { |
| 2938 | alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0; |
| 2939 | } else { |
| 2940 | struct dev_mc_list *walk; |
| 2941 | |
| 2942 | walk = dev->mc_list; |
| 2943 | while (walk != NULL) { |
| 2944 | u32 a, b; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 2945 | a = le32_to_cpu(*(__le32 *) walk->dmi_addr); |
| 2946 | b = le16_to_cpu(*(__le16 *) (&walk->dmi_addr[4])); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2947 | alwaysOn[0] &= a; |
| 2948 | alwaysOff[0] &= ~a; |
| 2949 | alwaysOn[1] &= b; |
| 2950 | alwaysOff[1] &= ~b; |
| 2951 | walk = walk->next; |
| 2952 | } |
| 2953 | } |
| 2954 | addr[0] = alwaysOn[0]; |
| 2955 | addr[1] = alwaysOn[1]; |
| 2956 | mask[0] = alwaysOn[0] | alwaysOff[0]; |
| 2957 | mask[1] = alwaysOn[1] | alwaysOff[1]; |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 2958 | } else { |
| 2959 | mask[0] = NVREG_MCASTMASKA_NONE; |
| 2960 | mask[1] = NVREG_MCASTMASKB_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2961 | } |
| 2962 | } |
| 2963 | addr[0] |= NVREG_MCASTADDRA_FORCE; |
| 2964 | pff |= NVREG_PFF_ALWAYS; |
| 2965 | spin_lock_irq(&np->lock); |
| 2966 | nv_stop_rx(dev); |
| 2967 | writel(addr[0], base + NvRegMulticastAddrA); |
| 2968 | writel(addr[1], base + NvRegMulticastAddrB); |
| 2969 | writel(mask[0], base + NvRegMulticastMaskA); |
| 2970 | writel(mask[1], base + NvRegMulticastMaskB); |
| 2971 | writel(pff, base + NvRegPacketFilterFlags); |
| 2972 | dprintk(KERN_INFO "%s: reconfiguration for multicast lists.\n", |
| 2973 | dev->name); |
| 2974 | nv_start_rx(dev); |
| 2975 | spin_unlock_irq(&np->lock); |
| 2976 | } |
| 2977 | |
Adrian Bunk | c798505 | 2006-06-22 12:03:29 +0200 | [diff] [blame] | 2978 | static void nv_update_pause(struct net_device *dev, u32 pause_flags) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2979 | { |
| 2980 | struct fe_priv *np = netdev_priv(dev); |
| 2981 | u8 __iomem *base = get_hwbase(dev); |
| 2982 | |
| 2983 | np->pause_flags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE); |
| 2984 | |
| 2985 | if (np->pause_flags & NV_PAUSEFRAME_RX_CAPABLE) { |
| 2986 | u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX; |
| 2987 | if (pause_flags & NV_PAUSEFRAME_RX_ENABLE) { |
| 2988 | writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags); |
| 2989 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 2990 | } else { |
| 2991 | writel(pff, base + NvRegPacketFilterFlags); |
| 2992 | } |
| 2993 | } |
| 2994 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) { |
| 2995 | u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX; |
| 2996 | if (pause_flags & NV_PAUSEFRAME_TX_ENABLE) { |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 2997 | u32 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V1; |
| 2998 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) |
| 2999 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V2; |
| 3000 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3) |
| 3001 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V3; |
| 3002 | writel(pause_enable, base + NvRegTxPauseFrame); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3003 | writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1); |
| 3004 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3005 | } else { |
| 3006 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); |
| 3007 | writel(regmisc, base + NvRegMisc1); |
| 3008 | } |
| 3009 | } |
| 3010 | } |
| 3011 | |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3012 | /** |
| 3013 | * nv_update_linkspeed: Setup the MAC according to the link partner |
| 3014 | * @dev: Network device to be configured |
| 3015 | * |
| 3016 | * The function queries the PHY and checks if there is a link partner. |
| 3017 | * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is |
| 3018 | * set to 10 MBit HD. |
| 3019 | * |
| 3020 | * The function returns 0 if there is no link partner and 1 if there is |
| 3021 | * a good link partner. |
| 3022 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3023 | static int nv_update_linkspeed(struct net_device *dev) |
| 3024 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3025 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3026 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3027 | int adv = 0; |
| 3028 | int lpa = 0; |
| 3029 | int adv_lpa, adv_pause, lpa_pause; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3030 | int newls = np->linkspeed; |
| 3031 | int newdup = np->duplex; |
| 3032 | int mii_status; |
| 3033 | int retval = 0; |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3034 | u32 control_1000, status_1000, phyreg, pause_flags, txreg; |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3035 | u32 txrxFlags = 0; |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3036 | u32 phy_exp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3037 | |
| 3038 | /* BMSR_LSTATUS is latched, read it twice: |
| 3039 | * we want the current value. |
| 3040 | */ |
| 3041 | mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 3042 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 3043 | |
| 3044 | if (!(mii_status & BMSR_LSTATUS)) { |
| 3045 | dprintk(KERN_DEBUG "%s: no link detected by phy - falling back to 10HD.\n", |
| 3046 | dev->name); |
| 3047 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3048 | newdup = 0; |
| 3049 | retval = 0; |
| 3050 | goto set_speed; |
| 3051 | } |
| 3052 | |
| 3053 | if (np->autoneg == 0) { |
| 3054 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: autoneg off, PHY set to 0x%04x.\n", |
| 3055 | dev->name, np->fixed_mode); |
| 3056 | if (np->fixed_mode & LPA_100FULL) { |
| 3057 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3058 | newdup = 1; |
| 3059 | } else if (np->fixed_mode & LPA_100HALF) { |
| 3060 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3061 | newdup = 0; |
| 3062 | } else if (np->fixed_mode & LPA_10FULL) { |
| 3063 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3064 | newdup = 1; |
| 3065 | } else { |
| 3066 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3067 | newdup = 0; |
| 3068 | } |
| 3069 | retval = 1; |
| 3070 | goto set_speed; |
| 3071 | } |
| 3072 | /* check auto negotiation is complete */ |
| 3073 | if (!(mii_status & BMSR_ANEGCOMPLETE)) { |
| 3074 | /* still in autonegotiation - configure nic for 10 MBit HD and wait. */ |
| 3075 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3076 | newdup = 0; |
| 3077 | retval = 0; |
| 3078 | dprintk(KERN_DEBUG "%s: autoneg not completed - falling back to 10HD.\n", dev->name); |
| 3079 | goto set_speed; |
| 3080 | } |
| 3081 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3082 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
| 3083 | lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); |
| 3084 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n", |
| 3085 | dev->name, adv, lpa); |
| 3086 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3087 | retval = 1; |
| 3088 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3089 | control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
| 3090 | status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3091 | |
| 3092 | if ((control_1000 & ADVERTISE_1000FULL) && |
| 3093 | (status_1000 & LPA_1000FULL)) { |
| 3094 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: GBit ethernet detected.\n", |
| 3095 | dev->name); |
| 3096 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000; |
| 3097 | newdup = 1; |
| 3098 | goto set_speed; |
| 3099 | } |
| 3100 | } |
| 3101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3102 | /* FIXME: handle parallel detection properly */ |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3103 | adv_lpa = lpa & adv; |
| 3104 | if (adv_lpa & LPA_100FULL) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3105 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3106 | newdup = 1; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3107 | } else if (adv_lpa & LPA_100HALF) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3108 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3109 | newdup = 0; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3110 | } else if (adv_lpa & LPA_10FULL) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3111 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3112 | newdup = 1; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3113 | } else if (adv_lpa & LPA_10HALF) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3114 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3115 | newdup = 0; |
| 3116 | } else { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3117 | dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, adv_lpa); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3118 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3119 | newdup = 0; |
| 3120 | } |
| 3121 | |
| 3122 | set_speed: |
| 3123 | if (np->duplex == newdup && np->linkspeed == newls) |
| 3124 | return retval; |
| 3125 | |
| 3126 | dprintk(KERN_INFO "%s: changing link setting from %d/%d to %d/%d.\n", |
| 3127 | dev->name, np->linkspeed, np->duplex, newls, newdup); |
| 3128 | |
| 3129 | np->duplex = newdup; |
| 3130 | np->linkspeed = newls; |
| 3131 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3132 | /* The transmitter and receiver must be restarted for safe update */ |
| 3133 | if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START) { |
| 3134 | txrxFlags |= NV_RESTART_TX; |
| 3135 | nv_stop_tx(dev); |
| 3136 | } |
| 3137 | if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) { |
| 3138 | txrxFlags |= NV_RESTART_RX; |
| 3139 | nv_stop_rx(dev); |
| 3140 | } |
| 3141 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3142 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3143 | phyreg = readl(base + NvRegSlotTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3144 | phyreg &= ~(0x3FF00); |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3145 | if (((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10) || |
| 3146 | ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100)) |
| 3147 | phyreg |= NVREG_SLOTTIME_10_100_FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3148 | else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3149 | phyreg |= NVREG_SLOTTIME_1000_FULL; |
| 3150 | writel(phyreg, base + NvRegSlotTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3151 | } |
| 3152 | |
| 3153 | phyreg = readl(base + NvRegPhyInterface); |
| 3154 | phyreg &= ~(PHY_HALF|PHY_100|PHY_1000); |
| 3155 | if (np->duplex == 0) |
| 3156 | phyreg |= PHY_HALF; |
| 3157 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100) |
| 3158 | phyreg |= PHY_100; |
| 3159 | else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) |
| 3160 | phyreg |= PHY_1000; |
| 3161 | writel(phyreg, base + NvRegPhyInterface); |
| 3162 | |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3163 | phy_exp = mii_rw(dev, np->phyaddr, MII_EXPANSION, MII_READ) & EXPANSION_NWAY; /* autoneg capable */ |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3164 | if (phyreg & PHY_RGMII) { |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3165 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) { |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3166 | txreg = NVREG_TX_DEFERRAL_RGMII_1000; |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3167 | } else { |
| 3168 | if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX)) { |
| 3169 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_10) |
| 3170 | txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_10; |
| 3171 | else |
| 3172 | txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_100; |
| 3173 | } else { |
| 3174 | txreg = NVREG_TX_DEFERRAL_RGMII_10_100; |
| 3175 | } |
| 3176 | } |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3177 | } else { |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3178 | if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX)) |
| 3179 | txreg = NVREG_TX_DEFERRAL_MII_STRETCH; |
| 3180 | else |
| 3181 | txreg = NVREG_TX_DEFERRAL_DEFAULT; |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3182 | } |
| 3183 | writel(txreg, base + NvRegTxDeferral); |
| 3184 | |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 3185 | if (np->desc_ver == DESC_VER_1) { |
| 3186 | txreg = NVREG_TX_WM_DESC1_DEFAULT; |
| 3187 | } else { |
| 3188 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) |
| 3189 | txreg = NVREG_TX_WM_DESC2_3_1000; |
| 3190 | else |
| 3191 | txreg = NVREG_TX_WM_DESC2_3_DEFAULT; |
| 3192 | } |
| 3193 | writel(txreg, base + NvRegTxWatermark); |
| 3194 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3195 | writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD), |
| 3196 | base + NvRegMisc1); |
| 3197 | pci_push(base); |
| 3198 | writel(np->linkspeed, base + NvRegLinkSpeed); |
| 3199 | pci_push(base); |
| 3200 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3201 | pause_flags = 0; |
| 3202 | /* setup pause frame */ |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3203 | if (np->duplex != 0) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3204 | if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) { |
| 3205 | adv_pause = adv & (ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM); |
| 3206 | lpa_pause = lpa & (LPA_PAUSE_CAP| LPA_PAUSE_ASYM); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3207 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3208 | switch (adv_pause) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3209 | case ADVERTISE_PAUSE_CAP: |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3210 | if (lpa_pause & LPA_PAUSE_CAP) { |
| 3211 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3212 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 3213 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3214 | } |
| 3215 | break; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3216 | case ADVERTISE_PAUSE_ASYM: |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3217 | if (lpa_pause == (LPA_PAUSE_CAP| LPA_PAUSE_ASYM)) |
| 3218 | { |
| 3219 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3220 | } |
| 3221 | break; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3222 | case ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM: |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3223 | if (lpa_pause & LPA_PAUSE_CAP) |
| 3224 | { |
| 3225 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3226 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 3227 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3228 | } |
| 3229 | if (lpa_pause == LPA_PAUSE_ASYM) |
| 3230 | { |
| 3231 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3232 | } |
| 3233 | break; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3234 | } |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3235 | } else { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3236 | pause_flags = np->pause_flags; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3237 | } |
| 3238 | } |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3239 | nv_update_pause(dev, pause_flags); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3240 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3241 | if (txrxFlags & NV_RESTART_TX) |
| 3242 | nv_start_tx(dev); |
| 3243 | if (txrxFlags & NV_RESTART_RX) |
| 3244 | nv_start_rx(dev); |
| 3245 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3246 | return retval; |
| 3247 | } |
| 3248 | |
| 3249 | static void nv_linkchange(struct net_device *dev) |
| 3250 | { |
| 3251 | if (nv_update_linkspeed(dev)) { |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3252 | if (!netif_carrier_ok(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3253 | netif_carrier_on(dev); |
| 3254 | printk(KERN_INFO "%s: link up.\n", dev->name); |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3255 | nv_start_rx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3256 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3257 | } else { |
| 3258 | if (netif_carrier_ok(dev)) { |
| 3259 | netif_carrier_off(dev); |
| 3260 | printk(KERN_INFO "%s: link down.\n", dev->name); |
| 3261 | nv_stop_rx(dev); |
| 3262 | } |
| 3263 | } |
| 3264 | } |
| 3265 | |
| 3266 | static void nv_link_irq(struct net_device *dev) |
| 3267 | { |
| 3268 | u8 __iomem *base = get_hwbase(dev); |
| 3269 | u32 miistat; |
| 3270 | |
| 3271 | miistat = readl(base + NvRegMIIStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 3272 | writel(NVREG_MIISTAT_LINKCHANGE, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3273 | dprintk(KERN_INFO "%s: link change irq, status 0x%x.\n", dev->name, miistat); |
| 3274 | |
| 3275 | if (miistat & (NVREG_MIISTAT_LINKCHANGE)) |
| 3276 | nv_linkchange(dev); |
| 3277 | dprintk(KERN_DEBUG "%s: link change notification done.\n", dev->name); |
| 3278 | } |
| 3279 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3280 | static void nv_msi_workaround(struct fe_priv *np) |
| 3281 | { |
| 3282 | |
| 3283 | /* Need to toggle the msi irq mask within the ethernet device, |
| 3284 | * otherwise, future interrupts will not be detected. |
| 3285 | */ |
| 3286 | if (np->msi_flags & NV_MSI_ENABLED) { |
| 3287 | u8 __iomem *base = np->base; |
| 3288 | |
| 3289 | writel(0, base + NvRegMSIIrqMask); |
| 3290 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); |
| 3291 | } |
| 3292 | } |
| 3293 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3294 | static irqreturn_t nv_nic_irq(int foo, void *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3295 | { |
| 3296 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3297 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3298 | u8 __iomem *base = get_hwbase(dev); |
| 3299 | u32 events; |
| 3300 | int i; |
| 3301 | |
| 3302 | dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name); |
| 3303 | |
| 3304 | for (i=0; ; i++) { |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3305 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3306 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3307 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 3308 | } else { |
| 3309 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3310 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
| 3311 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3312 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); |
| 3313 | if (!(events & np->irqmask)) |
| 3314 | break; |
| 3315 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3316 | nv_msi_workaround(np); |
| 3317 | |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 3318 | spin_lock(&np->lock); |
| 3319 | nv_tx_done(dev); |
| 3320 | spin_unlock(&np->lock); |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3321 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3322 | #ifdef CONFIG_FORCEDETH_NAPI |
| 3323 | if (events & NVREG_IRQ_RX_ALL) { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3324 | netif_rx_schedule(dev, &np->napi); |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3325 | |
| 3326 | /* Disable furthur receive irq's */ |
| 3327 | spin_lock(&np->lock); |
| 3328 | np->irqmask &= ~NVREG_IRQ_RX_ALL; |
| 3329 | |
| 3330 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 3331 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
| 3332 | else |
| 3333 | writel(np->irqmask, base + NvRegIrqMask); |
| 3334 | spin_unlock(&np->lock); |
| 3335 | } |
| 3336 | #else |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3337 | if (nv_rx_process(dev, RX_WORK_PER_LOOP)) { |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3338 | if (unlikely(nv_alloc_rx(dev))) { |
| 3339 | spin_lock(&np->lock); |
| 3340 | if (!np->in_shutdown) |
| 3341 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3342 | spin_unlock(&np->lock); |
| 3343 | } |
| 3344 | } |
| 3345 | #endif |
| 3346 | if (unlikely(events & NVREG_IRQ_LINK)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3347 | spin_lock(&np->lock); |
| 3348 | nv_link_irq(dev); |
| 3349 | spin_unlock(&np->lock); |
| 3350 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3351 | if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3352 | spin_lock(&np->lock); |
| 3353 | nv_linkchange(dev); |
| 3354 | spin_unlock(&np->lock); |
| 3355 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3356 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3357 | if (unlikely(events & (NVREG_IRQ_TX_ERR))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3358 | dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n", |
| 3359 | dev->name, events); |
| 3360 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3361 | if (unlikely(events & (NVREG_IRQ_UNKNOWN))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3362 | printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n", |
| 3363 | dev->name, events); |
| 3364 | } |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3365 | if (unlikely(events & NVREG_IRQ_RECOVER_ERROR)) { |
| 3366 | spin_lock(&np->lock); |
| 3367 | /* disable interrupts on the nic */ |
| 3368 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 3369 | writel(0, base + NvRegIrqMask); |
| 3370 | else |
| 3371 | writel(np->irqmask, base + NvRegIrqMask); |
| 3372 | pci_push(base); |
| 3373 | |
| 3374 | if (!np->in_shutdown) { |
| 3375 | np->nic_poll_irq = np->irqmask; |
| 3376 | np->recover_error = 1; |
| 3377 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3378 | } |
| 3379 | spin_unlock(&np->lock); |
| 3380 | break; |
| 3381 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3382 | if (unlikely(i > max_interrupt_work)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3383 | spin_lock(&np->lock); |
| 3384 | /* disable interrupts on the nic */ |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3385 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 3386 | writel(0, base + NvRegIrqMask); |
| 3387 | else |
| 3388 | writel(np->irqmask, base + NvRegIrqMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3389 | pci_push(base); |
| 3390 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3391 | if (!np->in_shutdown) { |
| 3392 | np->nic_poll_irq = np->irqmask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3393 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3394 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3395 | spin_unlock(&np->lock); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3396 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq.\n", dev->name, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3397 | break; |
| 3398 | } |
| 3399 | |
| 3400 | } |
| 3401 | dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name); |
| 3402 | |
| 3403 | return IRQ_RETVAL(i); |
| 3404 | } |
| 3405 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3406 | /** |
| 3407 | * All _optimized functions are used to help increase performance |
| 3408 | * (reduce CPU and increase throughput). They use descripter version 3, |
| 3409 | * compiler directives, and reduce memory accesses. |
| 3410 | */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3411 | static irqreturn_t nv_nic_irq_optimized(int foo, void *data) |
| 3412 | { |
| 3413 | struct net_device *dev = (struct net_device *) data; |
| 3414 | struct fe_priv *np = netdev_priv(dev); |
| 3415 | u8 __iomem *base = get_hwbase(dev); |
| 3416 | u32 events; |
| 3417 | int i; |
| 3418 | |
| 3419 | dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized\n", dev->name); |
| 3420 | |
| 3421 | for (i=0; ; i++) { |
| 3422 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3423 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3424 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 3425 | } else { |
| 3426 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3427 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
| 3428 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3429 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); |
| 3430 | if (!(events & np->irqmask)) |
| 3431 | break; |
| 3432 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3433 | nv_msi_workaround(np); |
| 3434 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3435 | spin_lock(&np->lock); |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 3436 | nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3437 | spin_unlock(&np->lock); |
| 3438 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3439 | #ifdef CONFIG_FORCEDETH_NAPI |
| 3440 | if (events & NVREG_IRQ_RX_ALL) { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3441 | netif_rx_schedule(dev, &np->napi); |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3442 | |
| 3443 | /* Disable furthur receive irq's */ |
| 3444 | spin_lock(&np->lock); |
| 3445 | np->irqmask &= ~NVREG_IRQ_RX_ALL; |
| 3446 | |
| 3447 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 3448 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
| 3449 | else |
| 3450 | writel(np->irqmask, base + NvRegIrqMask); |
| 3451 | spin_unlock(&np->lock); |
| 3452 | } |
| 3453 | #else |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3454 | if (nv_rx_process_optimized(dev, RX_WORK_PER_LOOP)) { |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3455 | if (unlikely(nv_alloc_rx_optimized(dev))) { |
| 3456 | spin_lock(&np->lock); |
| 3457 | if (!np->in_shutdown) |
| 3458 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3459 | spin_unlock(&np->lock); |
| 3460 | } |
| 3461 | } |
| 3462 | #endif |
| 3463 | if (unlikely(events & NVREG_IRQ_LINK)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3464 | spin_lock(&np->lock); |
| 3465 | nv_link_irq(dev); |
| 3466 | spin_unlock(&np->lock); |
| 3467 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3468 | if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3469 | spin_lock(&np->lock); |
| 3470 | nv_linkchange(dev); |
| 3471 | spin_unlock(&np->lock); |
| 3472 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3473 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3474 | if (unlikely(events & (NVREG_IRQ_TX_ERR))) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3475 | dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n", |
| 3476 | dev->name, events); |
| 3477 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3478 | if (unlikely(events & (NVREG_IRQ_UNKNOWN))) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3479 | printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n", |
| 3480 | dev->name, events); |
| 3481 | } |
| 3482 | if (unlikely(events & NVREG_IRQ_RECOVER_ERROR)) { |
| 3483 | spin_lock(&np->lock); |
| 3484 | /* disable interrupts on the nic */ |
| 3485 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 3486 | writel(0, base + NvRegIrqMask); |
| 3487 | else |
| 3488 | writel(np->irqmask, base + NvRegIrqMask); |
| 3489 | pci_push(base); |
| 3490 | |
| 3491 | if (!np->in_shutdown) { |
| 3492 | np->nic_poll_irq = np->irqmask; |
| 3493 | np->recover_error = 1; |
| 3494 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3495 | } |
| 3496 | spin_unlock(&np->lock); |
| 3497 | break; |
| 3498 | } |
| 3499 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3500 | if (unlikely(i > max_interrupt_work)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3501 | spin_lock(&np->lock); |
| 3502 | /* disable interrupts on the nic */ |
| 3503 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 3504 | writel(0, base + NvRegIrqMask); |
| 3505 | else |
| 3506 | writel(np->irqmask, base + NvRegIrqMask); |
| 3507 | pci_push(base); |
| 3508 | |
| 3509 | if (!np->in_shutdown) { |
| 3510 | np->nic_poll_irq = np->irqmask; |
| 3511 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3512 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3513 | spin_unlock(&np->lock); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3514 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq.\n", dev->name, i); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3515 | break; |
| 3516 | } |
| 3517 | |
| 3518 | } |
| 3519 | dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized completed\n", dev->name); |
| 3520 | |
| 3521 | return IRQ_RETVAL(i); |
| 3522 | } |
| 3523 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3524 | static irqreturn_t nv_nic_irq_tx(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3525 | { |
| 3526 | struct net_device *dev = (struct net_device *) data; |
| 3527 | struct fe_priv *np = netdev_priv(dev); |
| 3528 | u8 __iomem *base = get_hwbase(dev); |
| 3529 | u32 events; |
| 3530 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3531 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3532 | |
| 3533 | dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name); |
| 3534 | |
| 3535 | for (i=0; ; i++) { |
| 3536 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL; |
| 3537 | writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3538 | dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events); |
| 3539 | if (!(events & np->irqmask)) |
| 3540 | break; |
| 3541 | |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3542 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 3543 | nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3544 | spin_unlock_irqrestore(&np->lock, flags); |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3545 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3546 | if (unlikely(events & (NVREG_IRQ_TX_ERR))) { |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3547 | dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n", |
| 3548 | dev->name, events); |
| 3549 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3550 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3551 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3552 | /* disable interrupts on the nic */ |
| 3553 | writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask); |
| 3554 | pci_push(base); |
| 3555 | |
| 3556 | if (!np->in_shutdown) { |
| 3557 | np->nic_poll_irq |= NVREG_IRQ_TX_ALL; |
| 3558 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3559 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3560 | spin_unlock_irqrestore(&np->lock, flags); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3561 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3562 | break; |
| 3563 | } |
| 3564 | |
| 3565 | } |
| 3566 | dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name); |
| 3567 | |
| 3568 | return IRQ_RETVAL(i); |
| 3569 | } |
| 3570 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3571 | #ifdef CONFIG_FORCEDETH_NAPI |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3572 | static int nv_napi_poll(struct napi_struct *napi, int budget) |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3573 | { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3574 | struct fe_priv *np = container_of(napi, struct fe_priv, napi); |
| 3575 | struct net_device *dev = np->dev; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3576 | u8 __iomem *base = get_hwbase(dev); |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3577 | unsigned long flags; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3578 | int pkts, retcode; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3579 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3580 | if (!nv_optimized(np)) { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3581 | pkts = nv_rx_process(dev, budget); |
Ayaz Abdulla | e0379a1 | 2007-02-20 03:34:30 -0500 | [diff] [blame] | 3582 | retcode = nv_alloc_rx(dev); |
| 3583 | } else { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3584 | pkts = nv_rx_process_optimized(dev, budget); |
Ayaz Abdulla | e0379a1 | 2007-02-20 03:34:30 -0500 | [diff] [blame] | 3585 | retcode = nv_alloc_rx_optimized(dev); |
| 3586 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3587 | |
Ayaz Abdulla | e0379a1 | 2007-02-20 03:34:30 -0500 | [diff] [blame] | 3588 | if (retcode) { |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3589 | spin_lock_irqsave(&np->lock, flags); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3590 | if (!np->in_shutdown) |
| 3591 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3592 | spin_unlock_irqrestore(&np->lock, flags); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3593 | } |
| 3594 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3595 | if (pkts < budget) { |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3596 | /* re-enable receive interrupts */ |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3597 | spin_lock_irqsave(&np->lock, flags); |
| 3598 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3599 | __netif_rx_complete(dev, napi); |
| 3600 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3601 | np->irqmask |= NVREG_IRQ_RX_ALL; |
| 3602 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 3603 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
| 3604 | else |
| 3605 | writel(np->irqmask, base + NvRegIrqMask); |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3606 | |
| 3607 | spin_unlock_irqrestore(&np->lock, flags); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3608 | } |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3609 | return pkts; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3610 | } |
| 3611 | #endif |
| 3612 | |
| 3613 | #ifdef CONFIG_FORCEDETH_NAPI |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3614 | static irqreturn_t nv_nic_irq_rx(int foo, void *data) |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3615 | { |
| 3616 | struct net_device *dev = (struct net_device *) data; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3617 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3618 | u8 __iomem *base = get_hwbase(dev); |
| 3619 | u32 events; |
| 3620 | |
| 3621 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL; |
| 3622 | writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus); |
| 3623 | |
| 3624 | if (events) { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3625 | netif_rx_schedule(dev, &np->napi); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3626 | /* disable receive interrupts on the nic */ |
| 3627 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
| 3628 | pci_push(base); |
| 3629 | } |
| 3630 | return IRQ_HANDLED; |
| 3631 | } |
| 3632 | #else |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3633 | static irqreturn_t nv_nic_irq_rx(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3634 | { |
| 3635 | struct net_device *dev = (struct net_device *) data; |
| 3636 | struct fe_priv *np = netdev_priv(dev); |
| 3637 | u8 __iomem *base = get_hwbase(dev); |
| 3638 | u32 events; |
| 3639 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3640 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3641 | |
| 3642 | dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name); |
| 3643 | |
| 3644 | for (i=0; ; i++) { |
| 3645 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL; |
| 3646 | writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3647 | dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events); |
| 3648 | if (!(events & np->irqmask)) |
| 3649 | break; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3650 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3651 | if (nv_rx_process_optimized(dev, RX_WORK_PER_LOOP)) { |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3652 | if (unlikely(nv_alloc_rx_optimized(dev))) { |
| 3653 | spin_lock_irqsave(&np->lock, flags); |
| 3654 | if (!np->in_shutdown) |
| 3655 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3656 | spin_unlock_irqrestore(&np->lock, flags); |
| 3657 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3658 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3659 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3660 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3661 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3662 | /* disable interrupts on the nic */ |
| 3663 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
| 3664 | pci_push(base); |
| 3665 | |
| 3666 | if (!np->in_shutdown) { |
| 3667 | np->nic_poll_irq |= NVREG_IRQ_RX_ALL; |
| 3668 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3669 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3670 | spin_unlock_irqrestore(&np->lock, flags); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3671 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3672 | break; |
| 3673 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3674 | } |
| 3675 | dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name); |
| 3676 | |
| 3677 | return IRQ_RETVAL(i); |
| 3678 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3679 | #endif |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3680 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3681 | static irqreturn_t nv_nic_irq_other(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3682 | { |
| 3683 | struct net_device *dev = (struct net_device *) data; |
| 3684 | struct fe_priv *np = netdev_priv(dev); |
| 3685 | u8 __iomem *base = get_hwbase(dev); |
| 3686 | u32 events; |
| 3687 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3688 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3689 | |
| 3690 | dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name); |
| 3691 | |
| 3692 | for (i=0; ; i++) { |
| 3693 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER; |
| 3694 | writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3695 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); |
| 3696 | if (!(events & np->irqmask)) |
| 3697 | break; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3698 | |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 3699 | /* check tx in case we reached max loop limit in tx isr */ |
| 3700 | spin_lock_irqsave(&np->lock, flags); |
| 3701 | nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
| 3702 | spin_unlock_irqrestore(&np->lock, flags); |
| 3703 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3704 | if (events & NVREG_IRQ_LINK) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3705 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3706 | nv_link_irq(dev); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3707 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3708 | } |
| 3709 | if (np->need_linktimer && time_after(jiffies, np->link_timeout)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3710 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3711 | nv_linkchange(dev); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3712 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3713 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3714 | } |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3715 | if (events & NVREG_IRQ_RECOVER_ERROR) { |
| 3716 | spin_lock_irq(&np->lock); |
| 3717 | /* disable interrupts on the nic */ |
| 3718 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); |
| 3719 | pci_push(base); |
| 3720 | |
| 3721 | if (!np->in_shutdown) { |
| 3722 | np->nic_poll_irq |= NVREG_IRQ_OTHER; |
| 3723 | np->recover_error = 1; |
| 3724 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3725 | } |
| 3726 | spin_unlock_irq(&np->lock); |
| 3727 | break; |
| 3728 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3729 | if (events & (NVREG_IRQ_UNKNOWN)) { |
| 3730 | printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n", |
| 3731 | dev->name, events); |
| 3732 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3733 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3734 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3735 | /* disable interrupts on the nic */ |
| 3736 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); |
| 3737 | pci_push(base); |
| 3738 | |
| 3739 | if (!np->in_shutdown) { |
| 3740 | np->nic_poll_irq |= NVREG_IRQ_OTHER; |
| 3741 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3742 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3743 | spin_unlock_irqrestore(&np->lock, flags); |
Timo Jantunen | 1a2b733 | 2007-08-14 21:56:57 +0300 | [diff] [blame] | 3744 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3745 | break; |
| 3746 | } |
| 3747 | |
| 3748 | } |
| 3749 | dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name); |
| 3750 | |
| 3751 | return IRQ_RETVAL(i); |
| 3752 | } |
| 3753 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3754 | static irqreturn_t nv_nic_irq_test(int foo, void *data) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3755 | { |
| 3756 | struct net_device *dev = (struct net_device *) data; |
| 3757 | struct fe_priv *np = netdev_priv(dev); |
| 3758 | u8 __iomem *base = get_hwbase(dev); |
| 3759 | u32 events; |
| 3760 | |
| 3761 | dprintk(KERN_DEBUG "%s: nv_nic_irq_test\n", dev->name); |
| 3762 | |
| 3763 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3764 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3765 | writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus); |
| 3766 | } else { |
| 3767 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3768 | writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus); |
| 3769 | } |
| 3770 | pci_push(base); |
| 3771 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); |
| 3772 | if (!(events & NVREG_IRQ_TIMER)) |
| 3773 | return IRQ_RETVAL(0); |
| 3774 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3775 | nv_msi_workaround(np); |
| 3776 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3777 | spin_lock(&np->lock); |
| 3778 | np->intr_test = 1; |
| 3779 | spin_unlock(&np->lock); |
| 3780 | |
| 3781 | dprintk(KERN_DEBUG "%s: nv_nic_irq_test completed\n", dev->name); |
| 3782 | |
| 3783 | return IRQ_RETVAL(1); |
| 3784 | } |
| 3785 | |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3786 | static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask) |
| 3787 | { |
| 3788 | u8 __iomem *base = get_hwbase(dev); |
| 3789 | int i; |
| 3790 | u32 msixmap = 0; |
| 3791 | |
| 3792 | /* Each interrupt bit can be mapped to a MSIX vector (4 bits). |
| 3793 | * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents |
| 3794 | * the remaining 8 interrupts. |
| 3795 | */ |
| 3796 | for (i = 0; i < 8; i++) { |
| 3797 | if ((irqmask >> i) & 0x1) { |
| 3798 | msixmap |= vector << (i << 2); |
| 3799 | } |
| 3800 | } |
| 3801 | writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0); |
| 3802 | |
| 3803 | msixmap = 0; |
| 3804 | for (i = 0; i < 8; i++) { |
| 3805 | if ((irqmask >> (i + 8)) & 0x1) { |
| 3806 | msixmap |= vector << (i << 2); |
| 3807 | } |
| 3808 | } |
| 3809 | writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1); |
| 3810 | } |
| 3811 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3812 | static int nv_request_irq(struct net_device *dev, int intr_test) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3813 | { |
| 3814 | struct fe_priv *np = get_nvpriv(dev); |
| 3815 | u8 __iomem *base = get_hwbase(dev); |
| 3816 | int ret = 1; |
| 3817 | int i; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3818 | irqreturn_t (*handler)(int foo, void *data); |
| 3819 | |
| 3820 | if (intr_test) { |
| 3821 | handler = nv_nic_irq_test; |
| 3822 | } else { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3823 | if (nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3824 | handler = nv_nic_irq_optimized; |
| 3825 | else |
| 3826 | handler = nv_nic_irq; |
| 3827 | } |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3828 | |
| 3829 | if (np->msi_flags & NV_MSI_X_CAPABLE) { |
| 3830 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { |
| 3831 | np->msi_x_entry[i].entry = i; |
| 3832 | } |
| 3833 | if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) { |
| 3834 | np->msi_flags |= NV_MSI_X_ENABLED; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3835 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3836 | /* Request irq for rx handling */ |
Thomas Gleixner | 1fb9df5 | 2006-07-01 19:29:39 -0700 | [diff] [blame] | 3837 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, IRQF_SHARED, dev->name, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3838 | printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret); |
| 3839 | pci_disable_msix(np->pci_dev); |
| 3840 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3841 | goto out_err; |
| 3842 | } |
| 3843 | /* Request irq for tx handling */ |
Thomas Gleixner | 1fb9df5 | 2006-07-01 19:29:39 -0700 | [diff] [blame] | 3844 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, IRQF_SHARED, dev->name, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3845 | printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret); |
| 3846 | pci_disable_msix(np->pci_dev); |
| 3847 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3848 | goto out_free_rx; |
| 3849 | } |
| 3850 | /* Request irq for link and timer handling */ |
Thomas Gleixner | 1fb9df5 | 2006-07-01 19:29:39 -0700 | [diff] [blame] | 3851 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, IRQF_SHARED, dev->name, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3852 | printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret); |
| 3853 | pci_disable_msix(np->pci_dev); |
| 3854 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3855 | goto out_free_tx; |
| 3856 | } |
| 3857 | /* map interrupts to their respective vector */ |
| 3858 | writel(0, base + NvRegMSIXMap0); |
| 3859 | writel(0, base + NvRegMSIXMap1); |
| 3860 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL); |
| 3861 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL); |
| 3862 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER); |
| 3863 | } else { |
| 3864 | /* Request irq for all interrupts */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3865 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, handler, IRQF_SHARED, dev->name, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3866 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); |
| 3867 | pci_disable_msix(np->pci_dev); |
| 3868 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3869 | goto out_err; |
| 3870 | } |
| 3871 | |
| 3872 | /* map interrupts to vector 0 */ |
| 3873 | writel(0, base + NvRegMSIXMap0); |
| 3874 | writel(0, base + NvRegMSIXMap1); |
| 3875 | } |
| 3876 | } |
| 3877 | } |
| 3878 | if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) { |
| 3879 | if ((ret = pci_enable_msi(np->pci_dev)) == 0) { |
| 3880 | np->msi_flags |= NV_MSI_ENABLED; |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3881 | dev->irq = np->pci_dev->irq; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3882 | if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3883 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); |
| 3884 | pci_disable_msi(np->pci_dev); |
| 3885 | np->msi_flags &= ~NV_MSI_ENABLED; |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3886 | dev->irq = np->pci_dev->irq; |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3887 | goto out_err; |
| 3888 | } |
| 3889 | |
| 3890 | /* map interrupts to vector 0 */ |
| 3891 | writel(0, base + NvRegMSIMap0); |
| 3892 | writel(0, base + NvRegMSIMap1); |
| 3893 | /* enable msi vector 0 */ |
| 3894 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); |
| 3895 | } |
| 3896 | } |
| 3897 | if (ret != 0) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3898 | if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3899 | goto out_err; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3900 | |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3901 | } |
| 3902 | |
| 3903 | return 0; |
| 3904 | out_free_tx: |
| 3905 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev); |
| 3906 | out_free_rx: |
| 3907 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev); |
| 3908 | out_err: |
| 3909 | return 1; |
| 3910 | } |
| 3911 | |
| 3912 | static void nv_free_irq(struct net_device *dev) |
| 3913 | { |
| 3914 | struct fe_priv *np = get_nvpriv(dev); |
| 3915 | int i; |
| 3916 | |
| 3917 | if (np->msi_flags & NV_MSI_X_ENABLED) { |
| 3918 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { |
| 3919 | free_irq(np->msi_x_entry[i].vector, dev); |
| 3920 | } |
| 3921 | pci_disable_msix(np->pci_dev); |
| 3922 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3923 | } else { |
| 3924 | free_irq(np->pci_dev->irq, dev); |
| 3925 | if (np->msi_flags & NV_MSI_ENABLED) { |
| 3926 | pci_disable_msi(np->pci_dev); |
| 3927 | np->msi_flags &= ~NV_MSI_ENABLED; |
| 3928 | } |
| 3929 | } |
| 3930 | } |
| 3931 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3932 | static void nv_do_nic_poll(unsigned long data) |
| 3933 | { |
| 3934 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3935 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3936 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3937 | u32 mask = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3938 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3939 | /* |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3940 | * First disable irq(s) and then |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3941 | * reenable interrupts on the nic, we have to do this before calling |
| 3942 | * nv_nic_irq because that may decide to do otherwise |
| 3943 | */ |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3944 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 3945 | if (!using_multi_irqs(dev)) { |
| 3946 | if (np->msi_flags & NV_MSI_X_ENABLED) |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3947 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 3948 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3949 | disable_irq_lockdep(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3950 | mask = np->irqmask; |
| 3951 | } else { |
| 3952 | if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3953 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3954 | mask |= NVREG_IRQ_RX_ALL; |
| 3955 | } |
| 3956 | if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3957 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3958 | mask |= NVREG_IRQ_TX_ALL; |
| 3959 | } |
| 3960 | if (np->nic_poll_irq & NVREG_IRQ_OTHER) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3961 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3962 | mask |= NVREG_IRQ_OTHER; |
| 3963 | } |
| 3964 | } |
| 3965 | np->nic_poll_irq = 0; |
| 3966 | |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3967 | /* disable_irq() contains synchronize_irq, thus no irq handler can run now */ |
| 3968 | |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3969 | if (np->recover_error) { |
| 3970 | np->recover_error = 0; |
| 3971 | printk(KERN_INFO "forcedeth: MAC in recoverable error state\n"); |
| 3972 | if (netif_running(dev)) { |
| 3973 | netif_tx_lock_bh(dev); |
| 3974 | spin_lock(&np->lock); |
| 3975 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3976 | nv_stop_rxtx(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3977 | nv_txrx_reset(dev); |
| 3978 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3979 | nv_drain_rxtx(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3980 | /* reinit driver view of the rx queue */ |
| 3981 | set_bufsize(dev); |
| 3982 | if (nv_init_ring(dev)) { |
| 3983 | if (!np->in_shutdown) |
| 3984 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3985 | } |
| 3986 | /* reinit nic view of the rx queue */ |
| 3987 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 3988 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 3989 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 3990 | base + NvRegRingSizes); |
| 3991 | pci_push(base); |
| 3992 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 3993 | pci_push(base); |
| 3994 | |
| 3995 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3996 | nv_start_rxtx(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3997 | spin_unlock(&np->lock); |
| 3998 | netif_tx_unlock_bh(dev); |
| 3999 | } |
| 4000 | } |
| 4001 | |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 4002 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4003 | writel(mask, base + NvRegIrqMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4004 | pci_push(base); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4005 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4006 | if (!using_multi_irqs(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4007 | if (nv_optimized(np)) |
Ayaz Abdulla | fcc5f26 | 2007-03-23 05:49:37 -0500 | [diff] [blame] | 4008 | nv_nic_irq_optimized(0, dev); |
| 4009 | else |
| 4010 | nv_nic_irq(0, dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4011 | if (np->msi_flags & NV_MSI_X_ENABLED) |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4012 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 4013 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 4014 | enable_irq_lockdep(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4015 | } else { |
| 4016 | if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) { |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 4017 | nv_nic_irq_rx(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4018 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4019 | } |
| 4020 | if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) { |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 4021 | nv_nic_irq_tx(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4022 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4023 | } |
| 4024 | if (np->nic_poll_irq & NVREG_IRQ_OTHER) { |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 4025 | nv_nic_irq_other(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 4026 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4027 | } |
| 4028 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4029 | } |
| 4030 | |
Michal Schmidt | 2918c35 | 2005-05-12 19:42:06 -0400 | [diff] [blame] | 4031 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 4032 | static void nv_poll_controller(struct net_device *dev) |
| 4033 | { |
| 4034 | nv_do_nic_poll((unsigned long) dev); |
| 4035 | } |
| 4036 | #endif |
| 4037 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4038 | static void nv_do_stats_poll(unsigned long data) |
| 4039 | { |
| 4040 | struct net_device *dev = (struct net_device *) data; |
| 4041 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4042 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 4043 | nv_get_hw_stats(dev); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4044 | |
| 4045 | if (!np->in_shutdown) |
Daniel Drake | bfebbb8 | 2008-03-18 11:07:18 +0000 | [diff] [blame] | 4046 | mod_timer(&np->stats_poll, |
| 4047 | round_jiffies(jiffies + STATS_INTERVAL)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4048 | } |
| 4049 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4050 | static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
| 4051 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4052 | struct fe_priv *np = netdev_priv(dev); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 4053 | strcpy(info->driver, DRV_NAME); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4054 | strcpy(info->version, FORCEDETH_VERSION); |
| 4055 | strcpy(info->bus_info, pci_name(np->pci_dev)); |
| 4056 | } |
| 4057 | |
| 4058 | static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) |
| 4059 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4060 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4061 | wolinfo->supported = WAKE_MAGIC; |
| 4062 | |
| 4063 | spin_lock_irq(&np->lock); |
| 4064 | if (np->wolenabled) |
| 4065 | wolinfo->wolopts = WAKE_MAGIC; |
| 4066 | spin_unlock_irq(&np->lock); |
| 4067 | } |
| 4068 | |
| 4069 | static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) |
| 4070 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4071 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4072 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4073 | u32 flags = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4074 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4075 | if (wolinfo->wolopts == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4076 | np->wolenabled = 0; |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4077 | } else if (wolinfo->wolopts & WAKE_MAGIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4078 | np->wolenabled = 1; |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4079 | flags = NVREG_WAKEUPFLAGS_ENABLE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4080 | } |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 4081 | if (netif_running(dev)) { |
| 4082 | spin_lock_irq(&np->lock); |
| 4083 | writel(flags, base + NvRegWakeUpFlags); |
| 4084 | spin_unlock_irq(&np->lock); |
| 4085 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4086 | return 0; |
| 4087 | } |
| 4088 | |
| 4089 | static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 4090 | { |
| 4091 | struct fe_priv *np = netdev_priv(dev); |
| 4092 | int adv; |
| 4093 | |
| 4094 | spin_lock_irq(&np->lock); |
| 4095 | ecmd->port = PORT_MII; |
| 4096 | if (!netif_running(dev)) { |
| 4097 | /* We do not track link speed / duplex setting if the |
| 4098 | * interface is disabled. Force a link check */ |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4099 | if (nv_update_linkspeed(dev)) { |
| 4100 | if (!netif_carrier_ok(dev)) |
| 4101 | netif_carrier_on(dev); |
| 4102 | } else { |
| 4103 | if (netif_carrier_ok(dev)) |
| 4104 | netif_carrier_off(dev); |
| 4105 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4106 | } |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4107 | |
| 4108 | if (netif_carrier_ok(dev)) { |
| 4109 | switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4110 | case NVREG_LINKSPEED_10: |
| 4111 | ecmd->speed = SPEED_10; |
| 4112 | break; |
| 4113 | case NVREG_LINKSPEED_100: |
| 4114 | ecmd->speed = SPEED_100; |
| 4115 | break; |
| 4116 | case NVREG_LINKSPEED_1000: |
| 4117 | ecmd->speed = SPEED_1000; |
| 4118 | break; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4119 | } |
| 4120 | ecmd->duplex = DUPLEX_HALF; |
| 4121 | if (np->duplex) |
| 4122 | ecmd->duplex = DUPLEX_FULL; |
| 4123 | } else { |
| 4124 | ecmd->speed = -1; |
| 4125 | ecmd->duplex = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4126 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4127 | |
| 4128 | ecmd->autoneg = np->autoneg; |
| 4129 | |
| 4130 | ecmd->advertising = ADVERTISED_MII; |
| 4131 | if (np->autoneg) { |
| 4132 | ecmd->advertising |= ADVERTISED_Autoneg; |
| 4133 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4134 | if (adv & ADVERTISE_10HALF) |
| 4135 | ecmd->advertising |= ADVERTISED_10baseT_Half; |
| 4136 | if (adv & ADVERTISE_10FULL) |
| 4137 | ecmd->advertising |= ADVERTISED_10baseT_Full; |
| 4138 | if (adv & ADVERTISE_100HALF) |
| 4139 | ecmd->advertising |= ADVERTISED_100baseT_Half; |
| 4140 | if (adv & ADVERTISE_100FULL) |
| 4141 | ecmd->advertising |= ADVERTISED_100baseT_Full; |
| 4142 | if (np->gigabit == PHY_GIGABIT) { |
| 4143 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
| 4144 | if (adv & ADVERTISE_1000FULL) |
| 4145 | ecmd->advertising |= ADVERTISED_1000baseT_Full; |
| 4146 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4147 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4148 | ecmd->supported = (SUPPORTED_Autoneg | |
| 4149 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | |
| 4150 | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | |
| 4151 | SUPPORTED_MII); |
| 4152 | if (np->gigabit == PHY_GIGABIT) |
| 4153 | ecmd->supported |= SUPPORTED_1000baseT_Full; |
| 4154 | |
| 4155 | ecmd->phy_address = np->phyaddr; |
| 4156 | ecmd->transceiver = XCVR_EXTERNAL; |
| 4157 | |
| 4158 | /* ignore maxtxpkt, maxrxpkt for now */ |
| 4159 | spin_unlock_irq(&np->lock); |
| 4160 | return 0; |
| 4161 | } |
| 4162 | |
| 4163 | static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 4164 | { |
| 4165 | struct fe_priv *np = netdev_priv(dev); |
| 4166 | |
| 4167 | if (ecmd->port != PORT_MII) |
| 4168 | return -EINVAL; |
| 4169 | if (ecmd->transceiver != XCVR_EXTERNAL) |
| 4170 | return -EINVAL; |
| 4171 | if (ecmd->phy_address != np->phyaddr) { |
| 4172 | /* TODO: support switching between multiple phys. Should be |
| 4173 | * trivial, but not enabled due to lack of test hardware. */ |
| 4174 | return -EINVAL; |
| 4175 | } |
| 4176 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 4177 | u32 mask; |
| 4178 | |
| 4179 | mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | |
| 4180 | ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; |
| 4181 | if (np->gigabit == PHY_GIGABIT) |
| 4182 | mask |= ADVERTISED_1000baseT_Full; |
| 4183 | |
| 4184 | if ((ecmd->advertising & mask) == 0) |
| 4185 | return -EINVAL; |
| 4186 | |
| 4187 | } else if (ecmd->autoneg == AUTONEG_DISABLE) { |
| 4188 | /* Note: autonegotiation disable, speed 1000 intentionally |
| 4189 | * forbidden - noone should need that. */ |
| 4190 | |
| 4191 | if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100) |
| 4192 | return -EINVAL; |
| 4193 | if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL) |
| 4194 | return -EINVAL; |
| 4195 | } else { |
| 4196 | return -EINVAL; |
| 4197 | } |
| 4198 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4199 | netif_carrier_off(dev); |
| 4200 | if (netif_running(dev)) { |
| 4201 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4202 | netif_tx_lock_bh(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4203 | spin_lock(&np->lock); |
| 4204 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4205 | nv_stop_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4206 | spin_unlock(&np->lock); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4207 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4208 | } |
| 4209 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4210 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 4211 | int adv, bmcr; |
| 4212 | |
| 4213 | np->autoneg = 1; |
| 4214 | |
| 4215 | /* advertise only what has been requested */ |
| 4216 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4217 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4218 | if (ecmd->advertising & ADVERTISED_10baseT_Half) |
| 4219 | adv |= ADVERTISE_10HALF; |
| 4220 | if (ecmd->advertising & ADVERTISED_10baseT_Full) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4221 | adv |= ADVERTISE_10FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4222 | if (ecmd->advertising & ADVERTISED_100baseT_Half) |
| 4223 | adv |= ADVERTISE_100HALF; |
| 4224 | if (ecmd->advertising & ADVERTISED_100baseT_Full) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4225 | adv |= ADVERTISE_100FULL; |
| 4226 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */ |
| 4227 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4228 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 4229 | adv |= ADVERTISE_PAUSE_ASYM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4230 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4231 | |
| 4232 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4233 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4234 | adv &= ~ADVERTISE_1000FULL; |
| 4235 | if (ecmd->advertising & ADVERTISED_1000baseT_Full) |
| 4236 | adv |= ADVERTISE_1000FULL; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4237 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4238 | } |
| 4239 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4240 | if (netif_running(dev)) |
| 4241 | printk(KERN_INFO "%s: link down.\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4242 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4243 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 4244 | bmcr |= BMCR_ANENABLE; |
| 4245 | /* reset the phy in order for settings to stick, |
| 4246 | * and cause autoneg to start */ |
| 4247 | if (phy_reset(dev, bmcr)) { |
| 4248 | printk(KERN_INFO "%s: phy reset failed\n", dev->name); |
| 4249 | return -EINVAL; |
| 4250 | } |
| 4251 | } else { |
| 4252 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4253 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4254 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4255 | } else { |
| 4256 | int adv, bmcr; |
| 4257 | |
| 4258 | np->autoneg = 0; |
| 4259 | |
| 4260 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4261 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4262 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF) |
| 4263 | adv |= ADVERTISE_10HALF; |
| 4264 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4265 | adv |= ADVERTISE_10FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4266 | if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF) |
| 4267 | adv |= ADVERTISE_100HALF; |
| 4268 | if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4269 | adv |= ADVERTISE_100FULL; |
| 4270 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); |
| 4271 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) {/* for rx we set both advertisments but disable tx pause */ |
| 4272 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4273 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 4274 | } |
| 4275 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) { |
| 4276 | adv |= ADVERTISE_PAUSE_ASYM; |
| 4277 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 4278 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4279 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4280 | np->fixed_mode = adv; |
| 4281 | |
| 4282 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4283 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4284 | adv &= ~ADVERTISE_1000FULL; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4285 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4286 | } |
| 4287 | |
| 4288 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4289 | bmcr &= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_SPEED1000|BMCR_FULLDPLX); |
| 4290 | if (np->fixed_mode & (ADVERTISE_10FULL|ADVERTISE_100FULL)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4291 | bmcr |= BMCR_FULLDPLX; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4292 | if (np->fixed_mode & (ADVERTISE_100HALF|ADVERTISE_100FULL)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4293 | bmcr |= BMCR_SPEED100; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4294 | if (np->phy_oui == PHY_OUI_MARVELL) { |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4295 | /* reset the phy in order for forced mode settings to stick */ |
| 4296 | if (phy_reset(dev, bmcr)) { |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4297 | printk(KERN_INFO "%s: phy reset failed\n", dev->name); |
| 4298 | return -EINVAL; |
| 4299 | } |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4300 | } else { |
| 4301 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4302 | if (netif_running(dev)) { |
| 4303 | /* Wait a bit and then reconfigure the nic. */ |
| 4304 | udelay(10); |
| 4305 | nv_linkchange(dev); |
| 4306 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4307 | } |
| 4308 | } |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4309 | |
| 4310 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4311 | nv_start_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4312 | nv_enable_irq(dev); |
| 4313 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4314 | |
| 4315 | return 0; |
| 4316 | } |
| 4317 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4318 | #define FORCEDETH_REGS_VER 1 |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4319 | |
| 4320 | static int nv_get_regs_len(struct net_device *dev) |
| 4321 | { |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 4322 | struct fe_priv *np = netdev_priv(dev); |
| 4323 | return np->register_size; |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4324 | } |
| 4325 | |
| 4326 | static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf) |
| 4327 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4328 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4329 | u8 __iomem *base = get_hwbase(dev); |
| 4330 | u32 *rbuf = buf; |
| 4331 | int i; |
| 4332 | |
| 4333 | regs->version = FORCEDETH_REGS_VER; |
| 4334 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 4335 | for (i = 0;i <= np->register_size/sizeof(u32); i++) |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4336 | rbuf[i] = readl(base + i*sizeof(u32)); |
| 4337 | spin_unlock_irq(&np->lock); |
| 4338 | } |
| 4339 | |
| 4340 | static int nv_nway_reset(struct net_device *dev) |
| 4341 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4342 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4343 | int ret; |
| 4344 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4345 | if (np->autoneg) { |
| 4346 | int bmcr; |
| 4347 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4348 | netif_carrier_off(dev); |
| 4349 | if (netif_running(dev)) { |
| 4350 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4351 | netif_tx_lock_bh(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4352 | spin_lock(&np->lock); |
| 4353 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4354 | nv_stop_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4355 | spin_unlock(&np->lock); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4356 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4357 | printk(KERN_INFO "%s: link down.\n", dev->name); |
| 4358 | } |
| 4359 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4360 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4361 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 4362 | bmcr |= BMCR_ANENABLE; |
| 4363 | /* reset the phy in order for settings to stick*/ |
| 4364 | if (phy_reset(dev, bmcr)) { |
| 4365 | printk(KERN_INFO "%s: phy reset failed\n", dev->name); |
| 4366 | return -EINVAL; |
| 4367 | } |
| 4368 | } else { |
| 4369 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4370 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4371 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4372 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4373 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4374 | nv_start_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4375 | nv_enable_irq(dev); |
| 4376 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4377 | ret = 0; |
| 4378 | } else { |
| 4379 | ret = -EINVAL; |
| 4380 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4381 | |
| 4382 | return ret; |
| 4383 | } |
| 4384 | |
Zachary Amsden | 0674d59 | 2006-06-04 02:51:38 -0700 | [diff] [blame] | 4385 | static int nv_set_tso(struct net_device *dev, u32 value) |
| 4386 | { |
| 4387 | struct fe_priv *np = netdev_priv(dev); |
| 4388 | |
| 4389 | if ((np->driver_data & DEV_HAS_CHECKSUM)) |
| 4390 | return ethtool_op_set_tso(dev, value); |
| 4391 | else |
Ayaz Abdulla | 6a78814 | 2006-06-10 22:47:26 -0400 | [diff] [blame] | 4392 | return -EOPNOTSUPP; |
Zachary Amsden | 0674d59 | 2006-06-04 02:51:38 -0700 | [diff] [blame] | 4393 | } |
Zachary Amsden | 0674d59 | 2006-06-04 02:51:38 -0700 | [diff] [blame] | 4394 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4395 | static void nv_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) |
| 4396 | { |
| 4397 | struct fe_priv *np = netdev_priv(dev); |
| 4398 | |
| 4399 | ring->rx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; |
| 4400 | ring->rx_mini_max_pending = 0; |
| 4401 | ring->rx_jumbo_max_pending = 0; |
| 4402 | ring->tx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; |
| 4403 | |
| 4404 | ring->rx_pending = np->rx_ring_size; |
| 4405 | ring->rx_mini_pending = 0; |
| 4406 | ring->rx_jumbo_pending = 0; |
| 4407 | ring->tx_pending = np->tx_ring_size; |
| 4408 | } |
| 4409 | |
| 4410 | static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) |
| 4411 | { |
| 4412 | struct fe_priv *np = netdev_priv(dev); |
| 4413 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4414 | u8 *rxtx_ring, *rx_skbuff, *tx_skbuff; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4415 | dma_addr_t ring_addr; |
| 4416 | |
| 4417 | if (ring->rx_pending < RX_RING_MIN || |
| 4418 | ring->tx_pending < TX_RING_MIN || |
| 4419 | ring->rx_mini_pending != 0 || |
| 4420 | ring->rx_jumbo_pending != 0 || |
| 4421 | (np->desc_ver == DESC_VER_1 && |
| 4422 | (ring->rx_pending > RING_MAX_DESC_VER_1 || |
| 4423 | ring->tx_pending > RING_MAX_DESC_VER_1)) || |
| 4424 | (np->desc_ver != DESC_VER_1 && |
| 4425 | (ring->rx_pending > RING_MAX_DESC_VER_2_3 || |
| 4426 | ring->tx_pending > RING_MAX_DESC_VER_2_3))) { |
| 4427 | return -EINVAL; |
| 4428 | } |
| 4429 | |
| 4430 | /* allocate new rings */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4431 | if (!nv_optimized(np)) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4432 | rxtx_ring = pci_alloc_consistent(np->pci_dev, |
| 4433 | sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), |
| 4434 | &ring_addr); |
| 4435 | } else { |
| 4436 | rxtx_ring = pci_alloc_consistent(np->pci_dev, |
| 4437 | sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), |
| 4438 | &ring_addr); |
| 4439 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4440 | rx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->rx_pending, GFP_KERNEL); |
| 4441 | tx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->tx_pending, GFP_KERNEL); |
| 4442 | if (!rxtx_ring || !rx_skbuff || !tx_skbuff) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4443 | /* fall back to old rings */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4444 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4445 | if (rxtx_ring) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4446 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), |
| 4447 | rxtx_ring, ring_addr); |
| 4448 | } else { |
| 4449 | if (rxtx_ring) |
| 4450 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), |
| 4451 | rxtx_ring, ring_addr); |
| 4452 | } |
| 4453 | if (rx_skbuff) |
| 4454 | kfree(rx_skbuff); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4455 | if (tx_skbuff) |
| 4456 | kfree(tx_skbuff); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4457 | goto exit; |
| 4458 | } |
| 4459 | |
| 4460 | if (netif_running(dev)) { |
| 4461 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4462 | netif_tx_lock_bh(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4463 | spin_lock(&np->lock); |
| 4464 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4465 | nv_stop_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4466 | nv_txrx_reset(dev); |
| 4467 | /* drain queues */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4468 | nv_drain_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4469 | /* delete queues */ |
| 4470 | free_rings(dev); |
| 4471 | } |
| 4472 | |
| 4473 | /* set new values */ |
| 4474 | np->rx_ring_size = ring->rx_pending; |
| 4475 | np->tx_ring_size = ring->tx_pending; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4476 | |
| 4477 | if (!nv_optimized(np)) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4478 | np->rx_ring.orig = (struct ring_desc*)rxtx_ring; |
| 4479 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; |
| 4480 | } else { |
| 4481 | np->rx_ring.ex = (struct ring_desc_ex*)rxtx_ring; |
| 4482 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
| 4483 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4484 | np->rx_skb = (struct nv_skb_map*)rx_skbuff; |
| 4485 | np->tx_skb = (struct nv_skb_map*)tx_skbuff; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4486 | np->ring_addr = ring_addr; |
| 4487 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4488 | memset(np->rx_skb, 0, sizeof(struct nv_skb_map) * np->rx_ring_size); |
| 4489 | memset(np->tx_skb, 0, sizeof(struct nv_skb_map) * np->tx_ring_size); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4490 | |
| 4491 | if (netif_running(dev)) { |
| 4492 | /* reinit driver view of the queues */ |
| 4493 | set_bufsize(dev); |
| 4494 | if (nv_init_ring(dev)) { |
| 4495 | if (!np->in_shutdown) |
| 4496 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 4497 | } |
| 4498 | |
| 4499 | /* reinit nic view of the queues */ |
| 4500 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4501 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 4502 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 4503 | base + NvRegRingSizes); |
| 4504 | pci_push(base); |
| 4505 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4506 | pci_push(base); |
| 4507 | |
| 4508 | /* restart engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4509 | nv_start_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4510 | spin_unlock(&np->lock); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4511 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4512 | nv_enable_irq(dev); |
| 4513 | } |
| 4514 | return 0; |
| 4515 | exit: |
| 4516 | return -ENOMEM; |
| 4517 | } |
| 4518 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4519 | static void nv_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) |
| 4520 | { |
| 4521 | struct fe_priv *np = netdev_priv(dev); |
| 4522 | |
| 4523 | pause->autoneg = (np->pause_flags & NV_PAUSEFRAME_AUTONEG) != 0; |
| 4524 | pause->rx_pause = (np->pause_flags & NV_PAUSEFRAME_RX_ENABLE) != 0; |
| 4525 | pause->tx_pause = (np->pause_flags & NV_PAUSEFRAME_TX_ENABLE) != 0; |
| 4526 | } |
| 4527 | |
| 4528 | static int nv_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) |
| 4529 | { |
| 4530 | struct fe_priv *np = netdev_priv(dev); |
| 4531 | int adv, bmcr; |
| 4532 | |
| 4533 | if ((!np->autoneg && np->duplex == 0) || |
| 4534 | (np->autoneg && !pause->autoneg && np->duplex == 0)) { |
| 4535 | printk(KERN_INFO "%s: can not set pause settings when forced link is in half duplex.\n", |
| 4536 | dev->name); |
| 4537 | return -EINVAL; |
| 4538 | } |
| 4539 | if (pause->tx_pause && !(np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)) { |
| 4540 | printk(KERN_INFO "%s: hardware does not support tx pause frames.\n", dev->name); |
| 4541 | return -EINVAL; |
| 4542 | } |
| 4543 | |
| 4544 | netif_carrier_off(dev); |
| 4545 | if (netif_running(dev)) { |
| 4546 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4547 | netif_tx_lock_bh(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4548 | spin_lock(&np->lock); |
| 4549 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4550 | nv_stop_rxtx(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4551 | spin_unlock(&np->lock); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4552 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4553 | } |
| 4554 | |
| 4555 | np->pause_flags &= ~(NV_PAUSEFRAME_RX_REQ|NV_PAUSEFRAME_TX_REQ); |
| 4556 | if (pause->rx_pause) |
| 4557 | np->pause_flags |= NV_PAUSEFRAME_RX_REQ; |
| 4558 | if (pause->tx_pause) |
| 4559 | np->pause_flags |= NV_PAUSEFRAME_TX_REQ; |
| 4560 | |
| 4561 | if (np->autoneg && pause->autoneg) { |
| 4562 | np->pause_flags |= NV_PAUSEFRAME_AUTONEG; |
| 4563 | |
| 4564 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
| 4565 | adv &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
| 4566 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */ |
| 4567 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4568 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 4569 | adv |= ADVERTISE_PAUSE_ASYM; |
| 4570 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4571 | |
| 4572 | if (netif_running(dev)) |
| 4573 | printk(KERN_INFO "%s: link down.\n", dev->name); |
| 4574 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 4575 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4576 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4577 | } else { |
| 4578 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); |
| 4579 | if (pause->rx_pause) |
| 4580 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 4581 | if (pause->tx_pause) |
| 4582 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 4583 | |
| 4584 | if (!netif_running(dev)) |
| 4585 | nv_update_linkspeed(dev); |
| 4586 | else |
| 4587 | nv_update_pause(dev, np->pause_flags); |
| 4588 | } |
| 4589 | |
| 4590 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4591 | nv_start_rxtx(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4592 | nv_enable_irq(dev); |
| 4593 | } |
| 4594 | return 0; |
| 4595 | } |
| 4596 | |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4597 | static u32 nv_get_rx_csum(struct net_device *dev) |
| 4598 | { |
| 4599 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 4600 | return (np->rx_csum) != 0; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4601 | } |
| 4602 | |
| 4603 | static int nv_set_rx_csum(struct net_device *dev, u32 data) |
| 4604 | { |
| 4605 | struct fe_priv *np = netdev_priv(dev); |
| 4606 | u8 __iomem *base = get_hwbase(dev); |
| 4607 | int retcode = 0; |
| 4608 | |
| 4609 | if (np->driver_data & DEV_HAS_CHECKSUM) { |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4610 | if (data) { |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 4611 | np->rx_csum = 1; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4612 | np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4613 | } else { |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 4614 | np->rx_csum = 0; |
| 4615 | /* vlan is dependent on rx checksum offload */ |
| 4616 | if (!(np->vlanctl_bits & NVREG_VLANCONTROL_ENABLE)) |
| 4617 | np->txrxctl_bits &= ~NVREG_TXRXCTL_RXCHECK; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4618 | } |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4619 | if (netif_running(dev)) { |
| 4620 | spin_lock_irq(&np->lock); |
| 4621 | writel(np->txrxctl_bits, base + NvRegTxRxControl); |
| 4622 | spin_unlock_irq(&np->lock); |
| 4623 | } |
| 4624 | } else { |
| 4625 | return -EINVAL; |
| 4626 | } |
| 4627 | |
| 4628 | return retcode; |
| 4629 | } |
| 4630 | |
| 4631 | static int nv_set_tx_csum(struct net_device *dev, u32 data) |
| 4632 | { |
| 4633 | struct fe_priv *np = netdev_priv(dev); |
| 4634 | |
| 4635 | if (np->driver_data & DEV_HAS_CHECKSUM) |
| 4636 | return ethtool_op_set_tx_hw_csum(dev, data); |
| 4637 | else |
| 4638 | return -EOPNOTSUPP; |
| 4639 | } |
| 4640 | |
| 4641 | static int nv_set_sg(struct net_device *dev, u32 data) |
| 4642 | { |
| 4643 | struct fe_priv *np = netdev_priv(dev); |
| 4644 | |
| 4645 | if (np->driver_data & DEV_HAS_CHECKSUM) |
| 4646 | return ethtool_op_set_sg(dev, data); |
| 4647 | else |
| 4648 | return -EOPNOTSUPP; |
| 4649 | } |
| 4650 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4651 | static int nv_get_sset_count(struct net_device *dev, int sset) |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4652 | { |
| 4653 | struct fe_priv *np = netdev_priv(dev); |
| 4654 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4655 | switch (sset) { |
| 4656 | case ETH_SS_TEST: |
| 4657 | if (np->driver_data & DEV_HAS_TEST_EXTENDED) |
| 4658 | return NV_TEST_COUNT_EXTENDED; |
| 4659 | else |
| 4660 | return NV_TEST_COUNT_BASE; |
| 4661 | case ETH_SS_STATS: |
| 4662 | if (np->driver_data & DEV_HAS_STATISTICS_V1) |
| 4663 | return NV_DEV_STATISTICS_V1_COUNT; |
| 4664 | else if (np->driver_data & DEV_HAS_STATISTICS_V2) |
| 4665 | return NV_DEV_STATISTICS_V2_COUNT; |
| 4666 | else |
| 4667 | return 0; |
| 4668 | default: |
| 4669 | return -EOPNOTSUPP; |
| 4670 | } |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4671 | } |
| 4672 | |
| 4673 | static void nv_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *buffer) |
| 4674 | { |
| 4675 | struct fe_priv *np = netdev_priv(dev); |
| 4676 | |
| 4677 | /* update stats */ |
| 4678 | nv_do_stats_poll((unsigned long)dev); |
| 4679 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4680 | memcpy(buffer, &np->estats, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(u64)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4681 | } |
| 4682 | |
| 4683 | static int nv_link_test(struct net_device *dev) |
| 4684 | { |
| 4685 | struct fe_priv *np = netdev_priv(dev); |
| 4686 | int mii_status; |
| 4687 | |
| 4688 | mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 4689 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 4690 | |
| 4691 | /* check phy link status */ |
| 4692 | if (!(mii_status & BMSR_LSTATUS)) |
| 4693 | return 0; |
| 4694 | else |
| 4695 | return 1; |
| 4696 | } |
| 4697 | |
| 4698 | static int nv_register_test(struct net_device *dev) |
| 4699 | { |
| 4700 | u8 __iomem *base = get_hwbase(dev); |
| 4701 | int i = 0; |
| 4702 | u32 orig_read, new_read; |
| 4703 | |
| 4704 | do { |
| 4705 | orig_read = readl(base + nv_registers_test[i].reg); |
| 4706 | |
| 4707 | /* xor with mask to toggle bits */ |
| 4708 | orig_read ^= nv_registers_test[i].mask; |
| 4709 | |
| 4710 | writel(orig_read, base + nv_registers_test[i].reg); |
| 4711 | |
| 4712 | new_read = readl(base + nv_registers_test[i].reg); |
| 4713 | |
| 4714 | if ((new_read & nv_registers_test[i].mask) != (orig_read & nv_registers_test[i].mask)) |
| 4715 | return 0; |
| 4716 | |
| 4717 | /* restore original value */ |
| 4718 | orig_read ^= nv_registers_test[i].mask; |
| 4719 | writel(orig_read, base + nv_registers_test[i].reg); |
| 4720 | |
| 4721 | } while (nv_registers_test[++i].reg != 0); |
| 4722 | |
| 4723 | return 1; |
| 4724 | } |
| 4725 | |
| 4726 | static int nv_interrupt_test(struct net_device *dev) |
| 4727 | { |
| 4728 | struct fe_priv *np = netdev_priv(dev); |
| 4729 | u8 __iomem *base = get_hwbase(dev); |
| 4730 | int ret = 1; |
| 4731 | int testcnt; |
| 4732 | u32 save_msi_flags, save_poll_interval = 0; |
| 4733 | |
| 4734 | if (netif_running(dev)) { |
| 4735 | /* free current irq */ |
| 4736 | nv_free_irq(dev); |
| 4737 | save_poll_interval = readl(base+NvRegPollingInterval); |
| 4738 | } |
| 4739 | |
| 4740 | /* flag to test interrupt handler */ |
| 4741 | np->intr_test = 0; |
| 4742 | |
| 4743 | /* setup test irq */ |
| 4744 | save_msi_flags = np->msi_flags; |
| 4745 | np->msi_flags &= ~NV_MSI_X_VECTORS_MASK; |
| 4746 | np->msi_flags |= 0x001; /* setup 1 vector */ |
| 4747 | if (nv_request_irq(dev, 1)) |
| 4748 | return 0; |
| 4749 | |
| 4750 | /* setup timer interrupt */ |
| 4751 | writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval); |
| 4752 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 4753 | |
| 4754 | nv_enable_hw_interrupts(dev, NVREG_IRQ_TIMER); |
| 4755 | |
| 4756 | /* wait for at least one interrupt */ |
| 4757 | msleep(100); |
| 4758 | |
| 4759 | spin_lock_irq(&np->lock); |
| 4760 | |
| 4761 | /* flag should be set within ISR */ |
| 4762 | testcnt = np->intr_test; |
| 4763 | if (!testcnt) |
| 4764 | ret = 2; |
| 4765 | |
| 4766 | nv_disable_hw_interrupts(dev, NVREG_IRQ_TIMER); |
| 4767 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 4768 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 4769 | else |
| 4770 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
| 4771 | |
| 4772 | spin_unlock_irq(&np->lock); |
| 4773 | |
| 4774 | nv_free_irq(dev); |
| 4775 | |
| 4776 | np->msi_flags = save_msi_flags; |
| 4777 | |
| 4778 | if (netif_running(dev)) { |
| 4779 | writel(save_poll_interval, base + NvRegPollingInterval); |
| 4780 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 4781 | /* restore original irq */ |
| 4782 | if (nv_request_irq(dev, 0)) |
| 4783 | return 0; |
| 4784 | } |
| 4785 | |
| 4786 | return ret; |
| 4787 | } |
| 4788 | |
| 4789 | static int nv_loopback_test(struct net_device *dev) |
| 4790 | { |
| 4791 | struct fe_priv *np = netdev_priv(dev); |
| 4792 | u8 __iomem *base = get_hwbase(dev); |
| 4793 | struct sk_buff *tx_skb, *rx_skb; |
| 4794 | dma_addr_t test_dma_addr; |
| 4795 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4796 | u32 flags; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4797 | int len, i, pkt_len; |
| 4798 | u8 *pkt_data; |
| 4799 | u32 filter_flags = 0; |
| 4800 | u32 misc1_flags = 0; |
| 4801 | int ret = 1; |
| 4802 | |
| 4803 | if (netif_running(dev)) { |
| 4804 | nv_disable_irq(dev); |
| 4805 | filter_flags = readl(base + NvRegPacketFilterFlags); |
| 4806 | misc1_flags = readl(base + NvRegMisc1); |
| 4807 | } else { |
| 4808 | nv_txrx_reset(dev); |
| 4809 | } |
| 4810 | |
| 4811 | /* reinit driver view of the rx queue */ |
| 4812 | set_bufsize(dev); |
| 4813 | nv_init_ring(dev); |
| 4814 | |
| 4815 | /* setup hardware for loopback */ |
| 4816 | writel(NVREG_MISC1_FORCE, base + NvRegMisc1); |
| 4817 | writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags); |
| 4818 | |
| 4819 | /* reinit nic view of the rx queue */ |
| 4820 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4821 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 4822 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 4823 | base + NvRegRingSizes); |
| 4824 | pci_push(base); |
| 4825 | |
| 4826 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4827 | nv_start_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4828 | |
| 4829 | /* setup packet for tx */ |
| 4830 | pkt_len = ETH_DATA_LEN; |
| 4831 | tx_skb = dev_alloc_skb(pkt_len); |
Jesper Juhl | 46798c8 | 2006-09-25 16:39:24 -0700 | [diff] [blame] | 4832 | if (!tx_skb) { |
| 4833 | printk(KERN_ERR "dev_alloc_skb() failed during loopback test" |
| 4834 | " of %s\n", dev->name); |
| 4835 | ret = 0; |
| 4836 | goto out; |
| 4837 | } |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 4838 | test_dma_addr = pci_map_single(np->pci_dev, tx_skb->data, |
| 4839 | skb_tailroom(tx_skb), |
| 4840 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4841 | pkt_data = skb_put(tx_skb, pkt_len); |
| 4842 | for (i = 0; i < pkt_len; i++) |
| 4843 | pkt_data[i] = (u8)(i & 0xff); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4844 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4845 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4846 | np->tx_ring.orig[0].buf = cpu_to_le32(test_dma_addr); |
| 4847 | np->tx_ring.orig[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4848 | } else { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 4849 | np->tx_ring.ex[0].bufhigh = cpu_to_le32(dma_high(test_dma_addr)); |
| 4850 | np->tx_ring.ex[0].buflow = cpu_to_le32(dma_low(test_dma_addr)); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4851 | np->tx_ring.ex[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4852 | } |
| 4853 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4854 | pci_push(get_hwbase(dev)); |
| 4855 | |
| 4856 | msleep(500); |
| 4857 | |
| 4858 | /* check for rx of the packet */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4859 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4860 | flags = le32_to_cpu(np->rx_ring.orig[0].flaglen); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4861 | len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver); |
| 4862 | |
| 4863 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4864 | flags = le32_to_cpu(np->rx_ring.ex[0].flaglen); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4865 | len = nv_descr_getlength_ex(&np->rx_ring.ex[0], np->desc_ver); |
| 4866 | } |
| 4867 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4868 | if (flags & NV_RX_AVAIL) { |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4869 | ret = 0; |
| 4870 | } else if (np->desc_ver == DESC_VER_1) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4871 | if (flags & NV_RX_ERROR) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4872 | ret = 0; |
| 4873 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4874 | if (flags & NV_RX2_ERROR) { |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4875 | ret = 0; |
| 4876 | } |
| 4877 | } |
| 4878 | |
| 4879 | if (ret) { |
| 4880 | if (len != pkt_len) { |
| 4881 | ret = 0; |
| 4882 | dprintk(KERN_DEBUG "%s: loopback len mismatch %d vs %d\n", |
| 4883 | dev->name, len, pkt_len); |
| 4884 | } else { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4885 | rx_skb = np->rx_skb[0].skb; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4886 | for (i = 0; i < pkt_len; i++) { |
| 4887 | if (rx_skb->data[i] != (u8)(i & 0xff)) { |
| 4888 | ret = 0; |
| 4889 | dprintk(KERN_DEBUG "%s: loopback pattern check failed on byte %d\n", |
| 4890 | dev->name, i); |
| 4891 | break; |
| 4892 | } |
| 4893 | } |
| 4894 | } |
| 4895 | } else { |
| 4896 | dprintk(KERN_DEBUG "%s: loopback - did not receive test packet\n", dev->name); |
| 4897 | } |
| 4898 | |
| 4899 | pci_unmap_page(np->pci_dev, test_dma_addr, |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 4900 | (skb_end_pointer(tx_skb) - tx_skb->data), |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4901 | PCI_DMA_TODEVICE); |
| 4902 | dev_kfree_skb_any(tx_skb); |
Jesper Juhl | 46798c8 | 2006-09-25 16:39:24 -0700 | [diff] [blame] | 4903 | out: |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4904 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4905 | nv_stop_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4906 | nv_txrx_reset(dev); |
| 4907 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4908 | nv_drain_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4909 | |
| 4910 | if (netif_running(dev)) { |
| 4911 | writel(misc1_flags, base + NvRegMisc1); |
| 4912 | writel(filter_flags, base + NvRegPacketFilterFlags); |
| 4913 | nv_enable_irq(dev); |
| 4914 | } |
| 4915 | |
| 4916 | return ret; |
| 4917 | } |
| 4918 | |
| 4919 | static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64 *buffer) |
| 4920 | { |
| 4921 | struct fe_priv *np = netdev_priv(dev); |
| 4922 | u8 __iomem *base = get_hwbase(dev); |
| 4923 | int result; |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4924 | memset(buffer, 0, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(u64)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4925 | |
| 4926 | if (!nv_link_test(dev)) { |
| 4927 | test->flags |= ETH_TEST_FL_FAILED; |
| 4928 | buffer[0] = 1; |
| 4929 | } |
| 4930 | |
| 4931 | if (test->flags & ETH_TEST_FL_OFFLINE) { |
| 4932 | if (netif_running(dev)) { |
| 4933 | netif_stop_queue(dev); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 4934 | #ifdef CONFIG_FORCEDETH_NAPI |
| 4935 | napi_disable(&np->napi); |
| 4936 | #endif |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4937 | netif_tx_lock_bh(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4938 | spin_lock_irq(&np->lock); |
| 4939 | nv_disable_hw_interrupts(dev, np->irqmask); |
| 4940 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 4941 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 4942 | } else { |
| 4943 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
| 4944 | } |
| 4945 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4946 | nv_stop_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4947 | nv_txrx_reset(dev); |
| 4948 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4949 | nv_drain_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4950 | spin_unlock_irq(&np->lock); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4951 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4952 | } |
| 4953 | |
| 4954 | if (!nv_register_test(dev)) { |
| 4955 | test->flags |= ETH_TEST_FL_FAILED; |
| 4956 | buffer[1] = 1; |
| 4957 | } |
| 4958 | |
| 4959 | result = nv_interrupt_test(dev); |
| 4960 | if (result != 1) { |
| 4961 | test->flags |= ETH_TEST_FL_FAILED; |
| 4962 | buffer[2] = 1; |
| 4963 | } |
| 4964 | if (result == 0) { |
| 4965 | /* bail out */ |
| 4966 | return; |
| 4967 | } |
| 4968 | |
| 4969 | if (!nv_loopback_test(dev)) { |
| 4970 | test->flags |= ETH_TEST_FL_FAILED; |
| 4971 | buffer[3] = 1; |
| 4972 | } |
| 4973 | |
| 4974 | if (netif_running(dev)) { |
| 4975 | /* reinit driver view of the rx queue */ |
| 4976 | set_bufsize(dev); |
| 4977 | if (nv_init_ring(dev)) { |
| 4978 | if (!np->in_shutdown) |
| 4979 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 4980 | } |
| 4981 | /* reinit nic view of the rx queue */ |
| 4982 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4983 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
| 4984 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
| 4985 | base + NvRegRingSizes); |
| 4986 | pci_push(base); |
| 4987 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4988 | pci_push(base); |
| 4989 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4990 | nv_start_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4991 | netif_start_queue(dev); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 4992 | #ifdef CONFIG_FORCEDETH_NAPI |
| 4993 | napi_enable(&np->napi); |
| 4994 | #endif |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4995 | nv_enable_hw_interrupts(dev, np->irqmask); |
| 4996 | } |
| 4997 | } |
| 4998 | } |
| 4999 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5000 | static void nv_get_strings(struct net_device *dev, u32 stringset, u8 *buffer) |
| 5001 | { |
| 5002 | switch (stringset) { |
| 5003 | case ETH_SS_STATS: |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 5004 | memcpy(buffer, &nv_estats_str, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(struct nv_ethtool_str)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5005 | break; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5006 | case ETH_SS_TEST: |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 5007 | memcpy(buffer, &nv_etests_str, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(struct nv_ethtool_str)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5008 | break; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5009 | } |
| 5010 | } |
| 5011 | |
Jeff Garzik | 7282d49 | 2006-09-13 14:30:00 -0400 | [diff] [blame] | 5012 | static const struct ethtool_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5013 | .get_drvinfo = nv_get_drvinfo, |
| 5014 | .get_link = ethtool_op_get_link, |
| 5015 | .get_wol = nv_get_wol, |
| 5016 | .set_wol = nv_set_wol, |
| 5017 | .get_settings = nv_get_settings, |
| 5018 | .set_settings = nv_set_settings, |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5019 | .get_regs_len = nv_get_regs_len, |
| 5020 | .get_regs = nv_get_regs, |
| 5021 | .nway_reset = nv_nway_reset, |
Ayaz Abdulla | 6a78814 | 2006-06-10 22:47:26 -0400 | [diff] [blame] | 5022 | .set_tso = nv_set_tso, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5023 | .get_ringparam = nv_get_ringparam, |
| 5024 | .set_ringparam = nv_set_ringparam, |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5025 | .get_pauseparam = nv_get_pauseparam, |
| 5026 | .set_pauseparam = nv_set_pauseparam, |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 5027 | .get_rx_csum = nv_get_rx_csum, |
| 5028 | .set_rx_csum = nv_set_rx_csum, |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 5029 | .set_tx_csum = nv_set_tx_csum, |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 5030 | .set_sg = nv_set_sg, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5031 | .get_strings = nv_get_strings, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5032 | .get_ethtool_stats = nv_get_ethtool_stats, |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 5033 | .get_sset_count = nv_get_sset_count, |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5034 | .self_test = nv_self_test, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5035 | }; |
| 5036 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5037 | static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) |
| 5038 | { |
| 5039 | struct fe_priv *np = get_nvpriv(dev); |
| 5040 | |
| 5041 | spin_lock_irq(&np->lock); |
| 5042 | |
| 5043 | /* save vlan group */ |
| 5044 | np->vlangrp = grp; |
| 5045 | |
| 5046 | if (grp) { |
| 5047 | /* enable vlan on MAC */ |
| 5048 | np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS; |
| 5049 | } else { |
| 5050 | /* disable vlan on MAC */ |
| 5051 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP; |
| 5052 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS; |
| 5053 | } |
| 5054 | |
| 5055 | writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 5056 | |
| 5057 | spin_unlock_irq(&np->lock); |
Stephen Hemminger | 25805dc | 2007-06-01 09:44:01 -0700 | [diff] [blame] | 5058 | } |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5059 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5060 | /* The mgmt unit and driver use a semaphore to access the phy during init */ |
| 5061 | static int nv_mgmt_acquire_sema(struct net_device *dev) |
| 5062 | { |
| 5063 | u8 __iomem *base = get_hwbase(dev); |
| 5064 | int i; |
| 5065 | u32 tx_ctrl, mgmt_sema; |
| 5066 | |
| 5067 | for (i = 0; i < 10; i++) { |
| 5068 | mgmt_sema = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_SEMA_MASK; |
| 5069 | if (mgmt_sema == NVREG_XMITCTL_MGMT_SEMA_FREE) |
| 5070 | break; |
| 5071 | msleep(500); |
| 5072 | } |
| 5073 | |
| 5074 | if (mgmt_sema != NVREG_XMITCTL_MGMT_SEMA_FREE) |
| 5075 | return 0; |
| 5076 | |
| 5077 | for (i = 0; i < 2; i++) { |
| 5078 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 5079 | tx_ctrl |= NVREG_XMITCTL_HOST_SEMA_ACQ; |
| 5080 | writel(tx_ctrl, base + NvRegTransmitterControl); |
| 5081 | |
| 5082 | /* verify that semaphore was acquired */ |
| 5083 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 5084 | if (((tx_ctrl & NVREG_XMITCTL_HOST_SEMA_MASK) == NVREG_XMITCTL_HOST_SEMA_ACQ) && |
| 5085 | ((tx_ctrl & NVREG_XMITCTL_MGMT_SEMA_MASK) == NVREG_XMITCTL_MGMT_SEMA_FREE)) |
| 5086 | return 1; |
| 5087 | else |
| 5088 | udelay(50); |
| 5089 | } |
| 5090 | |
| 5091 | return 0; |
| 5092 | } |
| 5093 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5094 | static int nv_open(struct net_device *dev) |
| 5095 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5096 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5097 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5098 | int ret = 1; |
| 5099 | int oom, i; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5100 | u32 low; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5101 | |
| 5102 | dprintk(KERN_DEBUG "nv_open: begin\n"); |
| 5103 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5104 | /* erase previous misconfiguration */ |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5105 | if (np->driver_data & DEV_HAS_POWER_CNTRL) |
| 5106 | nv_mac_reset(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5107 | writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); |
| 5108 | writel(0, base + NvRegMulticastAddrB); |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 5109 | writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA); |
| 5110 | writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5111 | writel(0, base + NvRegPacketFilterFlags); |
| 5112 | |
| 5113 | writel(0, base + NvRegTransmitterControl); |
| 5114 | writel(0, base + NvRegReceiverControl); |
| 5115 | |
| 5116 | writel(0, base + NvRegAdapterControl); |
| 5117 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5118 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) |
| 5119 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); |
| 5120 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5121 | /* initialize descriptor rings */ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5122 | set_bufsize(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5123 | oom = nv_init_ring(dev); |
| 5124 | |
| 5125 | writel(0, base + NvRegLinkSpeed); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5126 | writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5127 | nv_txrx_reset(dev); |
| 5128 | writel(0, base + NvRegUnknownSetupReg6); |
| 5129 | |
| 5130 | np->in_shutdown = 0; |
| 5131 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5132 | /* give hw rings */ |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 5133 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5134 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5135 | base + NvRegRingSizes); |
| 5136 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5137 | writel(np->linkspeed, base + NvRegLinkSpeed); |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 5138 | if (np->desc_ver == DESC_VER_1) |
| 5139 | writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark); |
| 5140 | else |
| 5141 | writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5142 | writel(np->txrxctl_bits, base + NvRegTxRxControl); |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5143 | writel(np->vlanctl_bits, base + NvRegVlanControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5144 | pci_push(base); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5145 | writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5146 | reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31, |
| 5147 | NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX, |
| 5148 | KERN_INFO "open: SetupReg5, Bit 31 remained off\n"); |
| 5149 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5150 | writel(0, base + NvRegMIIMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5151 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5152 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5153 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5154 | writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1); |
| 5155 | writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus); |
| 5156 | writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5157 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5158 | |
| 5159 | writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus); |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5160 | |
| 5161 | get_random_bytes(&low, sizeof(low)); |
| 5162 | low &= NVREG_SLOTTIME_MASK; |
| 5163 | if (np->desc_ver == DESC_VER_1) { |
| 5164 | writel(low|NVREG_SLOTTIME_DEFAULT, base + NvRegSlotTime); |
| 5165 | } else { |
| 5166 | if (!(np->driver_data & DEV_HAS_GEAR_MODE)) { |
| 5167 | /* setup legacy backoff */ |
| 5168 | writel(NVREG_SLOTTIME_LEGBF_ENABLED|NVREG_SLOTTIME_10_100_FULL|low, base + NvRegSlotTime); |
| 5169 | } else { |
| 5170 | writel(NVREG_SLOTTIME_10_100_FULL, base + NvRegSlotTime); |
| 5171 | nv_gear_backoff_reseed(dev); |
| 5172 | } |
| 5173 | } |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 5174 | writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral); |
| 5175 | writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5176 | if (poll_interval == -1) { |
| 5177 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) |
| 5178 | writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval); |
| 5179 | else |
| 5180 | writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval); |
| 5181 | } |
| 5182 | else |
| 5183 | writel(poll_interval & 0xFFFF, base + NvRegPollingInterval); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5184 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 5185 | writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING, |
| 5186 | base + NvRegAdapterControl); |
| 5187 | writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5188 | writel(NVREG_MII_LINKCHANGE, base + NvRegMIIMask); |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 5189 | if (np->wolenabled) |
| 5190 | writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5191 | |
| 5192 | i = readl(base + NvRegPowerState); |
| 5193 | if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0) |
| 5194 | writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState); |
| 5195 | |
| 5196 | pci_push(base); |
| 5197 | udelay(10); |
| 5198 | writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState); |
| 5199 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5200 | nv_disable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5201 | pci_push(base); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5202 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5203 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 5204 | pci_push(base); |
| 5205 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 5206 | if (nv_request_irq(dev, 0)) { |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5207 | goto out_drain; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5208 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5209 | |
| 5210 | /* ask for interrupts */ |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5211 | nv_enable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5212 | |
| 5213 | spin_lock_irq(&np->lock); |
| 5214 | writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); |
| 5215 | writel(0, base + NvRegMulticastAddrB); |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 5216 | writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA); |
| 5217 | writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5218 | writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags); |
| 5219 | /* One manual link speed update: Interrupts are enabled, future link |
| 5220 | * speed changes cause interrupts and are handled by nv_link_irq(). |
| 5221 | */ |
| 5222 | { |
| 5223 | u32 miistat; |
| 5224 | miistat = readl(base + NvRegMIIStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5225 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5226 | dprintk(KERN_INFO "startup: got 0x%08x.\n", miistat); |
| 5227 | } |
Manfred Spraul | 1b1b3c9 | 2005-08-06 23:47:55 +0200 | [diff] [blame] | 5228 | /* set linkspeed to invalid value, thus force nv_update_linkspeed |
| 5229 | * to init hw */ |
| 5230 | np->linkspeed = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5231 | ret = nv_update_linkspeed(dev); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5232 | nv_start_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5233 | netif_start_queue(dev); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5234 | #ifdef CONFIG_FORCEDETH_NAPI |
| 5235 | napi_enable(&np->napi); |
| 5236 | #endif |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 5237 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5238 | if (ret) { |
| 5239 | netif_carrier_on(dev); |
| 5240 | } else { |
Ed Swierk | f7ab697 | 2007-09-28 22:42:13 -0700 | [diff] [blame] | 5241 | printk(KERN_INFO "%s: no link during initialization.\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5242 | netif_carrier_off(dev); |
| 5243 | } |
| 5244 | if (oom) |
| 5245 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5246 | |
| 5247 | /* start statistics timer */ |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 5248 | if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2)) |
Daniel Drake | bfebbb8 | 2008-03-18 11:07:18 +0000 | [diff] [blame] | 5249 | mod_timer(&np->stats_poll, |
| 5250 | round_jiffies(jiffies + STATS_INTERVAL)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5251 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5252 | spin_unlock_irq(&np->lock); |
| 5253 | |
| 5254 | return 0; |
| 5255 | out_drain: |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5256 | nv_drain_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5257 | return ret; |
| 5258 | } |
| 5259 | |
| 5260 | static int nv_close(struct net_device *dev) |
| 5261 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5262 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5263 | u8 __iomem *base; |
| 5264 | |
| 5265 | spin_lock_irq(&np->lock); |
| 5266 | np->in_shutdown = 1; |
| 5267 | spin_unlock_irq(&np->lock); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5268 | #ifdef CONFIG_FORCEDETH_NAPI |
| 5269 | napi_disable(&np->napi); |
| 5270 | #endif |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 5271 | synchronize_irq(np->pci_dev->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5272 | |
| 5273 | del_timer_sync(&np->oom_kick); |
| 5274 | del_timer_sync(&np->nic_poll); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5275 | del_timer_sync(&np->stats_poll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5276 | |
| 5277 | netif_stop_queue(dev); |
| 5278 | spin_lock_irq(&np->lock); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5279 | nv_stop_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5280 | nv_txrx_reset(dev); |
| 5281 | |
| 5282 | /* disable interrupts on the nic or we will lock up */ |
| 5283 | base = get_hwbase(dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5284 | nv_disable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5285 | pci_push(base); |
| 5286 | dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name); |
| 5287 | |
| 5288 | spin_unlock_irq(&np->lock); |
| 5289 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5290 | nv_free_irq(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5291 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5292 | nv_drain_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5293 | |
Tim Mann | 2cc49a5 | 2007-06-14 13:16:38 -0700 | [diff] [blame] | 5294 | if (np->wolenabled) { |
| 5295 | writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5296 | nv_start_rx(dev); |
Tim Mann | 2cc49a5 | 2007-06-14 13:16:38 -0700 | [diff] [blame] | 5297 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5298 | |
| 5299 | /* FIXME: power down nic */ |
| 5300 | |
| 5301 | return 0; |
| 5302 | } |
| 5303 | |
| 5304 | static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) |
| 5305 | { |
| 5306 | struct net_device *dev; |
| 5307 | struct fe_priv *np; |
| 5308 | unsigned long addr; |
| 5309 | u8 __iomem *base; |
| 5310 | int err, i; |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5311 | u32 powerstate, txreg; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5312 | u32 phystate_orig = 0, phystate; |
| 5313 | int phyinitialized = 0; |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 5314 | DECLARE_MAC_BUF(mac); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5315 | static int printed_version; |
| 5316 | |
| 5317 | if (!printed_version++) |
| 5318 | printk(KERN_INFO "%s: Reverse Engineered nForce ethernet" |
| 5319 | " driver. Version %s.\n", DRV_NAME, FORCEDETH_VERSION); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5320 | |
| 5321 | dev = alloc_etherdev(sizeof(struct fe_priv)); |
| 5322 | err = -ENOMEM; |
| 5323 | if (!dev) |
| 5324 | goto out; |
| 5325 | |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5326 | np = netdev_priv(dev); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5327 | np->dev = dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5328 | np->pci_dev = pci_dev; |
| 5329 | spin_lock_init(&np->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5330 | SET_NETDEV_DEV(dev, &pci_dev->dev); |
| 5331 | |
| 5332 | init_timer(&np->oom_kick); |
| 5333 | np->oom_kick.data = (unsigned long) dev; |
| 5334 | np->oom_kick.function = &nv_do_rx_refill; /* timer handler */ |
| 5335 | init_timer(&np->nic_poll); |
| 5336 | np->nic_poll.data = (unsigned long) dev; |
| 5337 | np->nic_poll.function = &nv_do_nic_poll; /* timer handler */ |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5338 | init_timer(&np->stats_poll); |
| 5339 | np->stats_poll.data = (unsigned long) dev; |
| 5340 | np->stats_poll.function = &nv_do_stats_poll; /* timer handler */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5341 | |
| 5342 | err = pci_enable_device(pci_dev); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5343 | if (err) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5344 | goto out_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5345 | |
| 5346 | pci_set_master(pci_dev); |
| 5347 | |
| 5348 | err = pci_request_regions(pci_dev, DRV_NAME); |
| 5349 | if (err < 0) |
| 5350 | goto out_disable; |
| 5351 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 5352 | if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V2)) |
| 5353 | np->register_size = NV_PCI_REGSZ_VER3; |
| 5354 | else if (id->driver_data & DEV_HAS_STATISTICS_V1) |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5355 | np->register_size = NV_PCI_REGSZ_VER2; |
| 5356 | else |
| 5357 | np->register_size = NV_PCI_REGSZ_VER1; |
| 5358 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5359 | err = -EINVAL; |
| 5360 | addr = 0; |
| 5361 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
| 5362 | dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n", |
| 5363 | pci_name(pci_dev), i, (void*)pci_resource_start(pci_dev, i), |
| 5364 | pci_resource_len(pci_dev, i), |
| 5365 | pci_resource_flags(pci_dev, i)); |
| 5366 | if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM && |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5367 | pci_resource_len(pci_dev, i) >= np->register_size) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5368 | addr = pci_resource_start(pci_dev, i); |
| 5369 | break; |
| 5370 | } |
| 5371 | } |
| 5372 | if (i == DEVICE_COUNT_RESOURCE) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5373 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5374 | "Couldn't find register window\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5375 | goto out_relreg; |
| 5376 | } |
| 5377 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5378 | /* copy of driver data */ |
| 5379 | np->driver_data = id->driver_data; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5380 | /* copy of device id */ |
| 5381 | np->device_id = id->device; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5382 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5383 | /* handle different descriptor versions */ |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5384 | if (id->driver_data & DEV_HAS_HIGH_DMA) { |
| 5385 | /* packet format 3: supports 40-bit addressing */ |
| 5386 | np->desc_ver = DESC_VER_3; |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5387 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_3; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5388 | if (dma_64bit) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5389 | if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) |
| 5390 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5391 | "64-bit DMA failed, using 32-bit addressing\n"); |
| 5392 | else |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5393 | dev->features |= NETIF_F_HIGHDMA; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5394 | if (pci_set_consistent_dma_mask(pci_dev, DMA_39BIT_MASK)) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5395 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5396 | "64-bit DMA (consistent) failed, using 32-bit ring buffers\n"); |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5397 | } |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5398 | } |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5399 | } else if (id->driver_data & DEV_HAS_LARGEDESC) { |
| 5400 | /* packet format 2: supports jumbo frames */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5401 | np->desc_ver = DESC_VER_2; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5402 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_2; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5403 | } else { |
| 5404 | /* original packet format */ |
| 5405 | np->desc_ver = DESC_VER_1; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5406 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_1; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5407 | } |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5408 | |
| 5409 | np->pkt_limit = NV_PKTLIMIT_1; |
| 5410 | if (id->driver_data & DEV_HAS_LARGEDESC) |
| 5411 | np->pkt_limit = NV_PKTLIMIT_2; |
| 5412 | |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5413 | if (id->driver_data & DEV_HAS_CHECKSUM) { |
Ayaz Abdulla | f2ad2d9 | 2006-08-24 17:35:41 -0400 | [diff] [blame] | 5414 | np->rx_csum = 1; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5415 | np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5416 | dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 5417 | dev->features |= NETIF_F_TSO; |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 5418 | } |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5419 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5420 | np->vlanctl_bits = 0; |
| 5421 | if (id->driver_data & DEV_HAS_VLAN) { |
| 5422 | np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE; |
| 5423 | dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX; |
| 5424 | dev->vlan_rx_register = nv_vlan_rx_register; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5425 | } |
| 5426 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5427 | np->msi_flags = 0; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5428 | if ((id->driver_data & DEV_HAS_MSI) && msi) { |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5429 | np->msi_flags |= NV_MSI_CAPABLE; |
| 5430 | } |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5431 | if ((id->driver_data & DEV_HAS_MSI_X) && msix) { |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5432 | np->msi_flags |= NV_MSI_X_CAPABLE; |
| 5433 | } |
| 5434 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5435 | np->pause_flags = NV_PAUSEFRAME_RX_CAPABLE | NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_AUTONEG; |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 5436 | if ((id->driver_data & DEV_HAS_PAUSEFRAME_TX_V1) || |
| 5437 | (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) || |
| 5438 | (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V3)) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5439 | np->pause_flags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5440 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 5441 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5442 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5443 | err = -ENOMEM; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5444 | np->base = ioremap(addr, np->register_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5445 | if (!np->base) |
| 5446 | goto out_relreg; |
| 5447 | dev->base_addr = (unsigned long)np->base; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5448 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5449 | dev->irq = pci_dev->irq; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5450 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5451 | np->rx_ring_size = RX_RING_DEFAULT; |
| 5452 | np->tx_ring_size = TX_RING_DEFAULT; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5453 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5454 | if (!nv_optimized(np)) { |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5455 | np->rx_ring.orig = pci_alloc_consistent(pci_dev, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5456 | sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5457 | &np->ring_addr); |
| 5458 | if (!np->rx_ring.orig) |
| 5459 | goto out_unmap; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5460 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5461 | } else { |
| 5462 | np->rx_ring.ex = pci_alloc_consistent(pci_dev, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5463 | sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5464 | &np->ring_addr); |
| 5465 | if (!np->rx_ring.ex) |
| 5466 | goto out_unmap; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5467 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5468 | } |
Yoann Padioleau | dd00cc4 | 2007-07-19 01:49:03 -0700 | [diff] [blame] | 5469 | np->rx_skb = kcalloc(np->rx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL); |
| 5470 | np->tx_skb = kcalloc(np->tx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 5471 | if (!np->rx_skb || !np->tx_skb) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5472 | goto out_freering; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5473 | |
| 5474 | dev->open = nv_open; |
| 5475 | dev->stop = nv_close; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5476 | |
| 5477 | if (!nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 5478 | dev->hard_start_xmit = nv_start_xmit; |
| 5479 | else |
| 5480 | dev->hard_start_xmit = nv_start_xmit_optimized; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5481 | dev->get_stats = nv_get_stats; |
| 5482 | dev->change_mtu = nv_change_mtu; |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 5483 | dev->set_mac_address = nv_set_mac_address; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5484 | dev->set_multicast_list = nv_set_multicast; |
Michal Schmidt | 2918c35 | 2005-05-12 19:42:06 -0400 | [diff] [blame] | 5485 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 5486 | dev->poll_controller = nv_poll_controller; |
| 5487 | #endif |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 5488 | #ifdef CONFIG_FORCEDETH_NAPI |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5489 | netif_napi_add(dev, &np->napi, nv_napi_poll, RX_WORK_PER_LOOP); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 5490 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5491 | SET_ETHTOOL_OPS(dev, &ops); |
| 5492 | dev->tx_timeout = nv_tx_timeout; |
| 5493 | dev->watchdog_timeo = NV_WATCHDOG_TIMEO; |
| 5494 | |
| 5495 | pci_set_drvdata(pci_dev, dev); |
| 5496 | |
| 5497 | /* read the mac address */ |
| 5498 | base = get_hwbase(dev); |
| 5499 | np->orig_mac[0] = readl(base + NvRegMacAddrA); |
| 5500 | np->orig_mac[1] = readl(base + NvRegMacAddrB); |
| 5501 | |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5502 | /* check the workaround bit for correct mac address order */ |
| 5503 | txreg = readl(base + NvRegTransmitPoll); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5504 | if (id->driver_data & DEV_HAS_CORRECT_MACADDR) { |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5505 | /* mac address is already in correct order */ |
| 5506 | dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff; |
| 5507 | dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff; |
| 5508 | dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff; |
| 5509 | dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff; |
| 5510 | dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff; |
| 5511 | dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff; |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5512 | } else if (txreg & NVREG_TRANSMITPOLL_MAC_ADDR_REV) { |
| 5513 | /* mac address is already in correct order */ |
| 5514 | dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff; |
| 5515 | dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff; |
| 5516 | dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff; |
| 5517 | dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff; |
| 5518 | dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff; |
| 5519 | dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff; |
| 5520 | /* |
| 5521 | * Set orig mac address back to the reversed version. |
| 5522 | * This flag will be cleared during low power transition. |
| 5523 | * Therefore, we should always put back the reversed address. |
| 5524 | */ |
| 5525 | np->orig_mac[0] = (dev->dev_addr[5] << 0) + (dev->dev_addr[4] << 8) + |
| 5526 | (dev->dev_addr[3] << 16) + (dev->dev_addr[2] << 24); |
| 5527 | np->orig_mac[1] = (dev->dev_addr[1] << 0) + (dev->dev_addr[0] << 8); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5528 | } else { |
| 5529 | /* need to reverse mac address to correct order */ |
| 5530 | dev->dev_addr[0] = (np->orig_mac[1] >> 8) & 0xff; |
| 5531 | dev->dev_addr[1] = (np->orig_mac[1] >> 0) & 0xff; |
| 5532 | dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff; |
| 5533 | dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff; |
| 5534 | dev->dev_addr[4] = (np->orig_mac[0] >> 8) & 0xff; |
| 5535 | dev->dev_addr[5] = (np->orig_mac[0] >> 0) & 0xff; |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5536 | writel(txreg|NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll); |
| 5537 | } |
John W. Linville | c704b85 | 2005-09-12 10:48:56 -0400 | [diff] [blame] | 5538 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5539 | |
John W. Linville | c704b85 | 2005-09-12 10:48:56 -0400 | [diff] [blame] | 5540 | if (!is_valid_ether_addr(dev->perm_addr)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5541 | /* |
| 5542 | * Bad mac address. At least one bios sets the mac address |
| 5543 | * to 01:23:45:67:89:ab |
| 5544 | */ |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5545 | dev_printk(KERN_ERR, &pci_dev->dev, |
| 5546 | "Invalid Mac address detected: %s\n", |
| 5547 | print_mac(mac, dev->dev_addr)); |
| 5548 | dev_printk(KERN_ERR, &pci_dev->dev, |
| 5549 | "Please complain to your hardware vendor. Switching to a random MAC.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5550 | dev->dev_addr[0] = 0x00; |
| 5551 | dev->dev_addr[1] = 0x00; |
| 5552 | dev->dev_addr[2] = 0x6c; |
| 5553 | get_random_bytes(&dev->dev_addr[3], 3); |
| 5554 | } |
| 5555 | |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 5556 | dprintk(KERN_DEBUG "%s: MAC Address %s\n", |
| 5557 | pci_name(pci_dev), print_mac(mac, dev->dev_addr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5558 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5559 | /* set mac address */ |
| 5560 | nv_copy_mac_to_hw(dev); |
| 5561 | |
Tobias Diedrich | 9a60a82 | 2008-06-01 00:54:42 +0200 | [diff] [blame] | 5562 | /* Workaround current PCI init glitch: wakeup bits aren't |
| 5563 | * being set from PCI PM capability. |
| 5564 | */ |
| 5565 | device_init_wakeup(&pci_dev->dev, 1); |
| 5566 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5567 | /* disable WOL */ |
| 5568 | writel(0, base + NvRegWakeUpFlags); |
| 5569 | np->wolenabled = 0; |
| 5570 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5571 | if (id->driver_data & DEV_HAS_POWER_CNTRL) { |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5572 | |
| 5573 | /* take phy and nic out of low power mode */ |
| 5574 | powerstate = readl(base + NvRegPowerState2); |
| 5575 | powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK; |
| 5576 | if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 || |
| 5577 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) && |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 5578 | pci_dev->revision >= 0xA3) |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5579 | powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3; |
| 5580 | writel(powerstate, base + NvRegPowerState2); |
| 5581 | } |
| 5582 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5583 | if (np->desc_ver == DESC_VER_1) { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5584 | np->tx_flags = NV_TX_VALID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5585 | } else { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5586 | np->tx_flags = NV_TX2_VALID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5587 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5588 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) { |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5589 | np->irqmask = NVREG_IRQMASK_THROUGHPUT; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5590 | if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */ |
| 5591 | np->msi_flags |= 0x0003; |
| 5592 | } else { |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5593 | np->irqmask = NVREG_IRQMASK_CPU; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5594 | if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */ |
| 5595 | np->msi_flags |= 0x0001; |
| 5596 | } |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5597 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5598 | if (id->driver_data & DEV_NEED_TIMERIRQ) |
| 5599 | np->irqmask |= NVREG_IRQ_TIMER; |
| 5600 | if (id->driver_data & DEV_NEED_LINKTIMER) { |
| 5601 | dprintk(KERN_INFO "%s: link timer on.\n", pci_name(pci_dev)); |
| 5602 | np->need_linktimer = 1; |
| 5603 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 5604 | } else { |
| 5605 | dprintk(KERN_INFO "%s: link timer off.\n", pci_name(pci_dev)); |
| 5606 | np->need_linktimer = 0; |
| 5607 | } |
| 5608 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5609 | /* Limit the number of tx's outstanding for hw bug */ |
| 5610 | if (id->driver_data & DEV_NEED_TX_LIMIT) { |
| 5611 | np->tx_limit = 1; |
| 5612 | if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_32 || |
| 5613 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_33 || |
| 5614 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_34 || |
| 5615 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_35 || |
| 5616 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_36 || |
| 5617 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_37 || |
| 5618 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_38 || |
| 5619 | id->device == PCI_DEVICE_ID_NVIDIA_NVENET_39) && |
| 5620 | pci_dev->revision >= 0xA2) |
| 5621 | np->tx_limit = 0; |
| 5622 | } |
| 5623 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5624 | /* clear phy state and temporarily halt phy interrupts */ |
| 5625 | writel(0, base + NvRegMIIMask); |
| 5626 | phystate = readl(base + NvRegAdapterControl); |
| 5627 | if (phystate & NVREG_ADAPTCTL_RUNNING) { |
| 5628 | phystate_orig = 1; |
| 5629 | phystate &= ~NVREG_ADAPTCTL_RUNNING; |
| 5630 | writel(phystate, base + NvRegAdapterControl); |
| 5631 | } |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5632 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5633 | |
| 5634 | if (id->driver_data & DEV_HAS_MGMT_UNIT) { |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5635 | /* management unit running on the mac? */ |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 5636 | if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) { |
| 5637 | np->mac_in_use = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST; |
| 5638 | dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n", pci_name(pci_dev), np->mac_in_use); |
Ayaz Abdulla | 9e55593 | 2007-11-21 15:02:58 -0800 | [diff] [blame] | 5639 | if (nv_mgmt_acquire_sema(dev)) { |
| 5640 | /* management unit setup the phy already? */ |
| 5641 | if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) == |
| 5642 | NVREG_XMITCTL_SYNC_PHY_INIT) { |
| 5643 | /* phy is inited by mgmt unit */ |
| 5644 | phyinitialized = 1; |
| 5645 | dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n", pci_name(pci_dev)); |
| 5646 | } else { |
| 5647 | /* we need to init the phy */ |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5648 | } |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5649 | } |
| 5650 | } |
| 5651 | } |
| 5652 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5653 | /* find a suitable phy */ |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5654 | for (i = 1; i <= 32; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5655 | int id1, id2; |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5656 | int phyaddr = i & 0x1F; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5657 | |
| 5658 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5659 | id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5660 | spin_unlock_irq(&np->lock); |
| 5661 | if (id1 < 0 || id1 == 0xffff) |
| 5662 | continue; |
| 5663 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5664 | id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5665 | spin_unlock_irq(&np->lock); |
| 5666 | if (id2 < 0 || id2 == 0xffff) |
| 5667 | continue; |
| 5668 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 5669 | np->phy_model = id2 & PHYID2_MODEL_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5670 | id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT; |
| 5671 | id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT; |
| 5672 | dprintk(KERN_DEBUG "%s: open: Found PHY %04x:%04x at address %d.\n", |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5673 | pci_name(pci_dev), id1, id2, phyaddr); |
| 5674 | np->phyaddr = phyaddr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5675 | np->phy_oui = id1 | id2; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5676 | |
| 5677 | /* Realtek hardcoded phy id1 to all zero's on certain phys */ |
| 5678 | if (np->phy_oui == PHY_OUI_REALTEK2) |
| 5679 | np->phy_oui = PHY_OUI_REALTEK; |
| 5680 | /* Setup phy revision for Realtek */ |
| 5681 | if (np->phy_oui == PHY_OUI_REALTEK && np->phy_model == PHY_MODEL_REALTEK_8211) |
| 5682 | np->phy_rev = mii_rw(dev, phyaddr, MII_RESV1, MII_READ) & PHY_REV_MASK; |
| 5683 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5684 | break; |
| 5685 | } |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5686 | if (i == 33) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5687 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5688 | "open: Could not find a valid PHY.\n"); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5689 | goto out_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5690 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 5691 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5692 | if (!phyinitialized) { |
| 5693 | /* reset it */ |
| 5694 | phy_init(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 5695 | } else { |
| 5696 | /* see if it is a gigabit phy */ |
| 5697 | u32 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 5698 | if (mii_status & PHY_GIGABIT) { |
| 5699 | np->gigabit = PHY_GIGABIT; |
| 5700 | } |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5701 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5702 | |
| 5703 | /* set default link speed settings */ |
| 5704 | np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 5705 | np->duplex = 0; |
| 5706 | np->autoneg = 1; |
| 5707 | |
| 5708 | err = register_netdev(dev); |
| 5709 | if (err) { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5710 | dev_printk(KERN_INFO, &pci_dev->dev, |
| 5711 | "unable to register netdev: %d\n", err); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5712 | goto out_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5713 | } |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5714 | |
| 5715 | dev_printk(KERN_INFO, &pci_dev->dev, "ifname %s, PHY OUI 0x%x @ %d, " |
| 5716 | "addr %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n", |
| 5717 | dev->name, |
| 5718 | np->phy_oui, |
| 5719 | np->phyaddr, |
| 5720 | dev->dev_addr[0], |
| 5721 | dev->dev_addr[1], |
| 5722 | dev->dev_addr[2], |
| 5723 | dev->dev_addr[3], |
| 5724 | dev->dev_addr[4], |
| 5725 | dev->dev_addr[5]); |
| 5726 | |
| 5727 | dev_printk(KERN_INFO, &pci_dev->dev, "%s%s%s%s%s%s%s%s%s%sdesc-v%u\n", |
| 5728 | dev->features & NETIF_F_HIGHDMA ? "highdma " : "", |
| 5729 | dev->features & (NETIF_F_HW_CSUM | NETIF_F_SG) ? |
| 5730 | "csum " : "", |
| 5731 | dev->features & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX) ? |
| 5732 | "vlan " : "", |
| 5733 | id->driver_data & DEV_HAS_POWER_CNTRL ? "pwrctl " : "", |
| 5734 | id->driver_data & DEV_HAS_MGMT_UNIT ? "mgmt " : "", |
| 5735 | id->driver_data & DEV_NEED_TIMERIRQ ? "timirq " : "", |
| 5736 | np->gigabit == PHY_GIGABIT ? "gbit " : "", |
| 5737 | np->need_linktimer ? "lnktim " : "", |
| 5738 | np->msi_flags & NV_MSI_CAPABLE ? "msi " : "", |
| 5739 | np->msi_flags & NV_MSI_X_CAPABLE ? "msi-x " : "", |
| 5740 | np->desc_ver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5741 | |
| 5742 | return 0; |
| 5743 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5744 | out_error: |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5745 | if (phystate_orig) |
| 5746 | writel(phystate|NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5747 | pci_set_drvdata(pci_dev, NULL); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5748 | out_freering: |
| 5749 | free_rings(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5750 | out_unmap: |
| 5751 | iounmap(get_hwbase(dev)); |
| 5752 | out_relreg: |
| 5753 | pci_release_regions(pci_dev); |
| 5754 | out_disable: |
| 5755 | pci_disable_device(pci_dev); |
| 5756 | out_free: |
| 5757 | free_netdev(dev); |
| 5758 | out: |
| 5759 | return err; |
| 5760 | } |
| 5761 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5762 | static void nv_restore_phy(struct net_device *dev) |
| 5763 | { |
| 5764 | struct fe_priv *np = netdev_priv(dev); |
| 5765 | u16 phy_reserved, mii_control; |
| 5766 | |
| 5767 | if (np->phy_oui == PHY_OUI_REALTEK && |
| 5768 | np->phy_model == PHY_MODEL_REALTEK_8201 && |
| 5769 | phy_cross == NV_CROSSOVER_DETECTION_DISABLED) { |
| 5770 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3); |
| 5771 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ); |
| 5772 | phy_reserved &= ~PHY_REALTEK_INIT_MSK1; |
| 5773 | phy_reserved |= PHY_REALTEK_INIT8; |
| 5774 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved); |
| 5775 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1); |
| 5776 | |
| 5777 | /* restart auto negotiation */ |
| 5778 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 5779 | mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); |
| 5780 | mii_rw(dev, np->phyaddr, MII_BMCR, mii_control); |
| 5781 | } |
| 5782 | } |
| 5783 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5784 | static void __devexit nv_remove(struct pci_dev *pci_dev) |
| 5785 | { |
| 5786 | struct net_device *dev = pci_get_drvdata(pci_dev); |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5787 | struct fe_priv *np = netdev_priv(dev); |
| 5788 | u8 __iomem *base = get_hwbase(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5789 | |
| 5790 | unregister_netdev(dev); |
| 5791 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5792 | /* special op: write back the misordered MAC address - otherwise |
| 5793 | * the next nv_probe would see a wrong address. |
| 5794 | */ |
| 5795 | writel(np->orig_mac[0], base + NvRegMacAddrA); |
| 5796 | writel(np->orig_mac[1], base + NvRegMacAddrB); |
Björn Steinbrink | 2e3884b | 2008-01-07 23:22:53 -0800 | [diff] [blame] | 5797 | writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV, |
| 5798 | base + NvRegTransmitPoll); |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5799 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5800 | /* restore any phy related changes */ |
| 5801 | nv_restore_phy(dev); |
| 5802 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5803 | /* free all structures */ |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5804 | free_rings(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5805 | iounmap(get_hwbase(dev)); |
| 5806 | pci_release_regions(pci_dev); |
| 5807 | pci_disable_device(pci_dev); |
| 5808 | free_netdev(dev); |
| 5809 | pci_set_drvdata(pci_dev, NULL); |
| 5810 | } |
| 5811 | |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5812 | #ifdef CONFIG_PM |
| 5813 | static int nv_suspend(struct pci_dev *pdev, pm_message_t state) |
| 5814 | { |
| 5815 | struct net_device *dev = pci_get_drvdata(pdev); |
| 5816 | struct fe_priv *np = netdev_priv(dev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5817 | u8 __iomem *base = get_hwbase(dev); |
| 5818 | int i; |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5819 | |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 5820 | if (netif_running(dev)) { |
| 5821 | // Gross. |
| 5822 | nv_close(dev); |
| 5823 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5824 | netif_device_detach(dev); |
| 5825 | |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5826 | /* save non-pci configuration space */ |
| 5827 | for (i = 0;i <= np->register_size/sizeof(u32); i++) |
| 5828 | np->saved_config_space[i] = readl(base + i*sizeof(u32)); |
| 5829 | |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5830 | pci_save_state(pdev); |
| 5831 | pci_enable_wake(pdev, pci_choose_state(pdev, state), np->wolenabled); |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 5832 | pci_disable_device(pdev); |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5833 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5834 | return 0; |
| 5835 | } |
| 5836 | |
| 5837 | static int nv_resume(struct pci_dev *pdev) |
| 5838 | { |
| 5839 | struct net_device *dev = pci_get_drvdata(pdev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5840 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5841 | u8 __iomem *base = get_hwbase(dev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5842 | int i, rc = 0; |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5843 | |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5844 | pci_set_power_state(pdev, PCI_D0); |
| 5845 | pci_restore_state(pdev); |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 5846 | /* ack any pending wake events, disable PME */ |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5847 | pci_enable_wake(pdev, PCI_D0, 0); |
| 5848 | |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5849 | /* restore non-pci configuration space */ |
| 5850 | for (i = 0;i <= np->register_size/sizeof(u32); i++) |
| 5851 | writel(np->saved_config_space[i], base+i*sizeof(u32)); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5852 | |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 5853 | netif_device_attach(dev); |
| 5854 | if (netif_running(dev)) { |
| 5855 | rc = nv_open(dev); |
| 5856 | nv_set_multicast(dev); |
| 5857 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5858 | return rc; |
| 5859 | } |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5860 | |
| 5861 | static void nv_shutdown(struct pci_dev *pdev) |
| 5862 | { |
| 5863 | struct net_device *dev = pci_get_drvdata(pdev); |
| 5864 | struct fe_priv *np = netdev_priv(dev); |
| 5865 | |
| 5866 | if (netif_running(dev)) |
| 5867 | nv_close(dev); |
| 5868 | |
| 5869 | pci_enable_wake(pdev, PCI_D3hot, np->wolenabled); |
| 5870 | pci_enable_wake(pdev, PCI_D3cold, np->wolenabled); |
| 5871 | pci_disable_device(pdev); |
| 5872 | pci_set_power_state(pdev, PCI_D3hot); |
| 5873 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5874 | #else |
| 5875 | #define nv_suspend NULL |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5876 | #define nv_shutdown NULL |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5877 | #define nv_resume NULL |
| 5878 | #endif /* CONFIG_PM */ |
| 5879 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5880 | static struct pci_device_id pci_tbl[] = { |
| 5881 | { /* nForce Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5882 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 5883 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5884 | }, |
| 5885 | { /* nForce2 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5886 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 5887 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5888 | }, |
| 5889 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5890 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 5891 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5892 | }, |
| 5893 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5894 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5895 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5896 | }, |
| 5897 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5898 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5899 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5900 | }, |
| 5901 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5902 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5903 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5904 | }, |
| 5905 | { /* nForce3 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5906 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5907 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5908 | }, |
| 5909 | { /* CK804 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5910 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8), |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5911 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5912 | }, |
| 5913 | { /* CK804 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5914 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9), |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5915 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5916 | }, |
| 5917 | { /* MCP04 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5918 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10), |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5919 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5920 | }, |
| 5921 | { /* MCP04 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5922 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11), |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5923 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5924 | }, |
| 5925 | { /* MCP51 Ethernet Controller */ |
| 5926 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12), |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 5927 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5928 | }, |
Manfred Spraul | 9992d4a | 2005-06-05 17:36:11 +0200 | [diff] [blame] | 5929 | { /* MCP51 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5930 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13), |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 5931 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1, |
Manfred Spraul | 9992d4a | 2005-06-05 17:36:11 +0200 | [diff] [blame] | 5932 | }, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 5933 | { /* MCP55 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5934 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5935 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 5936 | }, |
| 5937 | { /* MCP55 Ethernet Controller */ |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5938 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5939 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 5940 | }, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5941 | { /* MCP61 Ethernet Controller */ |
| 5942 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16), |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 5943 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5944 | }, |
| 5945 | { /* MCP61 Ethernet Controller */ |
| 5946 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17), |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 5947 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5948 | }, |
| 5949 | { /* MCP61 Ethernet Controller */ |
| 5950 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18), |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 5951 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5952 | }, |
| 5953 | { /* MCP61 Ethernet Controller */ |
| 5954 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19), |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 5955 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5956 | }, |
| 5957 | { /* MCP65 Ethernet Controller */ |
| 5958 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5959 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5960 | }, |
| 5961 | { /* MCP65 Ethernet Controller */ |
| 5962 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5963 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5964 | }, |
| 5965 | { /* MCP65 Ethernet Controller */ |
| 5966 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5967 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5968 | }, |
| 5969 | { /* MCP65 Ethernet Controller */ |
| 5970 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5971 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5972 | }, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5973 | { /* MCP67 Ethernet Controller */ |
| 5974 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_24), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5975 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5976 | }, |
| 5977 | { /* MCP67 Ethernet Controller */ |
| 5978 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_25), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5979 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5980 | }, |
| 5981 | { /* MCP67 Ethernet Controller */ |
| 5982 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_26), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5983 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5984 | }, |
| 5985 | { /* MCP67 Ethernet Controller */ |
| 5986 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_27), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5987 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5988 | }, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5989 | { /* MCP73 Ethernet Controller */ |
| 5990 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_28), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5991 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5992 | }, |
| 5993 | { /* MCP73 Ethernet Controller */ |
| 5994 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_29), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5995 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5996 | }, |
| 5997 | { /* MCP73 Ethernet Controller */ |
| 5998 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_30), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5999 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 6000 | }, |
| 6001 | { /* MCP73 Ethernet Controller */ |
| 6002 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_31), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6003 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 6004 | }, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6005 | { /* MCP77 Ethernet Controller */ |
| 6006 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_32), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6007 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6008 | }, |
| 6009 | { /* MCP77 Ethernet Controller */ |
| 6010 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_33), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6011 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6012 | }, |
| 6013 | { /* MCP77 Ethernet Controller */ |
| 6014 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_34), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6015 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6016 | }, |
| 6017 | { /* MCP77 Ethernet Controller */ |
| 6018 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6019 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 6020 | }, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6021 | { /* MCP79 Ethernet Controller */ |
| 6022 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_36), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6023 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6024 | }, |
| 6025 | { /* MCP79 Ethernet Controller */ |
| 6026 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_37), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6027 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6028 | }, |
| 6029 | { /* MCP79 Ethernet Controller */ |
| 6030 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_38), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6031 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6032 | }, |
| 6033 | { /* MCP79 Ethernet Controller */ |
| 6034 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_39), |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 6035 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 6036 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6037 | {0,}, |
| 6038 | }; |
| 6039 | |
| 6040 | static struct pci_driver driver = { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 6041 | .name = DRV_NAME, |
| 6042 | .id_table = pci_tbl, |
| 6043 | .probe = nv_probe, |
| 6044 | .remove = __devexit_p(nv_remove), |
| 6045 | .suspend = nv_suspend, |
| 6046 | .resume = nv_resume, |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 6047 | .shutdown = nv_shutdown, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6048 | }; |
| 6049 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6050 | static int __init init_nic(void) |
| 6051 | { |
Jeff Garzik | 2991762 | 2006-08-19 17:48:59 -0400 | [diff] [blame] | 6052 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6053 | } |
| 6054 | |
| 6055 | static void __exit exit_nic(void) |
| 6056 | { |
| 6057 | pci_unregister_driver(&driver); |
| 6058 | } |
| 6059 | |
| 6060 | module_param(max_interrupt_work, int, 0); |
| 6061 | MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt"); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 6062 | module_param(optimization_mode, int, 0); |
| 6063 | MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer."); |
| 6064 | module_param(poll_interval, int, 0); |
| 6065 | MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535."); |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 6066 | module_param(msi, int, 0); |
| 6067 | MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0."); |
| 6068 | module_param(msix, int, 0); |
| 6069 | MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0."); |
| 6070 | module_param(dma_64bit, int, 0); |
| 6071 | MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0."); |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 6072 | module_param(phy_cross, int, 0); |
| 6073 | MODULE_PARM_DESC(phy_cross, "Phy crossover detection for Realtek 8201 phy is enabled by setting to 1 and disabled by setting to 0."); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6074 | |
| 6075 | MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>"); |
| 6076 | MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver"); |
| 6077 | MODULE_LICENSE("GPL"); |
| 6078 | |
| 6079 | MODULE_DEVICE_TABLE(pci, pci_tbl); |
| 6080 | |
| 6081 | module_init(init_nic); |
| 6082 | module_exit(exit_nic); |