blob: b1d3076dfe5103cd56ffb57df39985c45e5c83a9 [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_triflex.c - Compaq PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * based upon
7 *
8 * triflex.c
9 *
10 * IDE Chipset driver for the Compaq TriFlex IDE controller.
11 *
12 * Known to work with the Compaq Workstation 5x00 series.
13 *
14 * Copyright (C) 2002 Hewlett-Packard Development Group, L.P.
15 * Author: Torben Mathiasen <torben.mathiasen@hp.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 *
30 * Loosely based on the piix & svwks drivers.
31 *
32 * Documentation:
33 * Not publically available.
34 */
35
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/blkdev.h>
41#include <linux/delay.h>
42#include <scsi/scsi_host.h>
43#include <linux/libata.h>
44
45#define DRV_NAME "pata_triflex"
Jeff Garzika0fcdc02007-03-09 07:24:15 -050046#define DRV_VERSION "0.2.8"
Jeff Garzik669a5db2006-08-29 18:12:40 -040047
48/**
Alan Coxc9619222006-09-26 17:53:38 +010049 * triflex_prereset - probe begin
Jeff Garzik669a5db2006-08-29 18:12:40 -040050 * @ap: ATA port
Tejun Heod4b2bab2007-02-02 16:50:52 +090051 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040052 *
53 * Set up cable type and use generic probe init
54 */
55
Tejun Heod4b2bab2007-02-02 16:50:52 +090056static int triflex_prereset(struct ata_port *ap, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040057{
58 static const struct pci_bits triflex_enable_bits[] = {
59 { 0x80, 1, 0x01, 0x01 },
60 { 0x80, 1, 0x02, 0x02 }
61 };
62
63 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Jeff Garzik85cd7252006-08-31 00:03:49 -040064
Alan Coxc9619222006-09-26 17:53:38 +010065 if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no]))
66 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +090067
68 return ata_std_prereset(ap, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -040069}
70
71
72
73static void triflex_error_handler(struct ata_port *ap)
74{
Alan Coxc9619222006-09-26 17:53:38 +010075 ata_bmdma_drive_eh(ap, triflex_prereset, ata_std_softreset, NULL, ata_std_postreset);
Jeff Garzik669a5db2006-08-29 18:12:40 -040076}
77
78/**
79 * triflex_load_timing - timing configuration
80 * @ap: ATA interface
81 * @adev: Device on the bus
82 * @speed: speed to configure
83 *
84 * The Triflex has one set of timings per device per channel. This
85 * means we must do some switching. As the PIO and DMA timings don't
86 * match we have to do some reloading unlike PIIX devices where tuning
87 * tricks can avoid it.
88 */
89
90static void triflex_load_timing(struct ata_port *ap, struct ata_device *adev, int speed)
91{
92 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
93 u32 timing = 0;
94 u32 triflex_timing, old_triflex_timing;
95 int channel_offset = ap->port_no ? 0x74: 0x70;
96 unsigned int is_slave = (adev->devno != 0);
97
98
99 pci_read_config_dword(pdev, channel_offset, &old_triflex_timing);
100 triflex_timing = old_triflex_timing;
101
102 switch(speed)
103 {
104 case XFER_MW_DMA_2:
105 timing = 0x0103;break;
106 case XFER_MW_DMA_1:
107 timing = 0x0203;break;
108 case XFER_MW_DMA_0:
109 timing = 0x0808;break;
110 case XFER_SW_DMA_2:
111 case XFER_SW_DMA_1:
112 case XFER_SW_DMA_0:
113 timing = 0x0F0F;break;
114 case XFER_PIO_4:
115 timing = 0x0202;break;
116 case XFER_PIO_3:
117 timing = 0x0204;break;
118 case XFER_PIO_2:
119 timing = 0x0404;break;
120 case XFER_PIO_1:
121 timing = 0x0508;break;
122 case XFER_PIO_0:
123 timing = 0x0808;break;
124 default:
125 BUG();
126 }
127 triflex_timing &= ~ (0xFFFF << (16 * is_slave));
128 triflex_timing |= (timing << (16 * is_slave));
129
130 if (triflex_timing != old_triflex_timing)
131 pci_write_config_dword(pdev, channel_offset, triflex_timing);
132}
133
134/**
135 * triflex_set_piomode - set initial PIO mode data
136 * @ap: ATA interface
137 * @adev: ATA device
138 *
139 * Use the timing loader to set up the PIO mode. We have to do this
140 * because DMA start/stop will only be called once DMA occurs. If there
141 * has been no DMA then the PIO timings are still needed.
142 */
143static void triflex_set_piomode(struct ata_port *ap, struct ata_device *adev)
144{
145 triflex_load_timing(ap, adev, adev->pio_mode);
146}
147
148/**
149 * triflex_dma_start - DMA start callback
150 * @qc: Command in progress
151 *
152 * Usually drivers set the DMA timing at the point the set_dmamode call
153 * is made. Triflex however requires we load new timings on the
154 * transition or keep matching PIO/DMA pairs (ie MWDMA2/PIO4 etc).
155 * We load the DMA timings just before starting DMA and then restore
156 * the PIO timing when the DMA is finished.
157 */
158
159static void triflex_bmdma_start(struct ata_queued_cmd *qc)
160{
161 triflex_load_timing(qc->ap, qc->dev, qc->dev->dma_mode);
162 ata_bmdma_start(qc);
163}
164
165/**
166 * triflex_dma_stop - DMA stop callback
167 * @ap: ATA interface
168 * @adev: ATA device
169 *
170 * We loaded new timings in dma_start, as a result we need to restore
171 * the PIO timings in dma_stop so that the next command issue gets the
172 * right clock values.
173 */
174
175static void triflex_bmdma_stop(struct ata_queued_cmd *qc)
176{
177 ata_bmdma_stop(qc);
178 triflex_load_timing(qc->ap, qc->dev, qc->dev->pio_mode);
179}
180
181static struct scsi_host_template triflex_sht = {
182 .module = THIS_MODULE,
183 .name = DRV_NAME,
184 .ioctl = ata_scsi_ioctl,
185 .queuecommand = ata_scsi_queuecmd,
186 .can_queue = ATA_DEF_QUEUE,
187 .this_id = ATA_SHT_THIS_ID,
188 .sg_tablesize = LIBATA_MAX_PRD,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400189 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
190 .emulated = ATA_SHT_EMULATED,
191 .use_clustering = ATA_SHT_USE_CLUSTERING,
192 .proc_name = DRV_NAME,
193 .dma_boundary = ATA_DMA_BOUNDARY,
194 .slave_configure = ata_scsi_slave_config,
Tejun Heoafdfe892006-11-29 11:26:47 +0900195 .slave_destroy = ata_scsi_slave_destroy,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400196 .bios_param = ata_std_bios_param,
197};
198
199static struct ata_port_operations triflex_port_ops = {
200 .port_disable = ata_port_disable,
201 .set_piomode = triflex_set_piomode,
202 .mode_filter = ata_pci_default_filter,
203
204 .tf_load = ata_tf_load,
205 .tf_read = ata_tf_read,
206 .check_status = ata_check_status,
207 .exec_command = ata_exec_command,
208 .dev_select = ata_std_dev_select,
209
210 .freeze = ata_bmdma_freeze,
211 .thaw = ata_bmdma_thaw,
212 .error_handler = triflex_error_handler,
213 .post_internal_cmd = ata_bmdma_post_internal_cmd,
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500214 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400215
216 .bmdma_setup = ata_bmdma_setup,
217 .bmdma_start = triflex_bmdma_start,
218 .bmdma_stop = triflex_bmdma_stop,
219 .bmdma_status = ata_bmdma_status,
220
221 .qc_prep = ata_qc_prep,
222 .qc_issue = ata_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400223
Tejun Heo0d5ff562007-02-01 15:06:36 +0900224 .data_xfer = ata_data_xfer,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400225
226 .irq_handler = ata_interrupt,
227 .irq_clear = ata_bmdma_irq_clear,
Akira Iguchi246ce3b2007-01-26 16:27:58 +0900228 .irq_on = ata_irq_on,
229 .irq_ack = ata_irq_ack,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400230
231 .port_start = ata_port_start,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400232};
233
234static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id)
235{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200236 static const struct ata_port_info info = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400237 .sht = &triflex_sht,
238 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
239 .pio_mask = 0x1f,
240 .mwdma_mask = 0x07,
241 .port_ops = &triflex_port_ops
242 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200243 const struct ata_port_info *ppi[] = { &info, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400244 static int printed_version;
245
246 if (!printed_version++)
247 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
248
Tejun Heo1626aeb2007-05-04 12:43:58 +0200249 return ata_pci_init_one(dev, ppi);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400250}
251
252static const struct pci_device_id triflex[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400253 { PCI_VDEVICE(COMPAQ, PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE), },
254
255 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400256};
257
258static struct pci_driver triflex_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400259 .name = DRV_NAME,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400260 .id_table = triflex,
261 .probe = triflex_init_one,
Alan30ced0f2006-11-22 16:57:36 +0000262 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900263#ifdef CONFIG_PM
Alan30ced0f2006-11-22 16:57:36 +0000264 .suspend = ata_pci_device_suspend,
265 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900266#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400267};
268
269static int __init triflex_init(void)
270{
271 return pci_register_driver(&triflex_pci_driver);
272}
273
Jeff Garzik669a5db2006-08-29 18:12:40 -0400274static void __exit triflex_exit(void)
275{
276 pci_unregister_driver(&triflex_pci_driver);
277}
278
Jeff Garzik669a5db2006-08-29 18:12:40 -0400279MODULE_AUTHOR("Alan Cox");
280MODULE_DESCRIPTION("low-level driver for Compaq Triflex");
281MODULE_LICENSE("GPL");
282MODULE_DEVICE_TABLE(pci, triflex);
283MODULE_VERSION(DRV_VERSION);
284
285module_init(triflex_init);
286module_exit(triflex_exit);