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gerrit-public.fairphone.software / kernel / msm-4.19 / 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 / . / include / asm-ppc / open_pic.h
blob: 58545e4cdbc0f6c564d2fe9f953fbd5e76de6873 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame^]1/*
2 * include/asm-ppc/open_pic.h -- OpenPIC Interrupt Handling
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 *
10 */
11
12#ifndef _PPC_KERNEL_OPEN_PIC_H
13#define _PPC_KERNEL_OPEN_PIC_H
14
15#include <linux/config.h>
16#include <linux/irq.h>
17
18#define OPENPIC_SIZE 0x40000
19
20/*
21 * Non-offset'ed vector numbers
22 */
23
24#define OPENPIC_VEC_TIMER 110 /* and up */
25#define OPENPIC_VEC_IPI 118 /* and up */
26#define OPENPIC_VEC_SPURIOUS 255
27
28/* OpenPIC IRQ controller structure */
29extern struct hw_interrupt_type open_pic;
30
31/* OpenPIC IPI controller structure */
32#ifdef CONFIG_SMP
33extern struct hw_interrupt_type open_pic_ipi;
34#endif /* CONFIG_SMP */
35
36extern u_int OpenPIC_NumInitSenses;
37extern u_char *OpenPIC_InitSenses;
38extern void __iomem * OpenPIC_Addr;
39extern int epic_serial_mode;
40
41/* Exported functions */
42extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr);
43extern void openpic_init(int linux_irq_offset);
44extern void openpic_init_nmi_irq(u_int irq);
45extern void openpic_hookup_cascade(u_int irq, char *name,
46 int (*cascade_fn)(struct pt_regs *));
47extern u_int openpic_irq(void);
48extern void openpic_eoi(void);
49extern void openpic_request_IPIs(void);
50extern void do_openpic_setup_cpu(void);
51extern int openpic_get_irq(struct pt_regs *regs);
52extern void openpic_reset_processor_phys(u_int cpumask);
53extern void openpic_setup_ISU(int isu_num, unsigned long addr);
54extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
55extern void smp_openpic_message_pass(int target, int msg, unsigned long data,
56 int wait);
57extern void openpic_set_k2_cascade(int irq);
58extern void openpic_set_priority(u_int pri);
59
60extern inline int openpic_to_irq(int irq)
61{
62 /* IRQ 0 usually means 'disabled'.. don't mess with it
63 * exceptions to this (sandpoint maybe?)
64 * shouldn't use openpic_to_irq
65 */
66 if (irq != 0){
67 return irq += NUM_8259_INTERRUPTS;
68 } else {
69 return 0;
70 }
71}
72/* Support for second openpic on G5 macs */
73
74// FIXME: To be replaced by sane cascaded controller management */
75
76#define PMAC_OPENPIC2_OFFSET 128
77
78#define OPENPIC2_VEC_TIMER 110 /* and up */
79#define OPENPIC2_VEC_IPI 118 /* and up */
80#define OPENPIC2_VEC_SPURIOUS 127
81
82
83extern void* OpenPIC2_Addr;
84
85/* Exported functions */
86extern void openpic2_set_sources(int first_irq, int num_irqs, void *isr);
87extern void openpic2_init(int linux_irq_offset);
88extern void openpic2_init_nmi_irq(u_int irq);
89extern u_int openpic2_irq(void);
90extern void openpic2_eoi(void);
91extern int openpic2_get_irq(struct pt_regs *regs);
92extern void openpic2_setup_ISU(int isu_num, unsigned long addr);
93#endif /* _PPC_KERNEL_OPEN_PIC_H */