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Christian Lamparter32ddf072008-08-08 21:17:37 +02001#ifndef P54COMMON_H
2#define P54COMMON_H
Michael Wueff1a592007-09-25 18:11:01 -07003
4/*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
10 * Based on the islsm (softmac prism54) driver, which is:
11 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18struct bootrec {
19 __le32 code;
20 __le32 len;
21 u32 data[0];
22} __attribute__((packed));
23
24struct bootrec_exp_if {
25 __le16 role;
26 __le16 if_id;
27 __le16 variant;
28 __le16 btm_compat;
29 __le16 top_compat;
30} __attribute__((packed));
31
Christian Lamparter4e416a62008-09-01 22:48:41 +020032struct bootrec_desc {
33 __le16 modes;
34 __le16 flags;
35 __le32 rx_start;
36 __le32 rx_end;
37 u8 headroom;
38 u8 tailroom;
39 u8 unimportant[6];
40 u8 rates[16];
41} __attribute__((packed));
42
Michael Wueff1a592007-09-25 18:11:01 -070043#define BR_CODE_MIN 0x80000000
44#define BR_CODE_COMPONENT_ID 0x80000001
45#define BR_CODE_COMPONENT_VERSION 0x80000002
46#define BR_CODE_DEPENDENT_IF 0x80000003
47#define BR_CODE_EXPOSED_IF 0x80000004
48#define BR_CODE_DESCR 0x80000101
49#define BR_CODE_MAX 0x8FFFFFFF
50#define BR_CODE_END_OF_BRA 0xFF0000FF
51#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
52
Michael Wueff1a592007-09-25 18:11:01 -070053/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
54
55struct pda_entry {
56 __le16 len; /* includes both code and data */
57 __le16 code;
58 u8 data[0];
59} __attribute__ ((packed));
60
61struct eeprom_pda_wrap {
Johannes Berg8c282932008-02-29 13:56:33 +010062 __le32 magic;
63 __le16 pad;
64 __le16 len;
65 __le32 arm_opcode;
Michael Wueff1a592007-09-25 18:11:01 -070066 u8 data[0];
67} __attribute__ ((packed));
68
69struct pda_iq_autocal_entry {
70 __le16 freq;
71 __le16 iq_param[4];
72} __attribute__ ((packed));
73
74struct pda_channel_output_limit {
75 __le16 freq;
76 u8 val_bpsk;
77 u8 val_qpsk;
78 u8 val_16qam;
79 u8 val_64qam;
80 u8 rate_set_mask;
81 u8 rate_set_size;
82} __attribute__ ((packed));
83
84struct pda_pa_curve_data_sample_rev0 {
85 u8 rf_power;
86 u8 pa_detector;
87 u8 pcv;
88} __attribute__ ((packed));
89
90struct pda_pa_curve_data_sample_rev1 {
91 u8 rf_power;
92 u8 pa_detector;
93 u8 data_barker;
94 u8 data_bpsk;
95 u8 data_qpsk;
96 u8 data_16qam;
97 u8 data_64qam;
Christian Lamparter154e3af2008-08-23 22:15:25 +020098} __attribute__ ((packed));
99
100struct p54_pa_curve_data_sample {
101 u8 rf_power;
102 u8 pa_detector;
103 u8 data_barker;
104 u8 data_bpsk;
105 u8 data_qpsk;
106 u8 data_16qam;
107 u8 data_64qam;
Michael Wueff1a592007-09-25 18:11:01 -0700108 u8 padding;
109} __attribute__ ((packed));
110
111struct pda_pa_curve_data {
112 u8 cal_method_rev;
113 u8 channels;
114 u8 points_per_channel;
115 u8 padding;
116 u8 data[0];
117} __attribute__ ((packed));
118
119/*
120 * this defines the PDR codes used to build PDAs as defined in document
121 * number 553155. The current implementation mirrors version 1.1 of the
122 * document and lists only PDRs supported by the ARM platform.
123 */
124
125/* common and choice range (0x0000 - 0x0fff) */
126#define PDR_END 0x0000
127#define PDR_MANUFACTURING_PART_NUMBER 0x0001
128#define PDR_PDA_VERSION 0x0002
129#define PDR_NIC_SERIAL_NUMBER 0x0003
130
131#define PDR_MAC_ADDRESS 0x0101
132#define PDR_REGULATORY_DOMAIN_LIST 0x0103
133#define PDR_TEMPERATURE_TYPE 0x0107
134
135#define PDR_PRISM_PCI_IDENTIFIER 0x0402
136
137/* ARM range (0x1000 - 0x1fff) */
138#define PDR_COUNTRY_INFORMATION 0x1000
139#define PDR_INTERFACE_LIST 0x1001
140#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
141#define PDR_OEM_NAME 0x1003
142#define PDR_PRODUCT_NAME 0x1004
143#define PDR_UTF8_OEM_NAME 0x1005
144#define PDR_UTF8_PRODUCT_NAME 0x1006
145#define PDR_COUNTRY_LIST 0x1007
146#define PDR_DEFAULT_COUNTRY 0x1008
147
148#define PDR_ANTENNA_GAIN 0x1100
149
150#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
151#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
152#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
153#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
154#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
155#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
156#define PDR_REGULATORY_POWER_LIMITS 0x1907
157#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
158#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
159#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
160
161/* reserved range (0x2000 - 0x7fff) */
162
163/* customer range (0x8000 - 0xffff) */
164#define PDR_BASEBAND_REGISTERS 0x8000
165#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
166
167/* stored in skb->cb */
168struct memrecord {
169 u32 start_addr;
170 u32 end_addr;
Michael Wueff1a592007-09-25 18:11:01 -0700171};
172
173struct p54_eeprom_lm86 {
174 __le16 offset;
175 __le16 len;
176 u8 data[0];
177} __attribute__ ((packed));
178
179struct p54_rx_hdr {
180 __le16 magic;
181 __le16 len;
182 __le16 freq;
183 u8 antenna;
184 u8 rate;
185 u8 rssi;
186 u8 quality;
187 u16 unknown2;
Christian Lampartera0db6632008-09-06 02:56:04 +0200188 __le32 tsf32;
189 __le32 unalloc0;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200190 u8 align[0];
Michael Wueff1a592007-09-25 18:11:01 -0700191} __attribute__ ((packed));
192
193struct p54_frame_sent_hdr {
194 u8 status;
195 u8 retries;
196 __le16 ack_rssi;
197 __le16 seq;
198 u16 rate;
199} __attribute__ ((packed));
200
201struct p54_tx_control_allocdata {
202 u8 rateset[8];
Christian Lamparteraaa15532008-08-09 19:20:47 -0500203 u8 unalloc0[2];
204 u8 key_type;
205 u8 key_len;
206 u8 key[16];
207 u8 hw_queue;
208 u8 unalloc1[9];
209 u8 tx_antenna;
Michael Wueff1a592007-09-25 18:11:01 -0700210 u8 output_power;
Christian Lamparteraaa15532008-08-09 19:20:47 -0500211 u8 cts_rate;
212 u8 unalloc2[3];
Michael Wueff1a592007-09-25 18:11:01 -0700213 u8 align[0];
214} __attribute__ ((packed));
215
216struct p54_tx_control_filter {
217 __le16 filter_type;
Christian Lampartere0a58ea2008-09-03 22:25:20 +0200218 u8 mac_addr[ETH_ALEN];
219 u8 bssid[ETH_ALEN];
220 u8 rx_antenna;
221 u8 rx_align;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200222 union {
223 struct {
224 __le32 basic_rate_mask;
225 u8 rts_rates[8];
226 __le32 rx_addr;
227 __le16 max_rx;
228 __le16 rxhw;
229 __le16 wakeup_timer;
230 __le16 unalloc0;
231 } v1 __attribute__ ((packed));
232 struct {
233 __le32 rx_addr;
234 __le16 max_rx;
235 __le16 rxhw;
236 __le16 timer;
237 __le16 unalloc0;
238 __le32 unalloc1;
239 } v2 __attribute__ ((packed));
240 } __attribute__ ((packed));
Michael Wueff1a592007-09-25 18:11:01 -0700241} __attribute__ ((packed));
242
Christian Lamparter19c19d52008-09-03 22:25:25 +0200243#define P54_TX_CONTROL_FILTER_V1_LEN (sizeof(struct p54_tx_control_filter))
244#define P54_TX_CONTROL_FILTER_V2_LEN (sizeof(struct p54_tx_control_filter)-8)
245
Michael Wueff1a592007-09-25 18:11:01 -0700246struct p54_tx_control_channel {
Christian Lamparter154e3af2008-08-23 22:15:25 +0200247 __le16 flags;
248 __le16 dwell;
Michael Wueff1a592007-09-25 18:11:01 -0700249 u8 padding1[20];
250 struct pda_iq_autocal_entry iq_autocal;
251 u8 pa_points_per_curve;
252 u8 val_barker;
253 u8 val_bpsk;
254 u8 val_qpsk;
255 u8 val_16qam;
256 u8 val_64qam;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200257 struct p54_pa_curve_data_sample curve_data[8];
Christian Lamparter154e3af2008-08-23 22:15:25 +0200258 u8 dup_bpsk;
259 u8 dup_qpsk;
260 u8 dup_16qam;
261 u8 dup_64qam;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200262 union {
263 struct {
264 __le16 rssical_mul;
265 __le16 rssical_add;
266 } v1 __attribute__ ((packed));
267
268 struct {
269 __le32 basic_rate_mask;
270 u8 rts_rates[8];
271 __le16 rssical_mul;
272 __le16 rssical_add;
273 } v2 __attribute__ ((packed));
274 } __attribute__ ((packed));
Michael Wueff1a592007-09-25 18:11:01 -0700275} __attribute__ ((packed));
276
Christian Lamparter19c19d52008-09-03 22:25:25 +0200277#define P54_TX_CONTROL_CHANNEL_V1_LEN (sizeof(struct p54_tx_control_channel)-12)
278#define P54_TX_CONTROL_CHANNEL_V2_LEN (sizeof(struct p54_tx_control_channel))
279
Michael Wueff1a592007-09-25 18:11:01 -0700280struct p54_tx_control_led {
281 __le16 mode;
282 __le16 led_temporary;
283 __le16 led_permanent;
284 __le16 duration;
285} __attribute__ ((packed));
286
287struct p54_tx_vdcf_queues {
288 __le16 aifs;
289 __le16 cwmin;
290 __le16 cwmax;
291 __le16 txop;
292} __attribute__ ((packed));
293
294struct p54_tx_control_vdcf {
295 u8 padding;
296 u8 slottime;
297 u8 magic1;
298 u8 magic2;
299 struct p54_tx_vdcf_queues queue[8];
300 u8 pad2[4];
301 __le16 frameburst;
302} __attribute__ ((packed));
303
Christian Lampartercc6de662008-09-06 02:56:23 +0200304struct p54_statistics {
305 __le32 rx_success;
306 __le32 rx_bad_fcs;
307 __le32 rx_abort;
308 __le32 rx_abort_phy;
309 __le32 rts_success;
310 __le32 rts_fail;
311 __le32 tsf32;
312 __le32 airtime;
313 __le32 noise;
314 __le32 unkn[10]; /* CCE / CCA / RADAR */
315} __attribute__ ((packed));
316
Christian Lamparter1b997532008-09-06 14:25:58 +0200317struct p54_tx_control_xbow_synth {
318 __le16 magic1;
319 __le16 magic2;
320 __le16 freq;
321 u32 padding[5];
322} __attribute__ ((packed));
323
Christian Lamparter32ddf072008-08-08 21:17:37 +0200324#endif /* P54COMMON_H */