blob: 1fe9aa5068eaf29a2b5096a75ed4007e91870926 [file] [log] [blame]
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +09001/*
2 * Exceptions for specific devices. Usually work-arounds for fatal design flaws.
3 * Derived from fixup.c of i386 tree.
4 */
5
6#include <linux/pci.h>
7#include <linux/init.h>
Sander Eikelenboom058a2e12014-02-14 11:55:13 -07008#include <linux/vgaarb.h>
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +09009
10#include <asm/machvec.h>
11
12/*
13 * Fixup to mark boot BIOS video selected by BIOS before it changes
14 *
15 * From information provided by "Jon Smirl" <jonsmirl@gmail.com>
16 *
17 * The standard boot ROM sequence for an x86 machine uses the BIOS
18 * to select an initial video card for boot display. This boot video
19 * card will have it's BIOS copied to C0000 in system RAM.
20 * IORESOURCE_ROM_SHADOW is used to associate the boot video
21 * card with this copy. On laptops this copy has to be used since
22 * the main ROM may be compressed or combined with another image.
Sander Eikelenboom058a2e12014-02-14 11:55:13 -070023 * See pci_map_rom() for use of this flag. Before marking the device
24 * with IORESOURCE_ROM_SHADOW check if a vga_default_device is already set
25 * by either arch cde or vga-arbitration, if so only apply the fixup to this
26 * already determined primary video card.
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +090027 */
28
Greg Kroah-Hartman5b5e76e2012-12-21 14:05:13 -080029static void pci_fixup_video(struct pci_dev *pdev)
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +090030{
31 struct pci_dev *bridge;
32 struct pci_bus *bus;
33 u16 config;
34
Fengguang Wuf9445a32012-07-25 15:15:13 +080035 if ((strcmp(ia64_platform_name, "dig") != 0)
36 && (strcmp(ia64_platform_name, "hpzx1") != 0))
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +090037 return;
38 /* Maybe, this machine supports legacy memory map. */
39
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +090040 /* Is VGA routed to us? */
41 bus = pdev->bus;
42 while (bus) {
43 bridge = bus->self;
44
45 /*
46 * From information provided by
47 * "David Miller" <davem@davemloft.net>
48 * The bridge control register is valid for PCI header
49 * type BRIDGE, or CARDBUS. Host to PCI controllers use
50 * PCI header type NORMAL.
51 */
Yijing Wang11a3bd02014-05-04 12:23:40 +080052 if (bridge && (pci_is_bridge(bridge))) {
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +090053 pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
54 &config);
55 if (!(config & PCI_BRIDGE_CTL_VGA))
56 return;
57 }
58 bus = bus->parent;
59 }
Sander Eikelenboom058a2e12014-02-14 11:55:13 -070060 if (!vga_default_device() || pdev == vga_default_device()) {
61 pci_read_config_word(pdev, PCI_COMMAND, &config);
62 if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
63 pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;
64 dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
65 vga_set_default_device(pdev);
66 }
Eiichiro Oiwa6b5c76b2006-10-23 15:14:07 +090067 }
68}
Sander Eikelenboom058a2e12014-02-14 11:55:13 -070069DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
70 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);