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gerrit-public.fairphone.software / kernel / msm-4.19 / 2264d9c74dda1b6835ab7858204073547457dfd0 / . / arch / x86 / include / asm / intel_rdt.h
blob: c0d0a6e6448c6958b837e886adf5939091a6d64e [file] [log] [blame]
Fenghua Yu113c6092016-10-22 06:19:54 -0700[diff] [blame]1#ifndef _ASM_X86_INTEL_RDT_H
2#define _ASM_X86_INTEL_RDT_H
3
4#define IA32_L3_CBM_BASE 0xc90
Fenghua Yuc1c7c3f2016-10-22 06:19:55 -0700[diff] [blame]5#define IA32_L2_CBM_BASE 0xd10
Fenghua Yu113c6092016-10-22 06:19:54 -0700[diff] [blame]6
Fenghua Yuc1c7c3f2016-10-22 06:19:55 -0700[diff] [blame]7/**
8 * struct rdt_resource - attributes of an RDT resource
9 * @enabled: Is this feature enabled on this machine
10 * @capable: Is this feature available on this machine
11 * @name: Name to use in "schemata" file
12 * @num_closid: Number of CLOSIDs available
13 * @max_cbm: Largest Cache Bit Mask allowed
14 * @min_cbm_bits: Minimum number of consecutive bits to be set
15 * in a cache bit mask
16 * @domains: All domains for this resource
17 * @num_domains: Number of domains active
18 * @msr_base: Base MSR address for CBMs
19 * @tmp_cbms: Scratch space when updating schemata
20 * @cache_level: Which cache level defines scope of this domain
21 * @cbm_idx_multi: Multiplier of CBM index
22 * @cbm_idx_offset: Offset of CBM index. CBM index is computed by:
23 * closid * cbm_idx_multi + cbm_idx_offset
24 */
25struct rdt_resource {
26 bool enabled;
27 bool capable;
28 char *name;
29 int num_closid;
30 int cbm_len;
31 int min_cbm_bits;
32 u32 max_cbm;
33 struct list_head domains;
34 int num_domains;
35 int msr_base;
36 u32 *tmp_cbms;
37 int cache_level;
38 int cbm_idx_multi;
39 int cbm_idx_offset;
40};
41
Tony Luck2264d9c2016-10-28 15:04:41 -0700[diff] [blame^]42/**
43 * struct rdt_domain - group of cpus sharing an RDT resource
44 * @list: all instances of this resource
45 * @id: unique id for this instance
46 * @cpu_mask: which cpus share this resource
47 * @cbm: array of cache bit masks (indexed by CLOSID)
48 */
49struct rdt_domain {
50 struct list_head list;
51 int id;
52 struct cpumask cpu_mask;
53 u32 *cbm;
54};
55
56/**
57 * struct msr_param - set a range of MSRs from a domain
58 * @res: The resource to use
59 * @low: Beginning index from base MSR
60 * @high: End index
61 */
62struct msr_param {
63 struct rdt_resource *res;
64 int low;
65 int high;
66};
67
68extern struct mutex rdtgroup_mutex;
69
Fenghua Yuc1c7c3f2016-10-22 06:19:55 -0700[diff] [blame]70extern struct rdt_resource rdt_resources_all[];
71
72enum {
73 RDT_RESOURCE_L3,
74 RDT_RESOURCE_L3DATA,
75 RDT_RESOURCE_L3CODE,
76 RDT_RESOURCE_L2,
77
78 /* Must be the last */
79 RDT_NUM_RESOURCES,
80};
81
82#define for_each_capable_rdt_resource(r) \
83 for (r = rdt_resources_all; r < rdt_resources_all + RDT_NUM_RESOURCES;\
84 r++) \
85 if (r->capable)
86
Tony Luck2264d9c2016-10-28 15:04:41 -0700[diff] [blame^]87#define for_each_enabled_rdt_resource(r) \
88 for (r = rdt_resources_all; r < rdt_resources_all + RDT_NUM_RESOURCES;\
89 r++) \
90 if (r->enabled)
91
Fenghua Yuc1c7c3f2016-10-22 06:19:55 -0700[diff] [blame]92/* CPUID.(EAX=10H, ECX=ResID=1).EAX */
93union cpuid_0x10_1_eax {
94 struct {
95 unsigned int cbm_len:5;
96 } split;
97 unsigned int full;
98};
99
100/* CPUID.(EAX=10H, ECX=ResID=1).EDX */
101union cpuid_0x10_1_edx {
102 struct {
103 unsigned int cos_max:16;
104 } split;
105 unsigned int full;
106};
Tony Luck2264d9c2016-10-28 15:04:41 -0700[diff] [blame^]107
108void rdt_cbm_update(void *arg);
Fenghua Yu113c6092016-10-22 06:19:54 -0700[diff] [blame]109#endif /* _ASM_X86_INTEL_RDT_H */