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gerrit-public.fairphone.software / kernel / msm-4.19 / 2ab9f3c04bc1935c12bc6d9fbd7a1d1e72695d0b / . / arch / arm / boot / dts / exynos4x12.dtsi
blob: 0e24d852d97fbd5b8c43b4bb8aa47b884b227d90 [file] [log] [blame]
Tomasz Figa0f7238a2012-11-06 15:09:04 +0900[diff] [blame]1/*
2 * Samsung's Exynos4x12 SoCs device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
8 * based board files can include this file and provide values for board specfic
9 * bindings.
10 *
11 * Note: This file does not include device nodes for all the controllers in
12 * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
13 * nodes can be added to this file.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
Padmavathi Venna37992792013-06-18 00:02:08 +0900[diff] [blame]20#include "exynos4.dtsi"
21#include "exynos4x12-pinctrl.dtsi"
Tomasz Figa0f7238a2012-11-06 15:09:04 +0900[diff] [blame]22
23/ {
Tomasz Figa64a57432012-11-07 08:50:40 +0900[diff] [blame]24 aliases {
25 pinctrl0 = &pinctrl_0;
26 pinctrl1 = &pinctrl_1;
27 pinctrl2 = &pinctrl_2;
28 pinctrl3 = &pinctrl_3;
29 };
30
Sylwester Nawrocki2ab9f3c2013-08-06 02:49:44 +0900[diff] [blame^]31 pd_isp: isp-power-domain@10023CA0 {
32 compatible = "samsung,exynos4210-pd";
33 reg = <0x10023CA0 0x20>;
34 };
35
Thomas Abrahamd8bafc82013-03-09 17:11:33 +0900[diff] [blame]36 clock: clock-controller@0x10030000 {
37 compatible = "samsung,exynos4412-clock";
38 reg = <0x10030000 0x20000>;
39 #clock-cells = <1>;
40 };
41
Tomasz Figa64a57432012-11-07 08:50:40 +0900[diff] [blame]42 pinctrl_0: pinctrl@11400000 {
Kukjin Kimb533c862013-01-02 16:05:42 -0800[diff] [blame]43 compatible = "samsung,exynos4x12-pinctrl";
Tomasz Figa64a57432012-11-07 08:50:40 +0900[diff] [blame]44 reg = <0x11400000 0x1000>;
45 interrupts = <0 47 0>;
46 };
47
48 pinctrl_1: pinctrl@11000000 {
Kukjin Kimb533c862013-01-02 16:05:42 -0800[diff] [blame]49 compatible = "samsung,exynos4x12-pinctrl";
Tomasz Figa64a57432012-11-07 08:50:40 +0900[diff] [blame]50 reg = <0x11000000 0x1000>;
51 interrupts = <0 46 0>;
52
53 wakup_eint: wakeup-interrupt-controller {
54 compatible = "samsung,exynos4210-wakeup-eint";
55 interrupt-parent = <&gic>;
56 interrupts = <0 32 0>;
57 };
58 };
59
60 pinctrl_2: pinctrl@03860000 {
Kukjin Kimb533c862013-01-02 16:05:42 -0800[diff] [blame]61 compatible = "samsung,exynos4x12-pinctrl";
Tomasz Figa64a57432012-11-07 08:50:40 +0900[diff] [blame]62 reg = <0x03860000 0x1000>;
63 interrupt-parent = <&combiner>;
64 interrupts = <10 0>;
65 };
66
67 pinctrl_3: pinctrl@106E0000 {
Kukjin Kimb533c862013-01-02 16:05:42 -0800[diff] [blame]68 compatible = "samsung,exynos4x12-pinctrl";
Tomasz Figa64a57432012-11-07 08:50:40 +0900[diff] [blame]69 reg = <0x106E0000 0x1000>;
70 interrupts = <0 72 0>;
71 };
Sachin Kamat3a0d48f2013-04-04 13:51:10 +0900[diff] [blame]72
73 g2d@10800000 {
74 compatible = "samsung,exynos4212-g2d";
75 reg = <0x10800000 0x1000>;
76 interrupts = <0 89 0>;
Sachin Kamatcfc56522013-06-10 17:52:27 +0900[diff] [blame]77 clocks = <&clock 177>, <&clock 277>;
78 clock-names = "sclk_fimg2d", "fimg2d";
Sachin Kamat3a0d48f2013-04-04 13:51:10 +0900[diff] [blame]79 status = "disabled";
80 };
Tomasz Figa0f7238a2012-11-06 15:09:04 +0900[diff] [blame]81};