| Ian Lartey | 992bee4 | 2010-07-31 00:32:11 +0100 | [diff] [blame] | 1 | /* |
| 2 | * wm8741.h -- WM8423 ASoC driver |
| 3 | * |
| 4 | * Copyright 2010 Wolfson Microelectronics, plc |
| 5 | * |
| 6 | * Author: Ian Lartey <ian@opensource.wolfsonmicro.com> |
| 7 | * |
| 8 | * Based on wm8753.h |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _WM8741_H |
| 16 | #define _WM8741_H |
| 17 | |
| 18 | /* |
| 19 | * Register values. |
| 20 | */ |
| 21 | #define WM8741_DACLLSB_ATTENUATION 0x00 |
| 22 | #define WM8741_DACLMSB_ATTENUATION 0x01 |
| 23 | #define WM8741_DACRLSB_ATTENUATION 0x02 |
| 24 | #define WM8741_DACRMSB_ATTENUATION 0x03 |
| 25 | #define WM8741_VOLUME_CONTROL 0x04 |
| 26 | #define WM8741_FORMAT_CONTROL 0x05 |
| 27 | #define WM8741_FILTER_CONTROL 0x06 |
| 28 | #define WM8741_MODE_CONTROL_1 0x07 |
| 29 | #define WM8741_MODE_CONTROL_2 0x08 |
| 30 | #define WM8741_RESET 0x09 |
| 31 | #define WM8741_ADDITIONAL_CONTROL_1 0x20 |
| 32 | |
| 33 | #define WM8741_REGISTER_COUNT 11 |
| 34 | #define WM8741_MAX_REGISTER 0x20 |
| 35 | |
| 36 | /* |
| 37 | * Field Definitions. |
| 38 | */ |
| 39 | |
| 40 | /* |
| 41 | * R0 (0x00) - DACLLSB_ATTENUATION |
| 42 | */ |
| 43 | #define WM8741_UPDATELL 0x0020 /* UPDATELL */ |
| 44 | #define WM8741_UPDATELL_MASK 0x0020 /* UPDATELL */ |
| 45 | #define WM8741_UPDATELL_SHIFT 5 /* UPDATELL */ |
| 46 | #define WM8741_UPDATELL_WIDTH 1 /* UPDATELL */ |
| 47 | #define WM8741_LAT_4_0_MASK 0x001F /* LAT[4:0] - [4:0] */ |
| 48 | #define WM8741_LAT_4_0_SHIFT 0 /* LAT[4:0] - [4:0] */ |
| 49 | #define WM8741_LAT_4_0_WIDTH 5 /* LAT[4:0] - [4:0] */ |
| 50 | |
| 51 | /* |
| 52 | * R1 (0x01) - DACLMSB_ATTENUATION |
| 53 | */ |
| 54 | #define WM8741_UPDATELM 0x0020 /* UPDATELM */ |
| 55 | #define WM8741_UPDATELM_MASK 0x0020 /* UPDATELM */ |
| 56 | #define WM8741_UPDATELM_SHIFT 5 /* UPDATELM */ |
| 57 | #define WM8741_UPDATELM_WIDTH 1 /* UPDATELM */ |
| 58 | #define WM8741_LAT_9_5_0_MASK 0x001F /* LAT[9:5] - [4:0] */ |
| 59 | #define WM8741_LAT_9_5_0_SHIFT 0 /* LAT[9:5] - [4:0] */ |
| 60 | #define WM8741_LAT_9_5_0_WIDTH 5 /* LAT[9:5] - [4:0] */ |
| 61 | |
| 62 | /* |
| 63 | * R2 (0x02) - DACRLSB_ATTENUATION |
| 64 | */ |
| 65 | #define WM8741_UPDATERL 0x0020 /* UPDATERL */ |
| 66 | #define WM8741_UPDATERL_MASK 0x0020 /* UPDATERL */ |
| 67 | #define WM8741_UPDATERL_SHIFT 5 /* UPDATERL */ |
| 68 | #define WM8741_UPDATERL_WIDTH 1 /* UPDATERL */ |
| 69 | #define WM8741_RAT_4_0_MASK 0x001F /* RAT[4:0] - [4:0] */ |
| 70 | #define WM8741_RAT_4_0_SHIFT 0 /* RAT[4:0] - [4:0] */ |
| 71 | #define WM8741_RAT_4_0_WIDTH 5 /* RAT[4:0] - [4:0] */ |
| 72 | |
| 73 | /* |
| 74 | * R3 (0x03) - DACRMSB_ATTENUATION |
| 75 | */ |
| 76 | #define WM8741_UPDATERM 0x0020 /* UPDATERM */ |
| 77 | #define WM8741_UPDATERM_MASK 0x0020 /* UPDATERM */ |
| 78 | #define WM8741_UPDATERM_SHIFT 5 /* UPDATERM */ |
| 79 | #define WM8741_UPDATERM_WIDTH 1 /* UPDATERM */ |
| 80 | #define WM8741_RAT_9_5_0_MASK 0x001F /* RAT[9:5] - [4:0] */ |
| 81 | #define WM8741_RAT_9_5_0_SHIFT 0 /* RAT[9:5] - [4:0] */ |
| 82 | #define WM8741_RAT_9_5_0_WIDTH 5 /* RAT[9:5] - [4:0] */ |
| 83 | |
| 84 | /* |
| 85 | * R4 (0x04) - VOLUME_CONTROL |
| 86 | */ |
| 87 | #define WM8741_AMUTE 0x0080 /* AMUTE */ |
| 88 | #define WM8741_AMUTE_MASK 0x0080 /* AMUTE */ |
| 89 | #define WM8741_AMUTE_SHIFT 7 /* AMUTE */ |
| 90 | #define WM8741_AMUTE_WIDTH 1 /* AMUTE */ |
| 91 | #define WM8741_ZFLAG_MASK 0x0060 /* ZFLAG - [6:5] */ |
| 92 | #define WM8741_ZFLAG_SHIFT 5 /* ZFLAG - [6:5] */ |
| 93 | #define WM8741_ZFLAG_WIDTH 2 /* ZFLAG - [6:5] */ |
| 94 | #define WM8741_IZD 0x0010 /* IZD */ |
| 95 | #define WM8741_IZD_MASK 0x0010 /* IZD */ |
| 96 | #define WM8741_IZD_SHIFT 4 /* IZD */ |
| 97 | #define WM8741_IZD_WIDTH 1 /* IZD */ |
| 98 | #define WM8741_SOFT 0x0008 /* SOFT MUTE */ |
| 99 | #define WM8741_SOFT_MASK 0x0008 /* SOFT MUTE */ |
| 100 | #define WM8741_SOFT_SHIFT 3 /* SOFT MUTE */ |
| 101 | #define WM8741_SOFT_WIDTH 1 /* SOFT MUTE */ |
| 102 | #define WM8741_ATC 0x0004 /* ATC */ |
| 103 | #define WM8741_ATC_MASK 0x0004 /* ATC */ |
| 104 | #define WM8741_ATC_SHIFT 2 /* ATC */ |
| 105 | #define WM8741_ATC_WIDTH 1 /* ATC */ |
| 106 | #define WM8741_ATT2DB 0x0002 /* ATT2DB */ |
| 107 | #define WM8741_ATT2DB_MASK 0x0002 /* ATT2DB */ |
| 108 | #define WM8741_ATT2DB_SHIFT 1 /* ATT2DB */ |
| 109 | #define WM8741_ATT2DB_WIDTH 1 /* ATT2DB */ |
| 110 | #define WM8741_VOL_RAMP 0x0001 /* VOL_RAMP */ |
| 111 | #define WM8741_VOL_RAMP_MASK 0x0001 /* VOL_RAMP */ |
| 112 | #define WM8741_VOL_RAMP_SHIFT 0 /* VOL_RAMP */ |
| 113 | #define WM8741_VOL_RAMP_WIDTH 1 /* VOL_RAMP */ |
| 114 | |
| 115 | /* |
| 116 | * R5 (0x05) - FORMAT_CONTROL |
| 117 | */ |
| 118 | #define WM8741_PWDN 0x0080 /* PWDN */ |
| 119 | #define WM8741_PWDN_MASK 0x0080 /* PWDN */ |
| 120 | #define WM8741_PWDN_SHIFT 7 /* PWDN */ |
| 121 | #define WM8741_PWDN_WIDTH 1 /* PWDN */ |
| 122 | #define WM8741_REV 0x0040 /* REV */ |
| 123 | #define WM8741_REV_MASK 0x0040 /* REV */ |
| 124 | #define WM8741_REV_SHIFT 6 /* REV */ |
| 125 | #define WM8741_REV_WIDTH 1 /* REV */ |
| 126 | #define WM8741_BCP 0x0020 /* BCP */ |
| 127 | #define WM8741_BCP_MASK 0x0020 /* BCP */ |
| 128 | #define WM8741_BCP_SHIFT 5 /* BCP */ |
| 129 | #define WM8741_BCP_WIDTH 1 /* BCP */ |
| 130 | #define WM8741_LRP 0x0010 /* LRP */ |
| 131 | #define WM8741_LRP_MASK 0x0010 /* LRP */ |
| 132 | #define WM8741_LRP_SHIFT 4 /* LRP */ |
| 133 | #define WM8741_LRP_WIDTH 1 /* LRP */ |
| 134 | #define WM8741_FMT_MASK 0x000C /* FMT - [3:2] */ |
| 135 | #define WM8741_FMT_SHIFT 2 /* FMT - [3:2] */ |
| 136 | #define WM8741_FMT_WIDTH 2 /* FMT - [3:2] */ |
| 137 | #define WM8741_IWL_MASK 0x0003 /* IWL - [1:0] */ |
| 138 | #define WM8741_IWL_SHIFT 0 /* IWL - [1:0] */ |
| 139 | #define WM8741_IWL_WIDTH 2 /* IWL - [1:0] */ |
| 140 | |
| 141 | /* |
| 142 | * R6 (0x06) - FILTER_CONTROL |
| 143 | */ |
| 144 | #define WM8741_ZFLAG_HI 0x0080 /* ZFLAG_HI */ |
| 145 | #define WM8741_ZFLAG_HI_MASK 0x0080 /* ZFLAG_HI */ |
| 146 | #define WM8741_ZFLAG_HI_SHIFT 7 /* ZFLAG_HI */ |
| 147 | #define WM8741_ZFLAG_HI_WIDTH 1 /* ZFLAG_HI */ |
| 148 | #define WM8741_DEEMPH_MASK 0x0060 /* DEEMPH - [6:5] */ |
| 149 | #define WM8741_DEEMPH_SHIFT 5 /* DEEMPH - [6:5] */ |
| 150 | #define WM8741_DEEMPH_WIDTH 2 /* DEEMPH - [6:5] */ |
| 151 | #define WM8741_DSDFILT_MASK 0x0018 /* DSDFILT - [4:3] */ |
| 152 | #define WM8741_DSDFILT_SHIFT 3 /* DSDFILT - [4:3] */ |
| 153 | #define WM8741_DSDFILT_WIDTH 2 /* DSDFILT - [4:3] */ |
| 154 | #define WM8741_FIRSEL_MASK 0x0007 /* FIRSEL - [2:0] */ |
| 155 | #define WM8741_FIRSEL_SHIFT 0 /* FIRSEL - [2:0] */ |
| 156 | #define WM8741_FIRSEL_WIDTH 3 /* FIRSEL - [2:0] */ |
| 157 | |
| 158 | /* |
| 159 | * R7 (0x07) - MODE_CONTROL_1 |
| 160 | */ |
| 161 | #define WM8741_MODE8X 0x0080 /* MODE8X */ |
| 162 | #define WM8741_MODE8X_MASK 0x0080 /* MODE8X */ |
| 163 | #define WM8741_MODE8X_SHIFT 7 /* MODE8X */ |
| 164 | #define WM8741_MODE8X_WIDTH 1 /* MODE8X */ |
| 165 | #define WM8741_OSR_MASK 0x0060 /* OSR - [6:5] */ |
| 166 | #define WM8741_OSR_SHIFT 5 /* OSR - [6:5] */ |
| 167 | #define WM8741_OSR_WIDTH 2 /* OSR - [6:5] */ |
| 168 | #define WM8741_SR_MASK 0x001C /* SR - [4:2] */ |
| 169 | #define WM8741_SR_SHIFT 2 /* SR - [4:2] */ |
| 170 | #define WM8741_SR_WIDTH 3 /* SR - [4:2] */ |
| 171 | #define WM8741_MODESEL_MASK 0x0003 /* MODESEL - [1:0] */ |
| 172 | #define WM8741_MODESEL_SHIFT 0 /* MODESEL - [1:0] */ |
| 173 | #define WM8741_MODESEL_WIDTH 2 /* MODESEL - [1:0] */ |
| 174 | |
| 175 | /* |
| 176 | * R8 (0x08) - MODE_CONTROL_2 |
| 177 | */ |
| 178 | #define WM8741_DSD_GAIN 0x0040 /* DSD_GAIN */ |
| 179 | #define WM8741_DSD_GAIN_MASK 0x0040 /* DSD_GAIN */ |
| 180 | #define WM8741_DSD_GAIN_SHIFT 6 /* DSD_GAIN */ |
| 181 | #define WM8741_DSD_GAIN_WIDTH 1 /* DSD_GAIN */ |
| 182 | #define WM8741_SDOUT 0x0020 /* SDOUT */ |
| 183 | #define WM8741_SDOUT_MASK 0x0020 /* SDOUT */ |
| 184 | #define WM8741_SDOUT_SHIFT 5 /* SDOUT */ |
| 185 | #define WM8741_SDOUT_WIDTH 1 /* SDOUT */ |
| 186 | #define WM8741_DOUT 0x0010 /* DOUT */ |
| 187 | #define WM8741_DOUT_MASK 0x0010 /* DOUT */ |
| 188 | #define WM8741_DOUT_SHIFT 4 /* DOUT */ |
| 189 | #define WM8741_DOUT_WIDTH 1 /* DOUT */ |
| 190 | #define WM8741_DIFF_MASK 0x000C /* DIFF - [3:2] */ |
| 191 | #define WM8741_DIFF_SHIFT 2 /* DIFF - [3:2] */ |
| 192 | #define WM8741_DIFF_WIDTH 2 /* DIFF - [3:2] */ |
| 193 | #define WM8741_DITHER_MASK 0x0003 /* DITHER - [1:0] */ |
| 194 | #define WM8741_DITHER_SHIFT 0 /* DITHER - [1:0] */ |
| 195 | #define WM8741_DITHER_WIDTH 2 /* DITHER - [1:0] */ |
| 196 | |
| Sergej Sawazki | c354b54 | 2015-05-13 11:39:01 +0200 | [diff] [blame] | 197 | /* DIFF field values */ |
| 198 | #define WM8741_DIFF_MODE_STEREO 0 /* stereo normal */ |
| 199 | #define WM8741_DIFF_MODE_STEREO_REVERSED 2 /* stereo reversed */ |
| 200 | #define WM8741_DIFF_MODE_MONO_LEFT 1 /* mono left */ |
| 201 | #define WM8741_DIFF_MODE_MONO_RIGHT 3 /* mono right */ |
| 202 | |
| Ian Lartey | 992bee4 | 2010-07-31 00:32:11 +0100 | [diff] [blame] | 203 | /* |
| 204 | * R32 (0x20) - ADDITONAL_CONTROL_1 |
| 205 | */ |
| 206 | #define WM8741_DSD_LEVEL 0x0002 /* DSD_LEVEL */ |
| 207 | #define WM8741_DSD_LEVEL_MASK 0x0002 /* DSD_LEVEL */ |
| 208 | #define WM8741_DSD_LEVEL_SHIFT 1 /* DSD_LEVEL */ |
| 209 | #define WM8741_DSD_LEVEL_WIDTH 1 /* DSD_LEVEL */ |
| 210 | #define WM8741_DSD_NO_NOTCH 0x0001 /* DSD_NO_NOTCH */ |
| 211 | #define WM8741_DSD_NO_NOTCH_MASK 0x0001 /* DSD_NO_NOTCH */ |
| 212 | #define WM8741_DSD_NO_NOTCH_SHIFT 0 /* DSD_NO_NOTCH */ |
| 213 | #define WM8741_DSD_NO_NOTCH_WIDTH 1 /* DSD_NO_NOTCH */ |
| 214 | |
| 215 | #define WM8741_SYSCLK 0 |
| 216 | |
| Sergej Sawazki | c354b54 | 2015-05-13 11:39:01 +0200 | [diff] [blame] | 217 | struct wm8741_platform_data { |
| 218 | u32 diff_mode; /* Differential Output Mode */ |
| 219 | }; |
| 220 | |
| Ian Lartey | 992bee4 | 2010-07-31 00:32:11 +0100 | [diff] [blame] | 221 | #endif |