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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2007-2009 Texas Instruments
Tony Lindgren646e3ed2008-10-06 15:49:36 +03008 *
9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
Tony Lindgren1dbae812005-11-10 14:26:51 +000012 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070013 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
Tony Lindgren1dbae812005-11-10 14:26:51 +000015 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
Tony Lindgren1dbae812005-11-10 14:26:51 +000019#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Paul Walmsley2f135ea2009-06-19 19:08:25 -060023#include <linux/clk.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000024
Tony Lindgren120db2c2006-04-02 17:46:27 +010025#include <asm/tlb.h>
Tony Lindgren120db2c2006-04-02 17:46:27 +010026#include <asm/mach/map.h>
27
Tony Lindgren45c3eb72012-11-30 08:41:50 -080028#include <linux/omap-dma.h>
Tony Lindgren646e3ed2008-10-06 15:49:36 +030029
Tony Lindgrendc843282012-10-03 11:23:43 -070030#include "omap_hwmod.h"
Tony Lindgrendbc04162012-08-31 10:59:07 -070031#include "soc.h"
Tony Lindgrenee0839c2012-02-24 10:34:35 -080032#include "iomap.h"
33#include "voltage.h"
34#include "powerdomain.h"
35#include "clockdomain.h"
36#include "common.h"
Vaibhav Hiremathe30384a2012-05-29 15:26:41 +053037#include "clock.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070038#include "clock2xxx.h"
Paul Walmsley657ebfa2010-02-22 22:09:20 -070039#include "clock3xxx.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070040#include "clock44xx.h"
Tony Lindgren1d5aef42012-10-03 16:36:40 -070041#include "omap-pm.h"
Paul Walmsley3e6ece12012-10-17 00:46:45 +000042#include "sdrc.h"
Paul Walmsleyb6a42262012-10-29 20:50:21 -060043#include "control.h"
Tony Lindgren3d82cbb2012-10-15 12:50:46 -070044#include "serial.h"
Tony Lindgrenbf027ca2012-10-29 13:54:06 -070045#include "sram.h"
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060046#include "cm2xxx.h"
47#include "cm3xxx.h"
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060048#include "prm.h"
49#include "cm.h"
50#include "prcm_mpu44xx.h"
51#include "prminst44xx.h"
52#include "cminst44xx.h"
Paul Walmsley63a293e2012-11-21 16:15:16 -070053#include "prm2xxx.h"
54#include "prm3xxx.h"
55#include "prm44xx.h"
Tony Lindgren1dbae812005-11-10 14:26:51 +000056
Tony Lindgren1dbae812005-11-10 14:26:51 +000057/*
Rajendra Nayakff931c82013-03-21 16:34:52 +053058 * omap_clk_init: points to a function that does the SoC-specific
59 * clock initializations
60 */
61int (*omap_clk_init)(void);
62
63/*
Tony Lindgren1dbae812005-11-10 14:26:51 +000064 * The machine specific code may provide the extra mapping besides the
65 * default mapping provided here.
66 */
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030067
Tony Lindgrene48f8142012-03-06 11:49:22 -080068#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030069static struct map_desc omap24xx_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000070 {
71 .virtual = L3_24XX_VIRT,
72 .pfn = __phys_to_pfn(L3_24XX_PHYS),
73 .length = L3_24XX_SIZE,
74 .type = MT_DEVICE
75 },
Kyungmin Park09f21ed2008-02-20 15:30:06 -080076 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030077 .virtual = L4_24XX_VIRT,
78 .pfn = __phys_to_pfn(L4_24XX_PHYS),
79 .length = L4_24XX_SIZE,
Syed Mohammed Khasim72d0f1c2006-12-06 17:14:05 -080080 .type = MT_DEVICE
81 },
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030082};
83
Tony Lindgren59b479e2011-01-27 16:39:40 -080084#ifdef CONFIG_SOC_OMAP2420
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030085static struct map_desc omap242x_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000086 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070087 .virtual = DSP_MEM_2420_VIRT,
88 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
89 .length = DSP_MEM_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080090 .type = MT_DEVICE
91 },
92 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070093 .virtual = DSP_IPI_2420_VIRT,
94 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
95 .length = DSP_IPI_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080096 .type = MT_DEVICE
97 },
98 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070099 .virtual = DSP_MMU_2420_VIRT,
100 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
101 .length = DSP_MMU_2420_SIZE,
Tony Lindgren1dbae812005-11-10 14:26:51 +0000102 .type = MT_DEVICE
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300103 },
Tony Lindgren1dbae812005-11-10 14:26:51 +0000104};
105
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300106#endif
107
Tony Lindgren59b479e2011-01-27 16:39:40 -0800108#ifdef CONFIG_SOC_OMAP2430
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300109static struct map_desc omap243x_io_desc[] __initdata = {
110 {
111 .virtual = L4_WK_243X_VIRT,
112 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
113 .length = L4_WK_243X_SIZE,
114 .type = MT_DEVICE
115 },
116 {
117 .virtual = OMAP243X_GPMC_VIRT,
118 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
119 .length = OMAP243X_GPMC_SIZE,
120 .type = MT_DEVICE
121 },
122 {
123 .virtual = OMAP243X_SDRC_VIRT,
124 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
125 .length = OMAP243X_SDRC_SIZE,
126 .type = MT_DEVICE
127 },
128 {
129 .virtual = OMAP243X_SMS_VIRT,
130 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
131 .length = OMAP243X_SMS_SIZE,
132 .type = MT_DEVICE
133 },
134};
135#endif
136#endif
137
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800138#ifdef CONFIG_ARCH_OMAP3
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300139static struct map_desc omap34xx_io_desc[] __initdata = {
140 {
141 .virtual = L3_34XX_VIRT,
142 .pfn = __phys_to_pfn(L3_34XX_PHYS),
143 .length = L3_34XX_SIZE,
144 .type = MT_DEVICE
145 },
146 {
147 .virtual = L4_34XX_VIRT,
148 .pfn = __phys_to_pfn(L4_34XX_PHYS),
149 .length = L4_34XX_SIZE,
150 .type = MT_DEVICE
151 },
152 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300153 .virtual = OMAP34XX_GPMC_VIRT,
154 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
155 .length = OMAP34XX_GPMC_SIZE,
156 .type = MT_DEVICE
157 },
158 {
159 .virtual = OMAP343X_SMS_VIRT,
160 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
161 .length = OMAP343X_SMS_SIZE,
162 .type = MT_DEVICE
163 },
164 {
165 .virtual = OMAP343X_SDRC_VIRT,
166 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
167 .length = OMAP343X_SDRC_SIZE,
168 .type = MT_DEVICE
169 },
170 {
171 .virtual = L4_PER_34XX_VIRT,
172 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
173 .length = L4_PER_34XX_SIZE,
174 .type = MT_DEVICE
175 },
176 {
177 .virtual = L4_EMU_34XX_VIRT,
178 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
179 .length = L4_EMU_34XX_SIZE,
180 .type = MT_DEVICE
181 },
Tony Lindgrena4f57b82010-04-30 12:57:14 -0700182#if defined(CONFIG_DEBUG_LL) && \
183 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
184 {
185 .virtual = ZOOM_UART_VIRT,
186 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
187 .length = SZ_1M,
188 .type = MT_DEVICE
189 },
190#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300191};
192#endif
Hemant Pedanekar01001712011-02-16 08:31:39 -0800193
Kevin Hilman33959552012-05-10 11:10:07 -0700194#ifdef CONFIG_SOC_TI81XX
Hemant Pedanekara9203602011-12-13 10:46:44 -0800195static struct map_desc omapti81xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800196 {
197 .virtual = L4_34XX_VIRT,
198 .pfn = __phys_to_pfn(L4_34XX_PHYS),
199 .length = L4_34XX_SIZE,
200 .type = MT_DEVICE
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800201 }
202};
203#endif
204
Kevin Hilmanbb6abcf2012-05-10 11:10:07 -0700205#ifdef CONFIG_SOC_AM33XX
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800206static struct map_desc omapam33xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800207 {
208 .virtual = L4_34XX_VIRT,
209 .pfn = __phys_to_pfn(L4_34XX_PHYS),
210 .length = L4_34XX_SIZE,
211 .type = MT_DEVICE
212 },
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800213 {
214 .virtual = L4_WK_AM33XX_VIRT,
215 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
216 .length = L4_WK_AM33XX_SIZE,
217 .type = MT_DEVICE
218 }
Hemant Pedanekar01001712011-02-16 08:31:39 -0800219};
220#endif
221
Santosh Shilimkar44169072009-05-28 14:16:04 -0700222#ifdef CONFIG_ARCH_OMAP4
223static struct map_desc omap44xx_io_desc[] __initdata = {
224 {
225 .virtual = L3_44XX_VIRT,
226 .pfn = __phys_to_pfn(L3_44XX_PHYS),
227 .length = L3_44XX_SIZE,
228 .type = MT_DEVICE,
229 },
230 {
231 .virtual = L4_44XX_VIRT,
232 .pfn = __phys_to_pfn(L4_44XX_PHYS),
233 .length = L4_44XX_SIZE,
234 .type = MT_DEVICE,
235 },
236 {
Santosh Shilimkar44169072009-05-28 14:16:04 -0700237 .virtual = L4_PER_44XX_VIRT,
238 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
239 .length = L4_PER_44XX_SIZE,
240 .type = MT_DEVICE,
241 },
Santosh Shilimkar137d1052011-06-25 18:04:31 -0700242#ifdef CONFIG_OMAP4_ERRATA_I688
243 {
244 .virtual = OMAP4_SRAM_VA,
245 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
246 .length = PAGE_SIZE,
247 .type = MT_MEMORY_SO,
248 },
249#endif
250
Santosh Shilimkar44169072009-05-28 14:16:04 -0700251};
252#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300253
R Sricharan05e152c2012-06-05 16:21:32 +0530254#ifdef CONFIG_SOC_OMAP5
255static struct map_desc omap54xx_io_desc[] __initdata = {
256 {
257 .virtual = L3_54XX_VIRT,
258 .pfn = __phys_to_pfn(L3_54XX_PHYS),
259 .length = L3_54XX_SIZE,
260 .type = MT_DEVICE,
261 },
262 {
263 .virtual = L4_54XX_VIRT,
264 .pfn = __phys_to_pfn(L4_54XX_PHYS),
265 .length = L4_54XX_SIZE,
266 .type = MT_DEVICE,
267 },
268 {
269 .virtual = L4_WK_54XX_VIRT,
270 .pfn = __phys_to_pfn(L4_WK_54XX_PHYS),
271 .length = L4_WK_54XX_SIZE,
272 .type = MT_DEVICE,
273 },
274 {
275 .virtual = L4_PER_54XX_VIRT,
276 .pfn = __phys_to_pfn(L4_PER_54XX_PHYS),
277 .length = L4_PER_54XX_SIZE,
278 .type = MT_DEVICE,
279 },
280};
281#endif
282
Tony Lindgren59b479e2011-01-27 16:39:40 -0800283#ifdef CONFIG_SOC_OMAP2420
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600284void __init omap242x_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800285{
286 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
287 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800288}
289#endif
290
Tony Lindgren59b479e2011-01-27 16:39:40 -0800291#ifdef CONFIG_SOC_OMAP2430
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600292void __init omap243x_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800293{
294 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
295 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800296}
297#endif
298
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800299#ifdef CONFIG_ARCH_OMAP3
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600300void __init omap3_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800301{
302 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800303}
304#endif
305
Kevin Hilman33959552012-05-10 11:10:07 -0700306#ifdef CONFIG_SOC_TI81XX
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600307void __init ti81xx_map_io(void)
Hemant Pedanekar01001712011-02-16 08:31:39 -0800308{
Hemant Pedanekara9203602011-12-13 10:46:44 -0800309 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
Hemant Pedanekar01001712011-02-16 08:31:39 -0800310}
311#endif
312
Kevin Hilmanbb6abcf2012-05-10 11:10:07 -0700313#ifdef CONFIG_SOC_AM33XX
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600314void __init am33xx_map_io(void)
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800315{
316 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800317}
318#endif
319
320#ifdef CONFIG_ARCH_OMAP4
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600321void __init omap4_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800322{
323 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
Santosh Shilimkar2ec1fc42012-02-02 19:33:55 +0530324 omap_barriers_init();
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800325}
326#endif
327
R Sricharan05e152c2012-06-05 16:21:32 +0530328#ifdef CONFIG_SOC_OMAP5
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600329void __init omap5_map_io(void)
R Sricharan05e152c2012-06-05 16:21:32 +0530330{
331 iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
332}
333#endif
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600334/*
335 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
336 *
337 * Sets the CORE DPLL3 M2 divider to the same value that it's at
338 * currently. This has the effect of setting the SDRC SDRAM AC timing
339 * registers to the values currently defined by the kernel. Currently
340 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
341 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
342 * or passes along the return value of clk_set_rate().
343 */
344static int __init _omap2_init_reprogram_sdrc(void)
345{
346 struct clk *dpll3_m2_ck;
347 int v = -EINVAL;
348 long rate;
349
350 if (!cpu_is_omap34xx())
351 return 0;
352
353 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
Aaro Koskinene281f7e2010-11-30 14:17:58 +0000354 if (IS_ERR(dpll3_m2_ck))
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600355 return -EINVAL;
356
357 rate = clk_get_rate(dpll3_m2_ck);
358 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
359 v = clk_set_rate(dpll3_m2_ck, rate);
360 if (v)
361 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
362
363 clk_put(dpll3_m2_ck);
364
365 return v;
366}
367
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700368static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
369{
370 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
371}
372
Tony Lindgren7b250af2011-10-04 18:26:28 -0700373static void __init omap_hwmod_init_postsetup(void)
Tony Lindgren120db2c2006-04-02 17:46:27 +0100374{
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700375 u8 postsetup_state;
376
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700377 /* Set the default postsetup state for all hwmods */
378#ifdef CONFIG_PM_RUNTIME
379 postsetup_state = _HWMOD_STATE_IDLE;
380#else
381 postsetup_state = _HWMOD_STATE_ENABLED;
382#endif
383 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
Benoit Cousson55d2cb02010-05-12 17:54:36 +0200384
Kevin Hilman53da4ce2010-12-09 09:13:48 -0600385 omap_pm_if_early_init();
Paul Walmsley48057342010-12-21 15:25:10 -0700386}
387
Paul Walmsley16110792012-01-25 12:57:46 -0700388#ifdef CONFIG_SOC_OMAP2420
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700389void __init omap2420_init_early(void)
390{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600391 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
392 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
393 OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
394 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
395 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600396 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
397 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530398 omap2xxx_check_revision();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700399 omap2xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600400 omap2xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700401 omap2xxx_voltagedomains_init();
402 omap242x_powerdomains_init();
403 omap242x_clockdomains_init();
404 omap2420_hwmod_init();
405 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530406 omap_clk_init = omap2420_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700407}
Shawn Guobbd707a2012-04-26 16:06:50 +0800408
409void __init omap2420_init_late(void)
410{
411 omap_mux_late_init();
412 omap2_common_pm_late_init();
413 omap2_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530414 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800415}
Paul Walmsley16110792012-01-25 12:57:46 -0700416#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700417
Paul Walmsley16110792012-01-25 12:57:46 -0700418#ifdef CONFIG_SOC_OMAP2430
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700419void __init omap2430_init_early(void)
420{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600421 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
422 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
423 OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
424 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
425 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600426 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
427 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530428 omap2xxx_check_revision();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700429 omap2xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600430 omap2xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700431 omap2xxx_voltagedomains_init();
432 omap243x_powerdomains_init();
433 omap243x_clockdomains_init();
434 omap2430_hwmod_init();
435 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530436 omap_clk_init = omap2430_clk_init;
Tony Lindgren7b250af2011-10-04 18:26:28 -0700437}
Shawn Guobbd707a2012-04-26 16:06:50 +0800438
439void __init omap2430_init_late(void)
440{
441 omap_mux_late_init();
442 omap2_common_pm_late_init();
443 omap2_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530444 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800445}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530446#endif
Tony Lindgren7b250af2011-10-04 18:26:28 -0700447
448/*
449 * Currently only board-omap3beagle.c should call this because of the
450 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
451 */
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530452#ifdef CONFIG_ARCH_OMAP3
Tony Lindgren7b250af2011-10-04 18:26:28 -0700453void __init omap3_init_early(void)
454{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600455 omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
456 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
457 OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
458 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
459 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600460 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
461 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530462 omap3xxx_check_revision();
463 omap3xxx_check_features();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700464 omap3xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600465 omap3xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700466 omap3xxx_voltagedomains_init();
467 omap3xxx_powerdomains_init();
468 omap3xxx_clockdomains_init();
469 omap3xxx_hwmod_init();
470 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530471 omap_clk_init = omap3xxx_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700472}
473
474void __init omap3430_init_early(void)
475{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700476 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700477}
478
479void __init omap35xx_init_early(void)
480{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700481 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700482}
483
484void __init omap3630_init_early(void)
485{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700486 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700487}
488
489void __init am35xx_init_early(void)
490{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700491 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700492}
493
Hemant Pedanekara9203602011-12-13 10:46:44 -0800494void __init ti81xx_init_early(void)
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700495{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600496 omap2_set_globals_tap(OMAP343X_CLASS,
497 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
498 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
499 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600500 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
501 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530502 omap3xxx_check_revision();
503 ti81xx_check_features();
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700504 omap3xxx_voltagedomains_init();
505 omap3xxx_powerdomains_init();
506 omap3xxx_clockdomains_init();
507 omap3xxx_hwmod_init();
508 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530509 omap_clk_init = omap3xxx_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700510}
Shawn Guobbd707a2012-04-26 16:06:50 +0800511
512void __init omap3_init_late(void)
513{
514 omap_mux_late_init();
515 omap2_common_pm_late_init();
516 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530517 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800518}
519
520void __init omap3430_init_late(void)
521{
522 omap_mux_late_init();
523 omap2_common_pm_late_init();
524 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530525 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800526}
527
528void __init omap35xx_init_late(void)
529{
530 omap_mux_late_init();
531 omap2_common_pm_late_init();
532 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530533 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800534}
535
536void __init omap3630_init_late(void)
537{
538 omap_mux_late_init();
539 omap2_common_pm_late_init();
540 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530541 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800542}
543
544void __init am35xx_init_late(void)
545{
546 omap_mux_late_init();
547 omap2_common_pm_late_init();
548 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530549 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800550}
551
552void __init ti81xx_init_late(void)
553{
554 omap_mux_late_init();
555 omap2_common_pm_late_init();
556 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530557 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800558}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530559#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700560
Afzal Mohammed08f30982012-05-11 00:38:49 +0530561#ifdef CONFIG_SOC_AM33XX
562void __init am33xx_init_early(void)
563{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600564 omap2_set_globals_tap(AM335X_CLASS,
565 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
566 omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
567 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600568 omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
569 omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
Afzal Mohammed08f30982012-05-11 00:38:49 +0530570 omap3xxx_check_revision();
571 ti81xx_check_features();
Vaibhav Hiremathce3fc892012-06-18 00:47:26 -0600572 am33xx_voltagedomains_init();
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -0600573 am33xx_powerdomains_init();
Vaibhav Hiremath9c80f3a2012-06-18 00:47:27 -0600574 am33xx_clockdomains_init();
Vaibhav Hirematha2cfc502012-07-25 13:51:13 -0600575 am33xx_hwmod_init();
576 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530577 omap_clk_init = am33xx_clk_init;
Afzal Mohammed08f30982012-05-11 00:38:49 +0530578}
579#endif
580
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530581#ifdef CONFIG_ARCH_OMAP4
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700582void __init omap4430_init_early(void)
583{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600584 omap2_set_globals_tap(OMAP443X_CLASS,
585 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
586 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
587 OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600588 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
589 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
590 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
591 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
592 omap_prm_base_init();
593 omap_cm_base_init();
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530594 omap4xxx_check_revision();
595 omap4xxx_check_features();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700596 omap44xx_prm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700597 omap44xx_voltagedomains_init();
598 omap44xx_powerdomains_init();
599 omap44xx_clockdomains_init();
600 omap44xx_hwmod_init();
601 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530602 omap_clk_init = omap4xxx_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700603}
Shawn Guobbd707a2012-04-26 16:06:50 +0800604
605void __init omap4430_init_late(void)
606{
607 omap_mux_late_init();
608 omap2_common_pm_late_init();
609 omap4_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530610 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800611}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530612#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700613
R Sricharan05e152c2012-06-05 16:21:32 +0530614#ifdef CONFIG_SOC_OMAP5
615void __init omap5_init_early(void)
616{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600617 omap2_set_globals_tap(OMAP54XX_CLASS,
618 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
619 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
620 OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600621 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
622 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
623 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
624 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
625 omap_prm_base_init();
626 omap_cm_base_init();
R Sricharan05e152c2012-06-05 16:21:32 +0530627 omap5xxx_check_revision();
R Sricharan05e152c2012-06-05 16:21:32 +0530628}
629#endif
630
Tony Lindgrena4ca9db2011-08-22 23:57:23 -0700631void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
Paul Walmsley48057342010-12-21 15:25:10 -0700632 struct omap_sdrc_params *sdrc_cs1)
633{
Tony Lindgrena66cb342011-10-04 13:52:57 -0700634 omap_sram_init();
635
Hemant Pedanekar01001712011-02-16 08:31:39 -0800636 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
Kevin Hilmanaa4b1f62010-03-10 17:16:31 +0000637 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
638 _omap2_init_reprogram_sdrc();
639 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000640}