blob: 2965783fd0f8f63a2a83e2d945b9168fe1b30515 [file] [log] [blame]
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Thierry Reding776dc382013-10-14 14:43:22 +020010#include <linux/host1x.h>
Thierry Redingdf06b752014-06-26 21:41:53 +020011#include <linux/iommu.h>
Thierry Reding776dc382013-10-14 14:43:22 +020012
Thierry Reding1503ca42014-11-24 17:41:23 +010013#include <drm/drm_atomic.h>
Thierry Reding07866962014-11-24 17:08:06 +010014#include <drm/drm_atomic_helper.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include "drm.h"
Arto Merilainende2ba662013-03-22 16:34:08 +020017#include "gem.h"
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000018
19#define DRIVER_NAME "tegra"
20#define DRIVER_DESC "NVIDIA Tegra graphics"
21#define DRIVER_DATE "20120330"
22#define DRIVER_MAJOR 0
23#define DRIVER_MINOR 0
24#define DRIVER_PATCHLEVEL 0
25
Thierry Reding08943e62013-09-26 16:08:18 +020026struct tegra_drm_file {
27 struct list_head contexts;
28};
29
Thierry Reding1503ca42014-11-24 17:41:23 +010030static void tegra_atomic_schedule(struct tegra_drm *tegra,
31 struct drm_atomic_state *state)
32{
33 tegra->commit.state = state;
34 schedule_work(&tegra->commit.work);
35}
36
37static void tegra_atomic_complete(struct tegra_drm *tegra,
38 struct drm_atomic_state *state)
39{
40 struct drm_device *drm = tegra->drm;
41
42 /*
43 * Everything below can be run asynchronously without the need to grab
44 * any modeset locks at all under one condition: It must be guaranteed
45 * that the asynchronous work has either been cancelled (if the driver
46 * supports it, which at least requires that the framebuffers get
47 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
48 * before the new state gets committed on the software side with
49 * drm_atomic_helper_swap_state().
50 *
51 * This scheme allows new atomic state updates to be prepared and
52 * checked in parallel to the asynchronous completion of the previous
53 * update. Which is important since compositors need to figure out the
54 * composition of the next frame right after having submitted the
55 * current layout.
56 */
57
Daniel Vetter1af434a2015-02-22 12:24:19 +010058 drm_atomic_helper_commit_modeset_disables(drm, state);
Thierry Reding1503ca42014-11-24 17:41:23 +010059 drm_atomic_helper_commit_planes(drm, state);
Daniel Vetter1af434a2015-02-22 12:24:19 +010060 drm_atomic_helper_commit_modeset_enables(drm, state);
Thierry Reding1503ca42014-11-24 17:41:23 +010061
62 drm_atomic_helper_wait_for_vblanks(drm, state);
63
64 drm_atomic_helper_cleanup_planes(drm, state);
65 drm_atomic_state_free(state);
66}
67
68static void tegra_atomic_work(struct work_struct *work)
69{
70 struct tegra_drm *tegra = container_of(work, struct tegra_drm,
71 commit.work);
72
73 tegra_atomic_complete(tegra, tegra->commit.state);
74}
75
76static int tegra_atomic_commit(struct drm_device *drm,
77 struct drm_atomic_state *state, bool async)
78{
79 struct tegra_drm *tegra = drm->dev_private;
80 int err;
81
82 err = drm_atomic_helper_prepare_planes(drm, state);
83 if (err)
84 return err;
85
86 /* serialize outstanding asynchronous commits */
87 mutex_lock(&tegra->commit.lock);
88 flush_work(&tegra->commit.work);
89
90 /*
91 * This is the point of no return - everything below never fails except
92 * when the hw goes bonghits. Which means we can commit the new state on
93 * the software side now.
94 */
95
96 drm_atomic_helper_swap_state(drm, state);
97
98 if (async)
99 tegra_atomic_schedule(tegra, state);
100 else
101 tegra_atomic_complete(tegra, state);
102
103 mutex_unlock(&tegra->commit.lock);
104 return 0;
105}
106
Thierry Redingf9914212014-11-26 13:03:57 +0100107static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
108 .fb_create = tegra_fb_create,
109#ifdef CONFIG_DRM_TEGRA_FBDEV
110 .output_poll_changed = tegra_fb_output_poll_changed,
111#endif
Thierry Reding07866962014-11-24 17:08:06 +0100112 .atomic_check = drm_atomic_helper_check,
Thierry Reding1503ca42014-11-24 17:41:23 +0100113 .atomic_commit = tegra_atomic_commit,
Thierry Redingf9914212014-11-26 13:03:57 +0100114};
115
Thierry Reding776dc382013-10-14 14:43:22 +0200116static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000117{
Thierry Reding776dc382013-10-14 14:43:22 +0200118 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Reding386a2a72013-09-24 13:22:17 +0200119 struct tegra_drm *tegra;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000120 int err;
121
Thierry Reding776dc382013-10-14 14:43:22 +0200122 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
Thierry Reding386a2a72013-09-24 13:22:17 +0200123 if (!tegra)
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200124 return -ENOMEM;
125
Thierry Redingdf06b752014-06-26 21:41:53 +0200126 if (iommu_present(&platform_bus_type)) {
Thierry Reding4553f732015-01-19 16:15:04 +0100127 struct iommu_domain_geometry *geometry;
128 u64 start, end;
129
Thierry Redingdf06b752014-06-26 21:41:53 +0200130 tegra->domain = iommu_domain_alloc(&platform_bus_type);
Dan Carpenterbf19b882014-12-04 14:00:35 +0300131 if (!tegra->domain) {
132 err = -ENOMEM;
Thierry Redingdf06b752014-06-26 21:41:53 +0200133 goto free;
134 }
135
Thierry Reding4553f732015-01-19 16:15:04 +0100136 geometry = &tegra->domain->geometry;
137 start = geometry->aperture_start;
138 end = geometry->aperture_end;
139
140 DRM_DEBUG("IOMMU context initialized (aperture: %#llx-%#llx)\n",
141 start, end);
142 drm_mm_init(&tegra->mm, start, end - start + 1);
Thierry Redingdf06b752014-06-26 21:41:53 +0200143 }
144
Thierry Reding386a2a72013-09-24 13:22:17 +0200145 mutex_init(&tegra->clients_lock);
146 INIT_LIST_HEAD(&tegra->clients);
Thierry Reding1503ca42014-11-24 17:41:23 +0100147
148 mutex_init(&tegra->commit.lock);
149 INIT_WORK(&tegra->commit.work, tegra_atomic_work);
150
Thierry Reding386a2a72013-09-24 13:22:17 +0200151 drm->dev_private = tegra;
152 tegra->drm = drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000153
154 drm_mode_config_init(drm);
155
Thierry Redingf9914212014-11-26 13:03:57 +0100156 drm->mode_config.min_width = 0;
157 drm->mode_config.min_height = 0;
158
159 drm->mode_config.max_width = 4096;
160 drm->mode_config.max_height = 4096;
161
162 drm->mode_config.funcs = &tegra_drm_mode_funcs;
163
Thierry Redinge2215322014-06-27 17:19:25 +0200164 err = tegra_drm_fb_prepare(drm);
165 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100166 goto config;
Thierry Redinge2215322014-06-27 17:19:25 +0200167
168 drm_kms_helper_poll_init(drm);
169
Thierry Reding776dc382013-10-14 14:43:22 +0200170 err = host1x_device_init(device);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000171 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100172 goto fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000173
Thierry Reding603f0cc2013-04-22 21:22:14 +0200174 /*
175 * We don't use the drm_irq_install() helpers provided by the DRM
176 * core, so we need to set this manually in order to allow the
177 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
178 */
Ville Syrjälä44238432013-10-04 14:53:37 +0300179 drm->irq_enabled = true;
Thierry Reding603f0cc2013-04-22 21:22:14 +0200180
Thierry Reding42e9ce02015-01-28 14:43:05 +0100181 /* syncpoints are used for full 32-bit hardware VBLANK counters */
Thierry Reding42e9ce02015-01-28 14:43:05 +0100182 drm->max_vblank_count = 0xffffffff;
Thierry Redingcdc630b2015-07-21 16:45:49 +0200183 drm->vblank_disable_allowed = true;
Thierry Reding42e9ce02015-01-28 14:43:05 +0100184
Thierry Reding6e5ff992012-11-28 11:45:47 +0100185 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
186 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100187 goto device;
Thierry Reding6e5ff992012-11-28 11:45:47 +0100188
Thierry Reding31930d42015-07-02 17:04:06 +0200189 drm_mode_config_reset(drm);
190
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000191 err = tegra_drm_fb_init(drm);
192 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100193 goto vblank;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000194
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000195 return 0;
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100196
197vblank:
198 drm_vblank_cleanup(drm);
199device:
200 host1x_device_exit(device);
201fbdev:
202 drm_kms_helper_poll_fini(drm);
203 tegra_drm_fb_free(drm);
204config:
205 drm_mode_config_cleanup(drm);
Thierry Redingdf06b752014-06-26 21:41:53 +0200206
207 if (tegra->domain) {
208 iommu_domain_free(tegra->domain);
209 drm_mm_takedown(&tegra->mm);
210 }
211free:
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100212 kfree(tegra);
213 return err;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000214}
215
216static int tegra_drm_unload(struct drm_device *drm)
217{
Thierry Reding776dc382013-10-14 14:43:22 +0200218 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Redingdf06b752014-06-26 21:41:53 +0200219 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding776dc382013-10-14 14:43:22 +0200220 int err;
221
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000222 drm_kms_helper_poll_fini(drm);
223 tegra_drm_fb_exit(drm);
Thierry Redingf002abc2013-10-14 14:06:02 +0200224 drm_mode_config_cleanup(drm);
Thierry Reding4aa3df72014-11-24 16:27:13 +0100225 drm_vblank_cleanup(drm);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000226
Thierry Reding776dc382013-10-14 14:43:22 +0200227 err = host1x_device_exit(device);
228 if (err < 0)
229 return err;
230
Thierry Redingdf06b752014-06-26 21:41:53 +0200231 if (tegra->domain) {
232 iommu_domain_free(tegra->domain);
233 drm_mm_takedown(&tegra->mm);
234 }
235
Thierry Reding1053f4dd2014-11-04 16:17:55 +0100236 kfree(tegra);
237
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000238 return 0;
239}
240
241static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
242{
Thierry Reding08943e62013-09-26 16:08:18 +0200243 struct tegra_drm_file *fpriv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200244
245 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
246 if (!fpriv)
247 return -ENOMEM;
248
249 INIT_LIST_HEAD(&fpriv->contexts);
250 filp->driver_priv = fpriv;
251
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000252 return 0;
253}
254
Thierry Redingc88c3632013-09-26 16:08:22 +0200255static void tegra_drm_context_free(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200256{
257 context->client->ops->close_channel(context);
258 kfree(context);
259}
260
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000261static void tegra_drm_lastclose(struct drm_device *drm)
262{
Paul Bolle6e601632014-02-09 14:01:33 +0100263#ifdef CONFIG_DRM_TEGRA_FBDEV
Thierry Reding386a2a72013-09-24 13:22:17 +0200264 struct tegra_drm *tegra = drm->dev_private;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000265
Thierry Reding386a2a72013-09-24 13:22:17 +0200266 tegra_fbdev_restore_mode(tegra->fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100267#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000268}
269
Thierry Redingc40f0f12013-10-10 11:00:33 +0200270static struct host1x_bo *
271host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle)
272{
273 struct drm_gem_object *gem;
274 struct tegra_bo *bo;
275
276 gem = drm_gem_object_lookup(drm, file, handle);
277 if (!gem)
278 return NULL;
279
280 mutex_lock(&drm->struct_mutex);
281 drm_gem_object_unreference(gem);
282 mutex_unlock(&drm->struct_mutex);
283
284 bo = to_tegra_bo(gem);
285 return &bo->base;
286}
287
Thierry Reding961e3be2014-06-10 10:25:00 +0200288static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
289 struct drm_tegra_reloc __user *src,
290 struct drm_device *drm,
291 struct drm_file *file)
292{
293 u32 cmdbuf, target;
294 int err;
295
296 err = get_user(cmdbuf, &src->cmdbuf.handle);
297 if (err < 0)
298 return err;
299
300 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
301 if (err < 0)
302 return err;
303
304 err = get_user(target, &src->target.handle);
305 if (err < 0)
306 return err;
307
David Ung31f40f82015-01-20 18:37:35 -0800308 err = get_user(dest->target.offset, &src->target.offset);
Thierry Reding961e3be2014-06-10 10:25:00 +0200309 if (err < 0)
310 return err;
311
312 err = get_user(dest->shift, &src->shift);
313 if (err < 0)
314 return err;
315
316 dest->cmdbuf.bo = host1x_bo_lookup(drm, file, cmdbuf);
317 if (!dest->cmdbuf.bo)
318 return -ENOENT;
319
320 dest->target.bo = host1x_bo_lookup(drm, file, target);
321 if (!dest->target.bo)
322 return -ENOENT;
323
324 return 0;
325}
326
Thierry Redingc40f0f12013-10-10 11:00:33 +0200327int tegra_drm_submit(struct tegra_drm_context *context,
328 struct drm_tegra_submit *args, struct drm_device *drm,
329 struct drm_file *file)
330{
331 unsigned int num_cmdbufs = args->num_cmdbufs;
332 unsigned int num_relocs = args->num_relocs;
333 unsigned int num_waitchks = args->num_waitchks;
334 struct drm_tegra_cmdbuf __user *cmdbufs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100335 (void __user *)(uintptr_t)args->cmdbufs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200336 struct drm_tegra_reloc __user *relocs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100337 (void __user *)(uintptr_t)args->relocs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200338 struct drm_tegra_waitchk __user *waitchks =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100339 (void __user *)(uintptr_t)args->waitchks;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200340 struct drm_tegra_syncpt syncpt;
341 struct host1x_job *job;
342 int err;
343
344 /* We don't yet support other than one syncpt_incr struct per submit */
345 if (args->num_syncpts != 1)
346 return -EINVAL;
347
348 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
349 args->num_relocs, args->num_waitchks);
350 if (!job)
351 return -ENOMEM;
352
353 job->num_relocs = args->num_relocs;
354 job->num_waitchk = args->num_waitchks;
355 job->client = (u32)args->context;
356 job->class = context->client->base.class;
357 job->serialize = true;
358
359 while (num_cmdbufs) {
360 struct drm_tegra_cmdbuf cmdbuf;
361 struct host1x_bo *bo;
362
Dan Carpenter9a991602013-11-08 13:07:37 +0300363 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
364 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200365 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300366 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200367
368 bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
369 if (!bo) {
370 err = -ENOENT;
371 goto fail;
372 }
373
374 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
375 num_cmdbufs--;
376 cmdbufs++;
377 }
378
Thierry Reding961e3be2014-06-10 10:25:00 +0200379 /* copy and resolve relocations from submit */
Thierry Redingc40f0f12013-10-10 11:00:33 +0200380 while (num_relocs--) {
Thierry Reding961e3be2014-06-10 10:25:00 +0200381 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
382 &relocs[num_relocs], drm,
383 file);
384 if (err < 0)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200385 goto fail;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200386 }
387
Dan Carpenter9a991602013-11-08 13:07:37 +0300388 if (copy_from_user(job->waitchk, waitchks,
389 sizeof(*waitchks) * num_waitchks)) {
390 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200391 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300392 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200393
Dan Carpenter9a991602013-11-08 13:07:37 +0300394 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
395 sizeof(syncpt))) {
396 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200397 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300398 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200399
400 job->is_addr_reg = context->client->ops->is_addr_reg;
401 job->syncpt_incrs = syncpt.incrs;
402 job->syncpt_id = syncpt.id;
403 job->timeout = 10000;
404
405 if (args->timeout && args->timeout < 10000)
406 job->timeout = args->timeout;
407
408 err = host1x_job_pin(job, context->client->base.dev);
409 if (err)
410 goto fail;
411
412 err = host1x_job_submit(job);
413 if (err)
414 goto fail_submit;
415
416 args->fence = job->syncpt_end;
417
418 host1x_job_put(job);
419 return 0;
420
421fail_submit:
422 host1x_job_unpin(job);
423fail:
424 host1x_job_put(job);
425 return err;
426}
427
428
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200429#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingc88c3632013-09-26 16:08:22 +0200430static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200431{
Thierry Redingc88c3632013-09-26 16:08:22 +0200432 return (struct tegra_drm_context *)(uintptr_t)context;
433}
434
435static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
436 struct tegra_drm_context *context)
437{
438 struct tegra_drm_context *ctx;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200439
440 list_for_each_entry(ctx, &file->contexts, list)
441 if (ctx == context)
442 return true;
443
444 return false;
445}
446
447static int tegra_gem_create(struct drm_device *drm, void *data,
448 struct drm_file *file)
449{
450 struct drm_tegra_gem_create *args = data;
451 struct tegra_bo *bo;
452
Thierry Reding773af772013-10-04 22:34:01 +0200453 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200454 &args->handle);
455 if (IS_ERR(bo))
456 return PTR_ERR(bo);
457
458 return 0;
459}
460
461static int tegra_gem_mmap(struct drm_device *drm, void *data,
462 struct drm_file *file)
463{
464 struct drm_tegra_gem_mmap *args = data;
465 struct drm_gem_object *gem;
466 struct tegra_bo *bo;
467
468 gem = drm_gem_object_lookup(drm, file, args->handle);
469 if (!gem)
470 return -EINVAL;
471
472 bo = to_tegra_bo(gem);
473
David Herrmann2bc7b0c2013-08-13 14:19:58 +0200474 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200475
476 drm_gem_object_unreference(gem);
477
478 return 0;
479}
480
481static int tegra_syncpt_read(struct drm_device *drm, void *data,
482 struct drm_file *file)
483{
Thierry Reding776dc382013-10-14 14:43:22 +0200484 struct host1x *host = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200485 struct drm_tegra_syncpt_read *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200486 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200487
Thierry Reding776dc382013-10-14 14:43:22 +0200488 sp = host1x_syncpt_get(host, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200489 if (!sp)
490 return -EINVAL;
491
492 args->value = host1x_syncpt_read_min(sp);
493 return 0;
494}
495
496static int tegra_syncpt_incr(struct drm_device *drm, void *data,
497 struct drm_file *file)
498{
Thierry Reding776dc382013-10-14 14:43:22 +0200499 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200500 struct drm_tegra_syncpt_incr *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200501 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200502
Thierry Reding776dc382013-10-14 14:43:22 +0200503 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200504 if (!sp)
505 return -EINVAL;
506
Arto Merilainenebae30b2013-05-29 13:26:08 +0300507 return host1x_syncpt_incr(sp);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200508}
509
510static int tegra_syncpt_wait(struct drm_device *drm, void *data,
511 struct drm_file *file)
512{
Thierry Reding776dc382013-10-14 14:43:22 +0200513 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200514 struct drm_tegra_syncpt_wait *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200515 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200516
Thierry Reding776dc382013-10-14 14:43:22 +0200517 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200518 if (!sp)
519 return -EINVAL;
520
521 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
522 &args->value);
523}
524
525static int tegra_open_channel(struct drm_device *drm, void *data,
526 struct drm_file *file)
527{
Thierry Reding08943e62013-09-26 16:08:18 +0200528 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding386a2a72013-09-24 13:22:17 +0200529 struct tegra_drm *tegra = drm->dev_private;
530 struct drm_tegra_open_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200531 struct tegra_drm_context *context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200532 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200533 int err = -ENODEV;
534
535 context = kzalloc(sizeof(*context), GFP_KERNEL);
536 if (!context)
537 return -ENOMEM;
538
Thierry Reding776dc382013-10-14 14:43:22 +0200539 list_for_each_entry(client, &tegra->clients, list)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200540 if (client->base.class == args->client) {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200541 err = client->ops->open_channel(client, context);
542 if (err)
543 break;
544
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200545 list_add(&context->list, &fpriv->contexts);
546 args->context = (uintptr_t)context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200547 context->client = client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200548 return 0;
549 }
550
551 kfree(context);
552 return err;
553}
554
555static int tegra_close_channel(struct drm_device *drm, void *data,
556 struct drm_file *file)
557{
Thierry Reding08943e62013-09-26 16:08:18 +0200558 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding776dc382013-10-14 14:43:22 +0200559 struct drm_tegra_close_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200560 struct tegra_drm_context *context;
561
562 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200563
Thierry Reding08943e62013-09-26 16:08:18 +0200564 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200565 return -EINVAL;
566
567 list_del(&context->list);
Thierry Redingc88c3632013-09-26 16:08:22 +0200568 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200569
570 return 0;
571}
572
573static int tegra_get_syncpt(struct drm_device *drm, void *data,
574 struct drm_file *file)
575{
Thierry Reding08943e62013-09-26 16:08:18 +0200576 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200577 struct drm_tegra_get_syncpt *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200578 struct tegra_drm_context *context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200579 struct host1x_syncpt *syncpt;
580
Thierry Redingc88c3632013-09-26 16:08:22 +0200581 context = tegra_drm_get_context(args->context);
582
Thierry Reding08943e62013-09-26 16:08:18 +0200583 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200584 return -ENODEV;
585
Thierry Reding53fa7f72013-09-24 15:35:40 +0200586 if (args->index >= context->client->base.num_syncpts)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200587 return -EINVAL;
588
Thierry Reding53fa7f72013-09-24 15:35:40 +0200589 syncpt = context->client->base.syncpts[args->index];
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200590 args->id = host1x_syncpt_id(syncpt);
591
592 return 0;
593}
594
595static int tegra_submit(struct drm_device *drm, void *data,
596 struct drm_file *file)
597{
Thierry Reding08943e62013-09-26 16:08:18 +0200598 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200599 struct drm_tegra_submit *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200600 struct tegra_drm_context *context;
601
602 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200603
Thierry Reding08943e62013-09-26 16:08:18 +0200604 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200605 return -ENODEV;
606
607 return context->client->ops->submit(context, args, drm, file);
608}
Arto Merilainenc54a1692013-10-14 15:21:54 +0300609
610static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
611 struct drm_file *file)
612{
613 struct tegra_drm_file *fpriv = file->driver_priv;
614 struct drm_tegra_get_syncpt_base *args = data;
615 struct tegra_drm_context *context;
616 struct host1x_syncpt_base *base;
617 struct host1x_syncpt *syncpt;
618
619 context = tegra_drm_get_context(args->context);
620
621 if (!tegra_drm_file_owns_context(fpriv, context))
622 return -ENODEV;
623
624 if (args->syncpt >= context->client->base.num_syncpts)
625 return -EINVAL;
626
627 syncpt = context->client->base.syncpts[args->syncpt];
628
629 base = host1x_syncpt_get_base(syncpt);
630 if (!base)
631 return -ENXIO;
632
633 args->id = host1x_syncpt_base_id(base);
634
635 return 0;
636}
Thierry Reding7678d712014-06-03 14:56:57 +0200637
638static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
639 struct drm_file *file)
640{
641 struct drm_tegra_gem_set_tiling *args = data;
642 enum tegra_bo_tiling_mode mode;
643 struct drm_gem_object *gem;
644 unsigned long value = 0;
645 struct tegra_bo *bo;
646
647 switch (args->mode) {
648 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
649 mode = TEGRA_BO_TILING_MODE_PITCH;
650
651 if (args->value != 0)
652 return -EINVAL;
653
654 break;
655
656 case DRM_TEGRA_GEM_TILING_MODE_TILED:
657 mode = TEGRA_BO_TILING_MODE_TILED;
658
659 if (args->value != 0)
660 return -EINVAL;
661
662 break;
663
664 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
665 mode = TEGRA_BO_TILING_MODE_BLOCK;
666
667 if (args->value > 5)
668 return -EINVAL;
669
670 value = args->value;
671 break;
672
673 default:
674 return -EINVAL;
675 }
676
677 gem = drm_gem_object_lookup(drm, file, args->handle);
678 if (!gem)
679 return -ENOENT;
680
681 bo = to_tegra_bo(gem);
682
683 bo->tiling.mode = mode;
684 bo->tiling.value = value;
685
686 drm_gem_object_unreference(gem);
687
688 return 0;
689}
690
691static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
692 struct drm_file *file)
693{
694 struct drm_tegra_gem_get_tiling *args = data;
695 struct drm_gem_object *gem;
696 struct tegra_bo *bo;
697 int err = 0;
698
699 gem = drm_gem_object_lookup(drm, file, args->handle);
700 if (!gem)
701 return -ENOENT;
702
703 bo = to_tegra_bo(gem);
704
705 switch (bo->tiling.mode) {
706 case TEGRA_BO_TILING_MODE_PITCH:
707 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
708 args->value = 0;
709 break;
710
711 case TEGRA_BO_TILING_MODE_TILED:
712 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
713 args->value = 0;
714 break;
715
716 case TEGRA_BO_TILING_MODE_BLOCK:
717 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
718 args->value = bo->tiling.value;
719 break;
720
721 default:
722 err = -EINVAL;
723 break;
724 }
725
726 drm_gem_object_unreference(gem);
727
728 return err;
729}
Thierry Reding7b129082014-06-10 12:04:03 +0200730
731static int tegra_gem_set_flags(struct drm_device *drm, void *data,
732 struct drm_file *file)
733{
734 struct drm_tegra_gem_set_flags *args = data;
735 struct drm_gem_object *gem;
736 struct tegra_bo *bo;
737
738 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
739 return -EINVAL;
740
741 gem = drm_gem_object_lookup(drm, file, args->handle);
742 if (!gem)
743 return -ENOENT;
744
745 bo = to_tegra_bo(gem);
746 bo->flags = 0;
747
748 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
749 bo->flags |= TEGRA_BO_BOTTOM_UP;
750
751 drm_gem_object_unreference(gem);
752
753 return 0;
754}
755
756static int tegra_gem_get_flags(struct drm_device *drm, void *data,
757 struct drm_file *file)
758{
759 struct drm_tegra_gem_get_flags *args = data;
760 struct drm_gem_object *gem;
761 struct tegra_bo *bo;
762
763 gem = drm_gem_object_lookup(drm, file, args->handle);
764 if (!gem)
765 return -ENOENT;
766
767 bo = to_tegra_bo(gem);
768 args->flags = 0;
769
770 if (bo->flags & TEGRA_BO_BOTTOM_UP)
771 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
772
773 drm_gem_object_unreference(gem);
774
775 return 0;
776}
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200777#endif
778
Rob Clarkbaa70942013-08-02 13:27:49 -0400779static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200780#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingbd4f2362014-06-03 14:59:29 +0200781 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200782 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED),
783 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED),
784 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED),
785 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED),
786 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED),
787 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED),
788 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED),
789 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED),
Arto Merilainenc54a1692013-10-14 15:21:54 +0300790 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED),
Thierry Reding7678d712014-06-03 14:56:57 +0200791 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, DRM_UNLOCKED),
792 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED),
Thierry Reding7b129082014-06-10 12:04:03 +0200793 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED),
794 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200795#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000796};
797
798static const struct file_operations tegra_drm_fops = {
799 .owner = THIS_MODULE,
800 .open = drm_open,
801 .release = drm_release,
802 .unlocked_ioctl = drm_ioctl,
Arto Merilainende2ba662013-03-22 16:34:08 +0200803 .mmap = tegra_drm_mmap,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000804 .poll = drm_poll,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000805 .read = drm_read,
806#ifdef CONFIG_COMPAT
807 .compat_ioctl = drm_compat_ioctl,
808#endif
809 .llseek = noop_llseek,
810};
811
Thierry Redinged7dae52014-12-16 16:03:13 +0100812static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
813 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100814{
815 struct drm_crtc *crtc;
816
817 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
Thierry Redinged7dae52014-12-16 16:03:13 +0100818 if (pipe == drm_crtc_index(crtc))
Thierry Reding6e5ff992012-11-28 11:45:47 +0100819 return crtc;
820 }
821
822 return NULL;
823}
824
Thierry Redinged7dae52014-12-16 16:03:13 +0100825static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100826{
Thierry Redinged7dae52014-12-16 16:03:13 +0100827 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
Thierry Reding42e9ce02015-01-28 14:43:05 +0100828 struct tegra_dc *dc = to_tegra_dc(crtc);
Thierry Redinged7dae52014-12-16 16:03:13 +0100829
830 if (!crtc)
831 return 0;
832
Thierry Reding42e9ce02015-01-28 14:43:05 +0100833 return tegra_dc_get_vblank_counter(dc);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100834}
835
836static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe)
837{
838 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
839 struct tegra_dc *dc = to_tegra_dc(crtc);
840
841 if (!crtc)
842 return -ENODEV;
843
844 tegra_dc_enable_vblank(dc);
845
846 return 0;
847}
848
849static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe)
850{
851 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
852 struct tegra_dc *dc = to_tegra_dc(crtc);
853
854 if (crtc)
855 tegra_dc_disable_vblank(dc);
856}
857
Thierry Reding3c03c462012-11-28 12:00:18 +0100858static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
859{
Thierry Reding08943e62013-09-26 16:08:18 +0200860 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Redingc88c3632013-09-26 16:08:22 +0200861 struct tegra_drm_context *context, *tmp;
Thierry Reding3c03c462012-11-28 12:00:18 +0100862 struct drm_crtc *crtc;
863
864 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
865 tegra_dc_cancel_page_flip(crtc, file);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200866
867 list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
Thierry Redingc88c3632013-09-26 16:08:22 +0200868 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200869
870 kfree(fpriv);
Thierry Reding3c03c462012-11-28 12:00:18 +0100871}
872
Thierry Redinge450fcc2013-02-13 16:13:16 +0100873#ifdef CONFIG_DEBUG_FS
874static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
875{
876 struct drm_info_node *node = (struct drm_info_node *)s->private;
877 struct drm_device *drm = node->minor->dev;
878 struct drm_framebuffer *fb;
879
880 mutex_lock(&drm->mode_config.fb_lock);
881
882 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
883 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
884 fb->base.id, fb->width, fb->height, fb->depth,
885 fb->bits_per_pixel,
886 atomic_read(&fb->refcount.refcount));
887 }
888
889 mutex_unlock(&drm->mode_config.fb_lock);
890
891 return 0;
892}
893
Thierry Reding28c23372015-01-23 09:16:03 +0100894static int tegra_debugfs_iova(struct seq_file *s, void *data)
895{
896 struct drm_info_node *node = (struct drm_info_node *)s->private;
897 struct drm_device *drm = node->minor->dev;
898 struct tegra_drm *tegra = drm->dev_private;
899
900 return drm_mm_dump_table(s, &tegra->mm);
901}
902
Thierry Redinge450fcc2013-02-13 16:13:16 +0100903static struct drm_info_list tegra_debugfs_list[] = {
904 { "framebuffers", tegra_debugfs_framebuffers, 0 },
Thierry Reding28c23372015-01-23 09:16:03 +0100905 { "iova", tegra_debugfs_iova, 0 },
Thierry Redinge450fcc2013-02-13 16:13:16 +0100906};
907
908static int tegra_debugfs_init(struct drm_minor *minor)
909{
910 return drm_debugfs_create_files(tegra_debugfs_list,
911 ARRAY_SIZE(tegra_debugfs_list),
912 minor->debugfs_root, minor);
913}
914
915static void tegra_debugfs_cleanup(struct drm_minor *minor)
916{
917 drm_debugfs_remove_files(tegra_debugfs_list,
918 ARRAY_SIZE(tegra_debugfs_list), minor);
919}
920#endif
921
Thierry Reding9b57f5f2013-11-08 13:17:14 +0100922static struct drm_driver tegra_drm_driver = {
Thierry Reding38003912013-12-12 10:00:43 +0100923 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000924 .load = tegra_drm_load,
925 .unload = tegra_drm_unload,
926 .open = tegra_drm_open,
Thierry Reding3c03c462012-11-28 12:00:18 +0100927 .preclose = tegra_drm_preclose,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000928 .lastclose = tegra_drm_lastclose,
929
Thierry Reding6e5ff992012-11-28 11:45:47 +0100930 .get_vblank_counter = tegra_drm_get_vblank_counter,
931 .enable_vblank = tegra_drm_enable_vblank,
932 .disable_vblank = tegra_drm_disable_vblank,
933
Thierry Redinge450fcc2013-02-13 16:13:16 +0100934#if defined(CONFIG_DEBUG_FS)
935 .debugfs_init = tegra_debugfs_init,
936 .debugfs_cleanup = tegra_debugfs_cleanup,
937#endif
938
Arto Merilainende2ba662013-03-22 16:34:08 +0200939 .gem_free_object = tegra_bo_free_object,
940 .gem_vm_ops = &tegra_bo_vm_ops,
Thierry Reding38003912013-12-12 10:00:43 +0100941
942 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
943 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
944 .gem_prime_export = tegra_gem_prime_export,
945 .gem_prime_import = tegra_gem_prime_import,
946
Arto Merilainende2ba662013-03-22 16:34:08 +0200947 .dumb_create = tegra_bo_dumb_create,
948 .dumb_map_offset = tegra_bo_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200949 .dumb_destroy = drm_gem_dumb_destroy,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000950
951 .ioctls = tegra_drm_ioctls,
952 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
953 .fops = &tegra_drm_fops,
954
955 .name = DRIVER_NAME,
956 .desc = DRIVER_DESC,
957 .date = DRIVER_DATE,
958 .major = DRIVER_MAJOR,
959 .minor = DRIVER_MINOR,
960 .patchlevel = DRIVER_PATCHLEVEL,
961};
Thierry Reding776dc382013-10-14 14:43:22 +0200962
963int tegra_drm_register_client(struct tegra_drm *tegra,
964 struct tegra_drm_client *client)
965{
966 mutex_lock(&tegra->clients_lock);
967 list_add_tail(&client->list, &tegra->clients);
968 mutex_unlock(&tegra->clients_lock);
969
970 return 0;
971}
972
973int tegra_drm_unregister_client(struct tegra_drm *tegra,
974 struct tegra_drm_client *client)
975{
976 mutex_lock(&tegra->clients_lock);
977 list_del_init(&client->list);
978 mutex_unlock(&tegra->clients_lock);
979
980 return 0;
981}
982
Thierry Reding9910f5c2014-05-22 09:57:15 +0200983static int host1x_drm_probe(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +0200984{
Thierry Reding9910f5c2014-05-22 09:57:15 +0200985 struct drm_driver *driver = &tegra_drm_driver;
986 struct drm_device *drm;
987 int err;
988
989 drm = drm_dev_alloc(driver, &dev->dev);
990 if (!drm)
991 return -ENOMEM;
992
993 drm_dev_set_unique(drm, dev_name(&dev->dev));
994 dev_set_drvdata(&dev->dev, drm);
995
996 err = drm_dev_register(drm, 0);
997 if (err < 0)
998 goto unref;
999
1000 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
1001 driver->major, driver->minor, driver->patchlevel,
1002 driver->date, drm->primary->index);
1003
1004 return 0;
1005
1006unref:
1007 drm_dev_unref(drm);
1008 return err;
Thierry Reding776dc382013-10-14 14:43:22 +02001009}
1010
Thierry Reding9910f5c2014-05-22 09:57:15 +02001011static int host1x_drm_remove(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001012{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001013 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1014
1015 drm_dev_unregister(drm);
1016 drm_dev_unref(drm);
Thierry Reding776dc382013-10-14 14:43:22 +02001017
1018 return 0;
1019}
1020
Thierry Reding359ae682014-12-18 17:15:25 +01001021#ifdef CONFIG_PM_SLEEP
1022static int host1x_drm_suspend(struct device *dev)
1023{
1024 struct drm_device *drm = dev_get_drvdata(dev);
1025
1026 drm_kms_helper_poll_disable(drm);
1027
1028 return 0;
1029}
1030
1031static int host1x_drm_resume(struct device *dev)
1032{
1033 struct drm_device *drm = dev_get_drvdata(dev);
1034
1035 drm_kms_helper_poll_enable(drm);
1036
1037 return 0;
1038}
1039#endif
1040
Thierry Redinga13f1dc2015-08-11 13:22:44 +02001041static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1042 host1x_drm_resume);
Thierry Reding359ae682014-12-18 17:15:25 +01001043
Thierry Reding776dc382013-10-14 14:43:22 +02001044static const struct of_device_id host1x_drm_subdevs[] = {
1045 { .compatible = "nvidia,tegra20-dc", },
1046 { .compatible = "nvidia,tegra20-hdmi", },
1047 { .compatible = "nvidia,tegra20-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001048 { .compatible = "nvidia,tegra20-gr3d", },
Thierry Reding776dc382013-10-14 14:43:22 +02001049 { .compatible = "nvidia,tegra30-dc", },
1050 { .compatible = "nvidia,tegra30-hdmi", },
1051 { .compatible = "nvidia,tegra30-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001052 { .compatible = "nvidia,tegra30-gr3d", },
Thierry Redingdec72732013-09-03 08:45:46 +02001053 { .compatible = "nvidia,tegra114-dsi", },
Mikko Perttunen7d1d28a2013-09-30 16:54:47 +02001054 { .compatible = "nvidia,tegra114-hdmi", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001055 { .compatible = "nvidia,tegra114-gr3d", },
Thierry Reding8620fc62013-12-12 11:03:59 +01001056 { .compatible = "nvidia,tegra124-dc", },
Thierry Reding6b6b6042013-11-15 16:06:05 +01001057 { .compatible = "nvidia,tegra124-sor", },
Thierry Redingfb7be702013-11-15 16:07:32 +01001058 { .compatible = "nvidia,tegra124-hdmi", },
Thierry Reding776dc382013-10-14 14:43:22 +02001059 { /* sentinel */ }
1060};
1061
1062static struct host1x_driver host1x_drm_driver = {
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001063 .driver = {
1064 .name = "drm",
Thierry Reding359ae682014-12-18 17:15:25 +01001065 .pm = &host1x_drm_pm_ops,
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001066 },
Thierry Reding776dc382013-10-14 14:43:22 +02001067 .probe = host1x_drm_probe,
1068 .remove = host1x_drm_remove,
1069 .subdevs = host1x_drm_subdevs,
1070};
1071
1072static int __init host1x_drm_init(void)
1073{
1074 int err;
1075
1076 err = host1x_driver_register(&host1x_drm_driver);
1077 if (err < 0)
1078 return err;
1079
1080 err = platform_driver_register(&tegra_dc_driver);
1081 if (err < 0)
1082 goto unregister_host1x;
1083
Thierry Redingdec72732013-09-03 08:45:46 +02001084 err = platform_driver_register(&tegra_dsi_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001085 if (err < 0)
1086 goto unregister_dc;
1087
Thierry Reding6b6b6042013-11-15 16:06:05 +01001088 err = platform_driver_register(&tegra_sor_driver);
Thierry Redingdec72732013-09-03 08:45:46 +02001089 if (err < 0)
1090 goto unregister_dsi;
1091
Thierry Reding6b6b6042013-11-15 16:06:05 +01001092 err = platform_driver_register(&tegra_hdmi_driver);
1093 if (err < 0)
1094 goto unregister_sor;
1095
1096 err = platform_driver_register(&tegra_dpaux_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001097 if (err < 0)
1098 goto unregister_hdmi;
1099
Thierry Reding6b6b6042013-11-15 16:06:05 +01001100 err = platform_driver_register(&tegra_gr2d_driver);
1101 if (err < 0)
1102 goto unregister_dpaux;
1103
Thierry Reding5f60ed02013-02-28 08:08:01 +01001104 err = platform_driver_register(&tegra_gr3d_driver);
1105 if (err < 0)
1106 goto unregister_gr2d;
1107
Thierry Reding776dc382013-10-14 14:43:22 +02001108 return 0;
1109
Thierry Reding5f60ed02013-02-28 08:08:01 +01001110unregister_gr2d:
1111 platform_driver_unregister(&tegra_gr2d_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001112unregister_dpaux:
1113 platform_driver_unregister(&tegra_dpaux_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001114unregister_hdmi:
1115 platform_driver_unregister(&tegra_hdmi_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001116unregister_sor:
1117 platform_driver_unregister(&tegra_sor_driver);
Thierry Redingdec72732013-09-03 08:45:46 +02001118unregister_dsi:
1119 platform_driver_unregister(&tegra_dsi_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001120unregister_dc:
1121 platform_driver_unregister(&tegra_dc_driver);
1122unregister_host1x:
1123 host1x_driver_unregister(&host1x_drm_driver);
1124 return err;
1125}
1126module_init(host1x_drm_init);
1127
1128static void __exit host1x_drm_exit(void)
1129{
Thierry Reding5f60ed02013-02-28 08:08:01 +01001130 platform_driver_unregister(&tegra_gr3d_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001131 platform_driver_unregister(&tegra_gr2d_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001132 platform_driver_unregister(&tegra_dpaux_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001133 platform_driver_unregister(&tegra_hdmi_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001134 platform_driver_unregister(&tegra_sor_driver);
Thierry Redingdec72732013-09-03 08:45:46 +02001135 platform_driver_unregister(&tegra_dsi_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001136 platform_driver_unregister(&tegra_dc_driver);
1137 host1x_driver_unregister(&host1x_drm_driver);
1138}
1139module_exit(host1x_drm_exit);
1140
1141MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1142MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1143MODULE_LICENSE("GPL v2");