Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify it |
| 3 | * under the terms of the GNU General Public License as published by the |
| 4 | * Free Software Foundation; either version 2 of the License, or (at your |
| 5 | * option) any later version. |
| 6 | * |
| 7 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 8 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 9 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 10 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 11 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 12 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 13 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 14 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 15 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 16 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along |
| 19 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 20 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | * |
| 22 | * Copyright 2002 MontaVista Software Inc. |
| 23 | * Author: MontaVista Software, Inc. |
| 24 | * stevel@mvista.com or source@mvista.com |
| 25 | */ |
| 26 | |
| 27 | #include <linux/bitops.h> |
| 28 | #include <linux/errno.h> |
| 29 | #include <linux/init.h> |
| 30 | #include <linux/io.h> |
| 31 | #include <linux/kernel_stat.h> |
| 32 | #include <linux/module.h> |
| 33 | #include <linux/signal.h> |
| 34 | #include <linux/sched.h> |
| 35 | #include <linux/types.h> |
| 36 | #include <linux/interrupt.h> |
| 37 | #include <linux/ioport.h> |
| 38 | #include <linux/timex.h> |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 39 | #include <linux/random.h> |
| 40 | #include <linux/delay.h> |
| 41 | |
| 42 | #include <asm/bootinfo.h> |
| 43 | #include <asm/time.h> |
| 44 | #include <asm/mipsregs.h> |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 45 | |
Florian Fainelli | 606a083 | 2008-08-23 18:53:50 +0200 | [diff] [blame] | 46 | #include <asm/mach-rc32434/irq.h> |
Phil Sutter | 4aa0f4d | 2008-11-28 20:45:10 +0100 | [diff] [blame] | 47 | #include <asm/mach-rc32434/gpio.h> |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 48 | |
| 49 | struct intr_group { |
| 50 | u32 mask; /* mask of valid bits in pending/mask registers */ |
| 51 | volatile u32 *base_addr; |
| 52 | }; |
| 53 | |
| 54 | #define RC32434_NR_IRQS (GROUP4_IRQ_BASE + 32) |
| 55 | |
| 56 | #if (NR_IRQS < RC32434_NR_IRQS) |
| 57 | #error Too little irqs defined. Did you override <asm/irq.h> ? |
| 58 | #endif |
| 59 | |
| 60 | static const struct intr_group intr_group[NUM_INTR_GROUPS] = { |
| 61 | { |
| 62 | .mask = 0x0000efff, |
| 63 | .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)}, |
| 64 | { |
| 65 | .mask = 0x00001fff, |
| 66 | .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET)}, |
| 67 | { |
| 68 | .mask = 0x00000007, |
| 69 | .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET)}, |
| 70 | { |
| 71 | .mask = 0x0003ffff, |
| 72 | .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET)}, |
| 73 | { |
| 74 | .mask = 0xffffffff, |
| 75 | .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET)} |
| 76 | }; |
| 77 | |
| 78 | #define READ_PEND(base) (*(base)) |
| 79 | #define READ_MASK(base) (*(base + 2)) |
| 80 | #define WRITE_MASK(base, val) (*(base + 2) = (val)) |
| 81 | |
| 82 | static inline int irq_to_group(unsigned int irq_nr) |
| 83 | { |
| 84 | return (irq_nr - GROUP0_IRQ_BASE) >> 5; |
| 85 | } |
| 86 | |
| 87 | static inline int group_to_ip(unsigned int group) |
| 88 | { |
| 89 | return group + 2; |
| 90 | } |
| 91 | |
| 92 | static inline void enable_local_irq(unsigned int ip) |
| 93 | { |
| 94 | int ipnum = 0x100 << ip; |
| 95 | |
| 96 | set_c0_status(ipnum); |
| 97 | } |
| 98 | |
| 99 | static inline void disable_local_irq(unsigned int ip) |
| 100 | { |
| 101 | int ipnum = 0x100 << ip; |
| 102 | |
| 103 | clear_c0_status(ipnum); |
| 104 | } |
| 105 | |
| 106 | static inline void ack_local_irq(unsigned int ip) |
| 107 | { |
| 108 | int ipnum = 0x100 << ip; |
| 109 | |
| 110 | clear_c0_cause(ipnum); |
| 111 | } |
| 112 | |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 113 | static void rb532_enable_irq(struct irq_data *d) |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 114 | { |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 115 | unsigned int group, intr_bit, irq_nr = d->irq; |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 116 | int ip = irq_nr - GROUP0_IRQ_BASE; |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 117 | volatile unsigned int *addr; |
| 118 | |
| 119 | if (ip < 0) |
| 120 | enable_local_irq(irq_nr); |
| 121 | else { |
| 122 | group = ip >> 5; |
| 123 | |
| 124 | ip &= (1 << 5) - 1; |
| 125 | intr_bit = 1 << ip; |
| 126 | |
| 127 | enable_local_irq(group_to_ip(group)); |
| 128 | |
| 129 | addr = intr_group[group].base_addr; |
| 130 | WRITE_MASK(addr, READ_MASK(addr) & ~intr_bit); |
| 131 | } |
| 132 | } |
| 133 | |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 134 | static void rb532_disable_irq(struct irq_data *d) |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 135 | { |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 136 | unsigned int group, intr_bit, mask, irq_nr = d->irq; |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 137 | int ip = irq_nr - GROUP0_IRQ_BASE; |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 138 | volatile unsigned int *addr; |
| 139 | |
| 140 | if (ip < 0) { |
| 141 | disable_local_irq(irq_nr); |
| 142 | } else { |
| 143 | group = ip >> 5; |
| 144 | |
| 145 | ip &= (1 << 5) - 1; |
| 146 | intr_bit = 1 << ip; |
| 147 | addr = intr_group[group].base_addr; |
| 148 | mask = READ_MASK(addr); |
| 149 | mask |= intr_bit; |
| 150 | WRITE_MASK(addr, mask); |
| 151 | |
Florian Fainelli | d36773e | 2009-05-21 19:49:47 +0200 | [diff] [blame] | 152 | /* There is a maximum of 14 GPIO interrupts */ |
| 153 | if (group == GPIO_MAPPED_IRQ_GROUP && irq_nr <= (GROUP4_IRQ_BASE + 13)) |
Phil Sutter | 4aa0f4d | 2008-11-28 20:45:10 +0100 | [diff] [blame] | 154 | rb532_gpio_set_istat(0, irq_nr - GPIO_MAPPED_IRQ_BASE); |
| 155 | |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 156 | /* |
| 157 | * if there are no more interrupts enabled in this |
| 158 | * group, disable corresponding IP |
| 159 | */ |
| 160 | if (mask == intr_group[group].mask) |
| 161 | disable_local_irq(group_to_ip(group)); |
| 162 | } |
| 163 | } |
| 164 | |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 165 | static void rb532_mask_and_ack_irq(struct irq_data *d) |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 166 | { |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 167 | rb532_disable_irq(d); |
| 168 | ack_local_irq(group_to_ip(irq_to_group(d->irq))); |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 169 | } |
| 170 | |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 171 | static int rb532_set_type(struct irq_data *d, unsigned type) |
Phil Sutter | 4aa0f4d | 2008-11-28 20:45:10 +0100 | [diff] [blame] | 172 | { |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 173 | int gpio = d->irq - GPIO_MAPPED_IRQ_BASE; |
| 174 | int group = irq_to_group(d->irq); |
Phil Sutter | 4aa0f4d | 2008-11-28 20:45:10 +0100 | [diff] [blame] | 175 | |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 176 | if (group != GPIO_MAPPED_IRQ_GROUP || d->irq > (GROUP4_IRQ_BASE + 13)) |
Phil Sutter | 4aa0f4d | 2008-11-28 20:45:10 +0100 | [diff] [blame] | 177 | return (type == IRQ_TYPE_LEVEL_HIGH) ? 0 : -EINVAL; |
| 178 | |
| 179 | switch (type) { |
| 180 | case IRQ_TYPE_LEVEL_HIGH: |
| 181 | rb532_gpio_set_ilevel(1, gpio); |
| 182 | break; |
| 183 | case IRQ_TYPE_LEVEL_LOW: |
| 184 | rb532_gpio_set_ilevel(0, gpio); |
| 185 | break; |
| 186 | default: |
| 187 | return -EINVAL; |
| 188 | } |
| 189 | |
| 190 | return 0; |
| 191 | } |
| 192 | |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 193 | static struct irq_chip rc32434_irq_type = { |
| 194 | .name = "RB532", |
Thomas Gleixner | efb02da | 2011-03-23 21:09:10 +0000 | [diff] [blame] | 195 | .irq_ack = rb532_disable_irq, |
| 196 | .irq_mask = rb532_disable_irq, |
| 197 | .irq_mask_ack = rb532_mask_and_ack_irq, |
| 198 | .irq_unmask = rb532_enable_irq, |
| 199 | .irq_set_type = rb532_set_type, |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 200 | }; |
| 201 | |
| 202 | void __init arch_init_irq(void) |
| 203 | { |
| 204 | int i; |
| 205 | |
| 206 | pr_info("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS); |
| 207 | |
| 208 | for (i = 0; i < RC32434_NR_IRQS; i++) |
Thomas Gleixner | e4ec798 | 2011-03-27 15:19:28 +0200 | [diff] [blame] | 209 | irq_set_chip_and_handler(i, &rc32434_irq_type, |
| 210 | handle_level_irq); |
Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | /* Main Interrupt dispatcher */ |
| 214 | asmlinkage void plat_irq_dispatch(void) |
| 215 | { |
| 216 | unsigned int ip, pend, group; |
| 217 | volatile unsigned int *addr; |
| 218 | unsigned int cp0_cause = read_c0_cause() & read_c0_status(); |
| 219 | |
| 220 | if (cp0_cause & CAUSEF_IP7) { |
| 221 | do_IRQ(7); |
| 222 | } else { |
| 223 | ip = (cp0_cause & 0x7c00); |
| 224 | if (ip) { |
| 225 | group = 21 + (fls(ip) - 32); |
| 226 | |
| 227 | addr = intr_group[group].base_addr; |
| 228 | |
| 229 | pend = READ_PEND(addr); |
| 230 | pend &= ~READ_MASK(addr); /* only unmasked interrupts */ |
| 231 | pend = 39 + (fls(pend) - 32); |
| 232 | do_IRQ((group << 5) + pend); |
| 233 | } |
| 234 | } |
| 235 | } |