Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Low Level Transport (NDLC) Driver for STMicroelectronics NFC Chip |
| 3 | * |
Christophe Ricard | ed06aeef | 2015-06-09 22:26:05 +0200 | [diff] [blame] | 4 | * Copyright (C) 2014-2015 STMicroelectronics SAS. All rights reserved. |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/sched.h> |
| 20 | #include <net/nfc/nci_core.h> |
| 21 | |
Christophe Ricard | ed06aeef | 2015-06-09 22:26:05 +0200 | [diff] [blame] | 22 | #include "st-nci.h" |
Christophe Ricard | 3648dc6 | 2015-10-25 22:54:39 +0100 | [diff] [blame^] | 23 | #include "ndlc.h" |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 24 | |
| 25 | #define NDLC_TIMER_T1 100 |
| 26 | #define NDLC_TIMER_T1_WAIT 400 |
| 27 | #define NDLC_TIMER_T2 1200 |
| 28 | |
| 29 | #define PCB_TYPE_DATAFRAME 0x80 |
| 30 | #define PCB_TYPE_SUPERVISOR 0xc0 |
| 31 | #define PCB_TYPE_MASK PCB_TYPE_SUPERVISOR |
| 32 | |
| 33 | #define PCB_SYNC_ACK 0x20 |
| 34 | #define PCB_SYNC_NACK 0x10 |
| 35 | #define PCB_SYNC_WAIT 0x30 |
| 36 | #define PCB_SYNC_NOINFO 0x00 |
| 37 | #define PCB_SYNC_MASK PCB_SYNC_WAIT |
| 38 | |
| 39 | #define PCB_DATAFRAME_RETRANSMIT_YES 0x00 |
| 40 | #define PCB_DATAFRAME_RETRANSMIT_NO 0x04 |
| 41 | #define PCB_DATAFRAME_RETRANSMIT_MASK PCB_DATAFRAME_RETRANSMIT_NO |
| 42 | |
| 43 | #define PCB_SUPERVISOR_RETRANSMIT_YES 0x00 |
| 44 | #define PCB_SUPERVISOR_RETRANSMIT_NO 0x02 |
| 45 | #define PCB_SUPERVISOR_RETRANSMIT_MASK PCB_SUPERVISOR_RETRANSMIT_NO |
| 46 | |
| 47 | #define PCB_FRAME_CRC_INFO_PRESENT 0x08 |
| 48 | #define PCB_FRAME_CRC_INFO_NOTPRESENT 0x00 |
| 49 | #define PCB_FRAME_CRC_INFO_MASK PCB_FRAME_CRC_INFO_PRESENT |
| 50 | |
| 51 | #define NDLC_DUMP_SKB(info, skb) \ |
| 52 | do { \ |
| 53 | pr_debug("%s:\n", info); \ |
| 54 | print_hex_dump(KERN_DEBUG, "ndlc: ", DUMP_PREFIX_OFFSET, \ |
| 55 | 16, 1, skb->data, skb->len, 0); \ |
| 56 | } while (0) |
| 57 | |
| 58 | int ndlc_open(struct llt_ndlc *ndlc) |
| 59 | { |
| 60 | /* toggle reset pin */ |
| 61 | ndlc->ops->enable(ndlc->phy_id); |
Christophe Ricard | 183fe2d | 2015-06-06 13:16:50 +0200 | [diff] [blame] | 62 | ndlc->powered = 1; |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 63 | return 0; |
| 64 | } |
| 65 | EXPORT_SYMBOL(ndlc_open); |
| 66 | |
| 67 | void ndlc_close(struct llt_ndlc *ndlc) |
| 68 | { |
Christophe Ricard | 41fc2f5 | 2015-06-06 13:16:52 +0200 | [diff] [blame] | 69 | struct nci_mode_set_cmd cmd; |
| 70 | |
Christophe Ricard | ed06aeef | 2015-06-09 22:26:05 +0200 | [diff] [blame] | 71 | cmd.cmd_type = ST_NCI_SET_NFC_MODE; |
Christophe Ricard | 41fc2f5 | 2015-06-06 13:16:52 +0200 | [diff] [blame] | 72 | cmd.mode = 0; |
| 73 | |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 74 | /* toggle reset pin */ |
Christophe Ricard | 41fc2f5 | 2015-06-06 13:16:52 +0200 | [diff] [blame] | 75 | ndlc->ops->enable(ndlc->phy_id); |
| 76 | |
Christophe Ricard | ed06aeef | 2015-06-09 22:26:05 +0200 | [diff] [blame] | 77 | nci_prop_cmd(ndlc->ndev, ST_NCI_CORE_PROP, |
Christophe Ricard | 41fc2f5 | 2015-06-06 13:16:52 +0200 | [diff] [blame] | 78 | sizeof(struct nci_mode_set_cmd), (__u8 *)&cmd); |
| 79 | |
Christophe Ricard | 183fe2d | 2015-06-06 13:16:50 +0200 | [diff] [blame] | 80 | ndlc->powered = 0; |
Christophe Ricard | 41fc2f5 | 2015-06-06 13:16:52 +0200 | [diff] [blame] | 81 | ndlc->ops->disable(ndlc->phy_id); |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 82 | } |
| 83 | EXPORT_SYMBOL(ndlc_close); |
| 84 | |
| 85 | int ndlc_send(struct llt_ndlc *ndlc, struct sk_buff *skb) |
| 86 | { |
| 87 | /* add ndlc header */ |
| 88 | u8 pcb = PCB_TYPE_DATAFRAME | PCB_DATAFRAME_RETRANSMIT_NO | |
| 89 | PCB_FRAME_CRC_INFO_NOTPRESENT; |
| 90 | |
| 91 | *skb_push(skb, 1) = pcb; |
| 92 | skb_queue_tail(&ndlc->send_q, skb); |
| 93 | |
| 94 | schedule_work(&ndlc->sm_work); |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | EXPORT_SYMBOL(ndlc_send); |
| 99 | |
| 100 | static void llt_ndlc_send_queue(struct llt_ndlc *ndlc) |
| 101 | { |
| 102 | struct sk_buff *skb; |
| 103 | int r; |
| 104 | unsigned long time_sent; |
| 105 | |
| 106 | if (ndlc->send_q.qlen) |
| 107 | pr_debug("sendQlen=%d unackQlen=%d\n", |
| 108 | ndlc->send_q.qlen, ndlc->ack_pending_q.qlen); |
| 109 | |
| 110 | while (ndlc->send_q.qlen) { |
| 111 | skb = skb_dequeue(&ndlc->send_q); |
| 112 | NDLC_DUMP_SKB("ndlc frame written", skb); |
| 113 | r = ndlc->ops->write(ndlc->phy_id, skb); |
| 114 | if (r < 0) { |
| 115 | ndlc->hard_fault = r; |
| 116 | break; |
| 117 | } |
| 118 | time_sent = jiffies; |
| 119 | *(unsigned long *)skb->cb = time_sent; |
| 120 | |
| 121 | skb_queue_tail(&ndlc->ack_pending_q, skb); |
| 122 | |
| 123 | /* start timer t1 for ndlc aknowledge */ |
| 124 | ndlc->t1_active = true; |
| 125 | mod_timer(&ndlc->t1_timer, time_sent + |
| 126 | msecs_to_jiffies(NDLC_TIMER_T1)); |
Christophe Ricard | fa0daa0 | 2014-09-13 10:28:48 +0200 | [diff] [blame] | 127 | /* start timer t2 for chip availability */ |
| 128 | ndlc->t2_active = true; |
| 129 | mod_timer(&ndlc->t2_timer, time_sent + |
| 130 | msecs_to_jiffies(NDLC_TIMER_T2)); |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 131 | } |
| 132 | } |
| 133 | |
| 134 | static void llt_ndlc_requeue_data_pending(struct llt_ndlc *ndlc) |
| 135 | { |
| 136 | struct sk_buff *skb; |
| 137 | u8 pcb; |
| 138 | |
| 139 | while ((skb = skb_dequeue_tail(&ndlc->ack_pending_q))) { |
| 140 | pcb = skb->data[0]; |
| 141 | switch (pcb & PCB_TYPE_MASK) { |
| 142 | case PCB_TYPE_SUPERVISOR: |
| 143 | skb->data[0] = (pcb & ~PCB_SUPERVISOR_RETRANSMIT_MASK) | |
| 144 | PCB_SUPERVISOR_RETRANSMIT_YES; |
| 145 | break; |
| 146 | case PCB_TYPE_DATAFRAME: |
| 147 | skb->data[0] = (pcb & ~PCB_DATAFRAME_RETRANSMIT_MASK) | |
| 148 | PCB_DATAFRAME_RETRANSMIT_YES; |
| 149 | break; |
| 150 | default: |
| 151 | pr_err("UNKNOWN Packet Control Byte=%d\n", pcb); |
| 152 | kfree_skb(skb); |
Christophe Ricard | 2084246 | 2015-01-25 23:33:23 +0100 | [diff] [blame] | 153 | continue; |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 154 | } |
| 155 | skb_queue_head(&ndlc->send_q, skb); |
| 156 | } |
| 157 | } |
| 158 | |
| 159 | static void llt_ndlc_rcv_queue(struct llt_ndlc *ndlc) |
| 160 | { |
| 161 | struct sk_buff *skb; |
| 162 | u8 pcb; |
| 163 | unsigned long time_sent; |
| 164 | |
| 165 | if (ndlc->rcv_q.qlen) |
| 166 | pr_debug("rcvQlen=%d\n", ndlc->rcv_q.qlen); |
| 167 | |
| 168 | while ((skb = skb_dequeue(&ndlc->rcv_q)) != NULL) { |
| 169 | pcb = skb->data[0]; |
| 170 | skb_pull(skb, 1); |
| 171 | if ((pcb & PCB_TYPE_MASK) == PCB_TYPE_SUPERVISOR) { |
| 172 | switch (pcb & PCB_SYNC_MASK) { |
| 173 | case PCB_SYNC_ACK: |
Christophe Ricard | 1d816b6e | 2015-08-14 22:33:35 +0200 | [diff] [blame] | 174 | skb = skb_dequeue(&ndlc->ack_pending_q); |
| 175 | kfree_skb(skb); |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 176 | del_timer_sync(&ndlc->t1_timer); |
| 177 | del_timer_sync(&ndlc->t2_timer); |
| 178 | ndlc->t2_active = false; |
| 179 | ndlc->t1_active = false; |
| 180 | break; |
| 181 | case PCB_SYNC_NACK: |
| 182 | llt_ndlc_requeue_data_pending(ndlc); |
| 183 | llt_ndlc_send_queue(ndlc); |
| 184 | /* start timer t1 for ndlc aknowledge */ |
| 185 | time_sent = jiffies; |
| 186 | ndlc->t1_active = true; |
| 187 | mod_timer(&ndlc->t1_timer, time_sent + |
| 188 | msecs_to_jiffies(NDLC_TIMER_T1)); |
| 189 | break; |
| 190 | case PCB_SYNC_WAIT: |
| 191 | time_sent = jiffies; |
| 192 | ndlc->t1_active = true; |
| 193 | mod_timer(&ndlc->t1_timer, time_sent + |
| 194 | msecs_to_jiffies(NDLC_TIMER_T1_WAIT)); |
| 195 | break; |
| 196 | default: |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 197 | kfree_skb(skb); |
| 198 | break; |
| 199 | } |
Christophe Ricard | 8b70688 | 2015-08-14 22:33:36 +0200 | [diff] [blame] | 200 | } else if ((pcb & PCB_TYPE_MASK) == PCB_TYPE_DATAFRAME) { |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 201 | nci_recv_frame(ndlc->ndev, skb); |
Christophe Ricard | 8b70688 | 2015-08-14 22:33:36 +0200 | [diff] [blame] | 202 | } else { |
| 203 | kfree_skb(skb); |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 204 | } |
| 205 | } |
| 206 | } |
| 207 | |
| 208 | static void llt_ndlc_sm_work(struct work_struct *work) |
| 209 | { |
| 210 | struct llt_ndlc *ndlc = container_of(work, struct llt_ndlc, sm_work); |
| 211 | |
| 212 | llt_ndlc_send_queue(ndlc); |
| 213 | llt_ndlc_rcv_queue(ndlc); |
| 214 | |
| 215 | if (ndlc->t1_active && timer_pending(&ndlc->t1_timer) == 0) { |
| 216 | pr_debug |
| 217 | ("Handle T1(recv SUPERVISOR) elapsed (T1 now inactive)\n"); |
| 218 | ndlc->t1_active = false; |
| 219 | |
| 220 | llt_ndlc_requeue_data_pending(ndlc); |
| 221 | llt_ndlc_send_queue(ndlc); |
| 222 | } |
| 223 | |
| 224 | if (ndlc->t2_active && timer_pending(&ndlc->t2_timer) == 0) { |
| 225 | pr_debug("Handle T2(recv DATA) elapsed (T2 now inactive)\n"); |
| 226 | ndlc->t2_active = false; |
| 227 | ndlc->t1_active = false; |
| 228 | del_timer_sync(&ndlc->t1_timer); |
Christophe Ricard | fa0daa0 | 2014-09-13 10:28:48 +0200 | [diff] [blame] | 229 | del_timer_sync(&ndlc->t2_timer); |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 230 | ndlc_close(ndlc); |
| 231 | ndlc->hard_fault = -EREMOTEIO; |
| 232 | } |
| 233 | } |
| 234 | |
| 235 | void ndlc_recv(struct llt_ndlc *ndlc, struct sk_buff *skb) |
| 236 | { |
| 237 | if (skb == NULL) { |
| 238 | pr_err("NULL Frame -> link is dead\n"); |
| 239 | ndlc->hard_fault = -EREMOTEIO; |
| 240 | ndlc_close(ndlc); |
| 241 | } else { |
| 242 | NDLC_DUMP_SKB("incoming frame", skb); |
| 243 | skb_queue_tail(&ndlc->rcv_q, skb); |
| 244 | } |
| 245 | |
| 246 | schedule_work(&ndlc->sm_work); |
| 247 | } |
| 248 | EXPORT_SYMBOL(ndlc_recv); |
| 249 | |
| 250 | static void ndlc_t1_timeout(unsigned long data) |
| 251 | { |
| 252 | struct llt_ndlc *ndlc = (struct llt_ndlc *)data; |
| 253 | |
| 254 | pr_debug("\n"); |
| 255 | |
| 256 | schedule_work(&ndlc->sm_work); |
| 257 | } |
| 258 | |
| 259 | static void ndlc_t2_timeout(unsigned long data) |
| 260 | { |
| 261 | struct llt_ndlc *ndlc = (struct llt_ndlc *)data; |
| 262 | |
| 263 | pr_debug("\n"); |
| 264 | |
| 265 | schedule_work(&ndlc->sm_work); |
| 266 | } |
| 267 | |
| 268 | int ndlc_probe(void *phy_id, struct nfc_phy_ops *phy_ops, struct device *dev, |
Christophe Ricard | 3648dc6 | 2015-10-25 22:54:39 +0100 | [diff] [blame^] | 269 | int phy_headroom, int phy_tailroom, struct llt_ndlc **ndlc_id, |
| 270 | struct st_nci_se_status *se_status) |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 271 | { |
| 272 | struct llt_ndlc *ndlc; |
| 273 | |
| 274 | ndlc = devm_kzalloc(dev, sizeof(struct llt_ndlc), GFP_KERNEL); |
Joe Perches | 3590ebc | 2015-04-07 00:17:00 -0700 | [diff] [blame] | 275 | if (!ndlc) |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 276 | return -ENOMEM; |
Joe Perches | 3590ebc | 2015-04-07 00:17:00 -0700 | [diff] [blame] | 277 | |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 278 | ndlc->ops = phy_ops; |
| 279 | ndlc->phy_id = phy_id; |
| 280 | ndlc->dev = dev; |
Christophe Ricard | 183fe2d | 2015-06-06 13:16:50 +0200 | [diff] [blame] | 281 | ndlc->powered = 0; |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 282 | |
| 283 | *ndlc_id = ndlc; |
| 284 | |
Christophe Ricard | ace9183 | 2014-11-13 00:30:40 +0100 | [diff] [blame] | 285 | /* initialize timers */ |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 286 | init_timer(&ndlc->t1_timer); |
| 287 | ndlc->t1_timer.data = (unsigned long)ndlc; |
| 288 | ndlc->t1_timer.function = ndlc_t1_timeout; |
| 289 | |
| 290 | init_timer(&ndlc->t2_timer); |
| 291 | ndlc->t2_timer.data = (unsigned long)ndlc; |
| 292 | ndlc->t2_timer.function = ndlc_t2_timeout; |
| 293 | |
| 294 | skb_queue_head_init(&ndlc->rcv_q); |
| 295 | skb_queue_head_init(&ndlc->send_q); |
| 296 | skb_queue_head_init(&ndlc->ack_pending_q); |
| 297 | |
| 298 | INIT_WORK(&ndlc->sm_work, llt_ndlc_sm_work); |
| 299 | |
Christophe Ricard | 3648dc6 | 2015-10-25 22:54:39 +0100 | [diff] [blame^] | 300 | return st_nci_probe(ndlc, phy_headroom, phy_tailroom, se_status); |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 301 | } |
| 302 | EXPORT_SYMBOL(ndlc_probe); |
| 303 | |
| 304 | void ndlc_remove(struct llt_ndlc *ndlc) |
| 305 | { |
Christophe Ricard | ed06aeef | 2015-06-09 22:26:05 +0200 | [diff] [blame] | 306 | st_nci_remove(ndlc->ndev); |
Christophe Ricard | e8b72c2 | 2015-06-06 13:16:49 +0200 | [diff] [blame] | 307 | |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 308 | /* cancel timers */ |
| 309 | del_timer_sync(&ndlc->t1_timer); |
| 310 | del_timer_sync(&ndlc->t2_timer); |
| 311 | ndlc->t2_active = false; |
| 312 | ndlc->t1_active = false; |
| 313 | |
| 314 | skb_queue_purge(&ndlc->rcv_q); |
| 315 | skb_queue_purge(&ndlc->send_q); |
Christophe Ricard | 35630df | 2014-05-25 22:35:38 +0200 | [diff] [blame] | 316 | } |
| 317 | EXPORT_SYMBOL(ndlc_remove); |